GB2411981A

GB2411981A - Setting a clock in a clock generating circuit of a computer motherboard

Info

Publication number: GB2411981A
Application number: GB0405519A
Authority: GB
Inventors: Yen Sheng Chang
Original assignee: Giga Byte Technology Co Ltd
Current assignee: Giga Byte Technology Co Ltd
Priority date: 2004-03-11
Filing date: 2004-03-11
Publication date: 2005-09-14
Anticipated expiration: 2024-03-11
Also published as: GB2411981B; GB0405519D0

Abstract

A device and method for setting a clock in a clock generating circuit of a computer motherboard in response to a trigger signal or an irregular output signal from the BIOS, in order to preventing the system from crashing due to undue over-clocking. The device comprises a crystal oscillator, a frequency control unit, a phase-lock-loop (PLL) spread spectrum unit electrically connected with the crystal oscillator and the frequency control unit, a memory unit having a clock setting value stored therein, a detection unit electrically connected with the memory unit and used to detect a signal status, and a logic control unit electrically connected with the PLL spread spectrum unit, the frequency control unit and the detection unit. The method involves replacing an original setting value of a memory inside a logic control unit by a frequency setting value pre-stored in a memory unit and finishing an auto-booting process.

Description

2411 981 l

CLOCK SETTING ARRANGEMENT AND METHOD

FOR COMPUTER MOTHERBOARD

The present invention is directed to a clock-setting arrangement and s method, particularly a device and method for detecting the status of a basic input/output system (BIOS) for clock setting, and more particularly, to an auxiliary device, disposed inside a clock generating integrated circuit (IC), having a memory unit and a detection control unit, which employs a software detecting method to prevent the whole system from crashing due to undue overclocking.

lo The basic inpuVoutput system (BIOS) is a very important interface between the computer hardware and operating system (OS). The BIOS is In charge of initially setting and testing during booting the computer hardware to make sure that the hardware can work regularly. If the computer hardware works irregularly, the BIOS will inform the user of the fault. For example, it will show a fault message, e.g. the memory or hard disk malfunctions, on the screen.

Further, if the display card is not set completely, it may use a sound via the speaker to inform the user of the fault. For example, it may use a long or short sound to represent that the memory can be found. In practice, the length of the sound may have different meanings for different companies or different versions.

According to the setup menu of the BIOS, a user can press a key to execute a setting program before the operating system is booted. The user can use the setting program to set date and time, parameters of the hardware (e.g. memory), a power saving condition, some setting values of computer peripherals, and parameters of the hard disk or passwords.

Moreover, the BIOS also serves as the interface between the computer hardware and operating system. When the operating system needs to use the hardware, it will access the hardware via the BIOS. Since hardware differs between manufacturers, each manufacturer needs its own BIOS to communicate with the operating system.

so The BIOS is a program stored inside the read-only memory (ROM). It includes many basic control codes of the computer output interfaces. After the computer is turned on, the BIOS will test the system and read the setting data stored in the complementary metal-oxide semiconductor (CMOS) memory such as the size of the hard disk, whether the optical drive is available, system time, whether the video random access memory (RAM) is in use, etc. A mechanism is necessary between components, inside the central processing unit (CPU), or between two units of equipment to coordinate their simultaneous operation for normal processing of the digital signals. Nonetheless, the time spacing for accessing data is decided by the clock of the system. All digital equipment has a clock generator which continuously generates voltage lo pulses with constant time spacing. All of the components inside the equipment will be synchronized with this clock. In other words, digital equipment needs the clock for precise processing of the digital signals, in a manner analogous to the heartbeat of animals. If the clock is unstable, it will cause transmission errors of the digital signals or make the digital equipment malfunction.

Every component on the motherboard has its specific operation frequency and the proportion of the operation frequency of each bus to that of the system is usually fixed. In other words, the conventional clock generator usually uses the external frequency of the CPU as a reference frequency and divides the frequency according to a fixed proportion to generate the clock signals used for ho other peripherals.

A CPU can be overclocked i.e. run at a clock frequency not described in the specification or not supported by the CPU, such as operating a Pentium 120 (RTM) as a Pentium 133 (RTM). Moreover, since motherboards now have a gettable external frequency, a user can change the external frequency as well as the internal frequency to an abnormal value. This new type of overclocking can make the performance of the system much superior to those of the past. Even the fastest CPU can perform better in this way.

Reference is made to Fig. 1, which is a block diagram of a conventional system capable of detecting a BIOS status for clock setting. It includes a BIOS so 10, a clock generating integrated circuit (IC) 12, a CPU 14, a peripheral component interconnect (PCI) port 16, an accelerated graphic port (AGP) 18 and a double data rate (DDR) memory 20.

In use the BIOS 10 outputs the frequency setting value set by the user to the clock generating IC 12 to make it generate the frequencies necessary for the peripheral components.

Reference is made to Fig. 2, which is a block diagram of a conventional system including a clock generating IC. It includes the BIOS 10 and a clock generating IC 12 comprising a logic control circuit 120, a phaselock-loop (PLL) spread-spectrum unit 122, a crystal oscillator 124, a microprocessor frequency lo control unit 126, a PCI frequency control unit 128, an AGP frequency control unit and a DDR memory frequency control unit 132.

In use the BIOS 10 outputs the frequency setting value set by the user to the logic control circuit 120 of the clock generating IC 12. The crystal oscillator 124 of the clock generating IC 12 will generate a clock signal with a constant period and send it to the PLL spread-spectrum unit 122. Subsequently, the PLL spread-spectrum unit 122 will send the clock signal to the logic control circuit 120, microprocessor frequency control unit 126, PCI frequency control unit 128, AGP frequency control unit 130 and DDR memory frequency control unit 132.

Then, the logic control circuit 120 will generate the frequencies necessary for the no peripheral components.

At present, users usually raise the operation frequency of the CPU to obtain the best performance. Sometimes, they may raise the frequency of the CPU excessively. This causes a system to be unstable, to crash or to malfunction. In these situations, the watchdog mechanism may also be unable to work. In the worse case, the user needs to delete the data stored by CMOS components. However, this reinitializes the system and causes the user further inconvenience.

Further, after the operating system switches to the sleep mode, the host computer still needs to keep providing some power to the clock generator so as so to enable it to output the last operation frequency normally when the system is If the host computer does not maintain power to the clock generator, the BIOS will reset the operation frequency when the system is woken up. As a result there will be an increase in the required capacity of the EEPROM used to store the BIOS. At the same time, it will cause the software engineer more trouble.

Accordingly, as discussed above, the prior art still has some drawbacks that have yet to be overcome.

An object of the present invention is to overcome or alleviate at least some

of the problems in the prior art.

to The invention in its various aspects is defined in the independent claims.

In one embodiment the clock generating device is provided with a memory unit for storing a correct clock setting value of the clock generating device. If an overclocking process fails, the clock generating device will use the correct clock setting value stored in the memory unit automatically and then re-boot the computer. In this manner, crashing of the computer can be avoided. Further, after entering the sleep mode, the clock generating device doesn't need any electric power. Hence it has the advantage of power saving. When the system is woken up later, the clock generating device will also use the correct clock setting value automatically and the BIOS doesn't need to perform any process.

Hence, the booting time can be reduced.

The present invention can also save product development time since the output frequency of the clock generating device can be set freely and a user can change the output frequency according to his need. Moreover, the output frequency of the clock generating device can correspond to any output port.

Hence, the present invention can diversify the applications of the clock generating device and shorten the design time and verifying time.

Furthermore, the memory unit utilised in the present invention can be rewritable or inerasable memory. The rewritable memory can record multiple setting values and the clock generating device can be designed to choose the so best setting value automatically or be set with multiple setting value arbitrarily.

The inerasable memory can record a best setting value for reaching the best performance and it can be used to prevent the system from being counterfeited.

As described above, at least in preferred embodiments the present invention has the following advantages: s (1) In any situation of the system, the clock generating device can be programmed according to the requirements of the system.

(2) The booting time can be reduced.

(3) The number of BIOS codes can be reduced.

(4) The size of the memory unit for storing BIOS codes can be lo reduced.

(5) The burden of the software engineers can be reduced.

(6) The motherboard can be simplified.

(7) The verifying time can be shortened.

(8) The motherboard can be protected against being counterfeited.

A preferred embodiment of the invention is described below by way of example only with reference to Figs. 1 to 5 of the accompanying drawings, wherein: Fig. 1 is a block diagram of a conventional device capable of detecting a BIOS status for clock setting; ho Fig. 2 is a block diagram of a conventional clock generating IC; Fig. 3 is an internal block diagram of a clock generating IC in accordance with the present invention; Fig.4 is a flowchart of a method for clock setting in accordance with the present invention; and Fig. 5 is a flowchart of a preferred embodiment of the method for clock setting in accordance with the present invention.

Reference is made to Fig. 3, which is an internal block diagram of a clock generating IC in accordance with the present invention. It includes a BIOS 10 and a clock generating IC 22. The clock generating IC 22 further includes a logic So control unit 220, a PLL spread-spectrum unit 222, a crystal oscillator 224, a frequency control unit 226, a memory unit 228 and a detection control unit 230.

The PLL spread-spectrum unit 222 is electrically connected with the crystal oscillator 224, frequency control unit 226 and logic control unit 220. The detection control unit 230 is electrically connected with the memory unit 228 and logic control unit 220. The logic control unit 220 is electrically connected with the BIOS 10.

The memory unit 228 can be an electrically erasable programmable read only memory (EEPROM), an erasable programmable read-only memory (EPROM) or a flash memory. The detection control unit 230 can detect the signal status and the trigger signal status of the BIOS 10. The clock setting value to stored in the memory unit 228 can be a fixed value, a value set by the BIOS 10 or an operating clock value of the logic control unit 220 stored in the memory unit 228 by the detection control unit 230 when it detects that the BIOS 10 is working regularly.

Reference is made to Fig. 4, which is a flowchart of a method for clock is setting in accordance with the present invention. It includes: storing a frequency setting value able to boot the computer regularly into the memory unit (S100); detecting if the signal output from the BIOS can't be received or if an external trigger signal is produced (S102); if positive, replacing the original setting value of the memory inside the logic control unit by the frequency setting value stored in the memory unit (S104) and then finishing the auto-booting process (S106); otherwise, ending the whole process directly.

The external trigger signal is a high-voltage trigger signal or a lowvoltage trigger signal. The high or low-voltage trigger signal is provided by an external circuit, which can be a reset switch or a power switch.

2s Reference is made to Fig. 5, which is a flowchart of a preferred embodiment of the method for clock setting in accordance with the present invention. It includes: storing a frequency setting value able to boot the computer regularly into the memory unit (S200); changing the frequency setting value stored in the memory of the BIOS (S202); detecting if the signal output so from the BIOS can't be received or if an external trigger signal is produced (S204); if positive, replacing the original setting value of the memory inside the logic control unit by the frequency setting value stored in the memory unit (S206) and then finishing the auto-booting process (S208); otherwise, directly finishing the auto-booting process (S210) and then replacing the original setting value by the changed frequency setting value (S212).

As described above, the above system has the following advantages: (1) In any situation of the system, the clock generating device can be programmed according to the requirements of the system; (2) Booting time can be reduced.

(3) The number of BIOS codes can be reduced.

to (4) The size of the memory unit for storing BIOS codes can be reduced; (5) The burden of the software engineers can be reduced.

(6) The motherboard can be simplified.

(7) The verifying time can be relatively shortened.

(8) The motherboard can be protected against being counterfeited.

Although a preferred embodiment of the present invention has been described, it will be understood that the invention is not limited to the details thereof. Various substitutions and modifications have been suggested in the foregoing description, and other will occur to those of ordinary skill in the art.

ho Therefore, all such substitutions and modifications are embraced within the scope of the invention as defined in the appended claims.

Claims

CLAIMS: 1. A method for setting a clock in a clock generating circuit of a

computer motherboard according to a signal status of a basic inpuVoutput system (BIOS), the method comprising: detecting whether a signal output from the BIOS is irregular; if the signal output from the BIOS is irregular, replacing an original setting value of a memory inside a logic control unit by a frequency setting value pre stored in a memory unit; and lo finishing an auto-booting process.
2. A method for setting a clock in a clock generating circuit of a computer motherboard according to a trigger signs, the method comprising: detecting whether the trigger signal is input; replacing an original setting value of a memory inside a logic control unit by a frequency setting value pre-stored in a memory unit in response to detection of the trigger signal; and finishing an auto-booting process.
3. The method as claimed in claim 2, wherein the trigger signal is a high voltage trigger signal or a low-voltage trigger signal.
4. An arrangement for setting a clock, comprising a clock generating circuit of a computer motherboard, the arrangement comprising: a crystal oscillator; a frequency control unit; a phase-lock-loop (PLL) spreadspectrum unit electrically connected with the crystal oscillator and the frequency control unit; a memory unit having a clock setting value stored therein; so a detection control unit electrically connected with the memory unit and used to detect a signal status; and a logic control unit electrically connected with the PLL spread-spectrum unit, the frequency control unit and the detection control unit.
5. An arrangement as claimed in claim 4, wherein the memory unit is an s electrically erasable programmable read-only memory (EEPROM), an erasable programmable read-only memory (EPROM) or a flash memory.
6. An arrangement as claimed in claim 4 or claim 5, wherein the signal status detected by the detection control unit is an output signal status of a BIOS.
7. An arrangement as claimed in claim 4 or claim 5, wherein the signal status detected by the detection control unit is a trigger signal status.
8. An arrangement as claimed in any of claims 4 to 7, wherein the clock setting value stored in the memory unit is an operating clock value of the logic control unit stored in the memory unit by the detection control unit when the detection control unit detects a BIOS as working regularly.
9. An arrangement as claimed in any of claims 4 to 8, wherein the clock ho setting value stored in the memory unit is set by a BIOS.
10. An arrangement as claimed in any of claims 4 to 9, wherein the clock setting value stored in the memory unit is a fixed value.

us
11. A clock-setting arrangement substantially as described hereinabove with reference to Fig. 3 and optionally Fig. 4 or Fig. 5 of the accompanying drawings.
12. A clock-setting method substantially as described hereinabove with reference to Fig. 4 or Fig. 5 of the accompanying drawings.