JP6698467B2 - Electronic circuit system and method for starting control device - Google Patents

Description

  The present invention relates to an electronic circuit system and a method for activating a control device by loading a boot program into the control device, activating the control device by the boot program, and then loading the main program into the control device and activating the control device by the main program.

  In an electronic circuit system in which the boot program is loaded into the control device, the control device is activated by the boot program, and then the main program is loaded into the control device and the control device is activated by the main program, generally, the boot stored in the memory is used. The program is read from the memory, the read boot program is read into the control device, the control device is started by the boot program, then the main program stored in the memory is read from the memory, and the read main program is read into the control device. The main program activates the control device.

  Here, the boot program is a program that is first executed when the power is turned on or at the time of resetting (including the time of rebooting by hardware reset or software reset). A typical example of the boot program is BIOS (Basic Input Output System). The main program is a program executed next to the boot program. As the main program, typically, an operating system (OS) can be exemplified.

  A NOR flash memory or a NAND flash memory is often used as a memory for storing the boot program and the main program.

  NOR-type flash memory generally has a high cost for storage capacity (high cost per unit bit) and a small amount of data that can be written (low capacity), but has a large number of rewritable times in the memory and a memory abnormality [specific In particular, it is known that the data in the memory is highly reliable because of its characteristic that it rarely changes unintentionally (so-called garbled data, hereinafter, simply garbled data).

  On the other hand, a NAND flash memory generally has a low storage capacity cost (low cost per unit bit) and a large amount of writable data (high capacity), but has a small number of rewritable times. It is known to have low reliability due to the characteristic that there are many abnormalities (specifically, garbled bits).

  For the purpose of suppressing the cost of the memory, generally, the boot program has a low capacity and the main program has a high capacity. Therefore, the boot program is read from the NOR flash memory, and the boot program controls the controller. A method in which a main program is read from a large-capacity nonvolatile memory such as a hard disk drive (HDD: Hard Disk Drive) and the control device is started by the main program is generally used.

  For example, in Patent Document 1, a boot program is read from a randomly accessible nonvolatile memory, a control device is activated by the boot program, then a main program is read from a NAND flash memory, and the control device is activated by the main program. A method has been proposed.

  Further, in recent years, there are many methods of reducing the cost by storing the boot program and the main program in the NAND flash memory without storing the boot program in the NOR flash memory.

JP, 2005-157528, A

  However, in an electronic circuit system that uses a method of storing a boot program and a main program in a NAND flash memory, a problem such as a memory abnormality due to low reliability, which is a characteristic of the NAND flash memory, is likely to occur. There is an inconvenience that the device cannot be started normally.

  Therefore, according to the present invention, when a boot program and a main program are stored in a NAND flash memory having low reliability and the control device is activated by the boot program and the main program from the NAND flash memory, the control device is An object of the present invention is to provide an electronic circuit system and a method for starting a control device, which can surely start the control device by a boot program even when it cannot be normally started.

In order to solve the above problems, the present invention provides an electronic circuit system according to the following first and second aspects and a method for starting a control device according to the first and second aspects .

(1 -1) electronic circuit system of the first embodiment according to the electronic circuit system invention of the first aspect, the control of the main program after starting the said control device by the boot program reads the boot program to the controller An electronic circuit system that is read into a device and starts the control device by the main program, comprising: a NAND flash memory that stores the boot program and the main program; and a NOR flash memory that stores the boot program. As a normal start-up operation of the control device, the boot program and the main program stored in the NAND flash memory are used, and the network resource connected to the network can be connected via the network. , The main program is stored in the network resource, a network boot configuration for connecting to the network resource on the network is stored in the NOR flash memory, and the control device is If it is determined that it can not start successfully activates the said control device by the boot program of the boot program stored in the NOR flash memory from Loading the NOR flash memory in the control device, and by setting the network boot configuration stored in the NOR flash memory, that is configured you download the main program via said network stored in the network resource Characterize.
(1-2) Electronic Circuit System of Second Mode
In the electronic circuit system according to the second aspect of the present invention, a boot program is read into the control device, the control device is activated by the boot program, and then a main program is read into the control device and the control device is activated by the main program. An electronic circuit system to be activated, comprising: a NAND flash memory for storing the boot program and the main program; and a NOR flash memory for storing the boot program. The boot program and the main program stored in the NAND flash memory are used, the boot program and the main program are stored as recovery data in the NAND flash memory, and the NOR flash memory is stored in the NOR flash memory. , A recovery data storage address, which is an address of the recovery data stored in the NAND flash memory, is stored, and stored in the NOR flash memory when it is determined that the control device cannot start normally. The boot program stored in the NOR flash memory is read by the boot program from the NOR flash memory, and the recovery data storage address stored in the NOR flash memory is used to start the control device. The recovery data is read from the NAND flash memory, and the boot program and the main program of the read recovery data are overwritten in the storage areas of the boot program and the main program of the NAND flash memory. Is characterized by.

( 2-1 ) Starting method of control device In the starting method of the control device according to the first aspect of the present invention, a boot program is read into the control device, and the main program is started after the control device is started by the boot program. A method of starting the control device in an electronic circuit system which is loaded into a device and starts the control device by the main program, wherein a NAND type storing the boot program and the main program as a normal starting operation of the control device. Using the boot program and the main program stored in the flash memory, it is possible to connect to a network resource connected to the network via the network, and the network resource stores the main program. If the NOR flash memory storing the boot program stores a network boot configuration for connecting to the network resource on the network, and it is determined that the control device cannot start normally, Reads the boot program stored in the NOR flash memory storing the boot program into the control device, activates the control device by the boot program from the NOR flash memory , and by setting the network boot configuration stored in the flash memory, and wherein the download on the main program via said network stored in the network resource.
(2-2) Method of starting control device of second aspect
According to a second aspect of the present invention, there is provided a method for starting a control device, wherein a boot program is read into a control device, the boot device starts the control device, and then a main program is read into the control device and the main program performs the control. A method for starting the control device in an electronic circuit system for starting a device, wherein the boot program stored in a NAND flash memory storing the boot program and the main program as a normal start-up operation of the control device. The boot program and the main program are stored as recovery data in the NAND flash memory using the main program, and the NOR flash memory storing the boot program is stored in the NAND flash memory. A recovery data storage address, which is the address of the stored recovery data, is stored, and when it is determined that the control device cannot start normally, it is stored in the NOR flash memory that stores the boot program. The boot program is read into the control device, the control device is activated by the boot program from the NOR flash memory, and the NAND data is stored by the recovery data storage address stored in the NOR flash memory. The recovery data is read from the flash memory, and the boot program and the main program of the read recovery data are overwritten in the storage areas of the boot program and the main program of the NAND flash memory.

  In the present invention, the electronic circuit system includes a random access memory (RAM: Random Access Memory) and copies (writes) the main program downloaded from the network resource via the network to the random access memory. Can be illustrated.

  In the present invention, when it is determined that the control device cannot be normally started, after the control device is started by the boot program from the NOR flash memory, a memory abnormality occurs in the NAND flash memory. A mode for notifying that there is a possibility can be exemplified.

  In the present invention, the electronic circuit system is connectable to a network resource connected to a network via the network, and the network resource stores the boot program and the main program as recovery data. In the NOR flash memory, the network boot configuration of the network is stored. When it is determined that the control device cannot start normally, the network boot configuration is set to The recovery data stored in the network resource via a network is downloaded from the network resource, and the boot program and the main program of the downloaded recovery data are downloaded to the boot program and the main of the NAND flash memory. A mode in which the program storage area is overwritten can be exemplified.

  In the present invention, the boot program and the main program are stored as recovery data in the NAND flash memory, and the recovery data stored in the NAND flash memory is stored in the NOR flash memory. If the recovery data storage address, which is an address, is stored and it is determined that the control device cannot be normally started, the recovery data storage address stored in the NOR flash memory causes the NAND flash memory to It is possible to exemplify a mode in which the recovery data is read and the boot program and the main program of the read recovery data are overwritten in the storage areas of the boot program and the main program of the NAND flash memory.

  In the present invention, it is possible to exemplify a mode in which after the boot program and the main program are overwritten in the NAND flash memory, the normal boot operation is restored.

  According to the present invention, when a boot program and a main program are stored in a NAND flash memory having low reliability and the control device is activated by the boot program and the main program from the NAND flash memory, the control device operates normally. Even when the boot cannot be started, the boot program can surely start the control device.

It is a block diagram which shows the schematic structure of an example of the electronic circuit system which implements the starting method of the control apparatus which concerns on embodiment of this invention. 2 is a schematic configuration diagram showing an example of a data structure in the NAND flash memory shown in FIG. 1. FIG. FIG. 3 is a schematic configuration diagram showing an example of a data structure of a boot program in the NAND flash memory shown in FIG. 2. 3 is a flowchart showing a control example in the case where a normal starting operation of the control device is performed in the electronic circuit system shown in FIG. 1. 2 is a schematic configuration diagram showing an example of a data structure of the NOR flash memory shown in FIG. 1. FIG. 6 is a schematic configuration diagram showing an example of a data structure of a boot program in the NOR flash memory shown in FIG. 5. FIG. 3 is a flowchart showing an example of basic control in the case where an abnormal starting operation of the control device is performed in the electronic circuit system shown in FIG. It is an example of processing when the boot program cannot be read in the flowchart shown in FIG. 7. It is a schematic block diagram which shows an example of the data structure in the network resource shown in FIG. It is a schematic block diagram which shows an example of the data structure of network boot configuration. It is a flow chart which shows the example of control of the electronic circuit system concerning a 1st embodiment. 12 is a processing example when the boot program cannot be read in the flowchart shown in FIG. 11. It is a flow chart which shows the example of control of the electronic circuit system concerning a 2nd embodiment. It is an example of processing when the boot program cannot be read in the flowchart shown in FIG. FIG. 3 is a schematic configuration diagram showing an example of a data structure of recovery data in the NAND flash memory shown in FIG. 2. 6 is a schematic configuration diagram showing an example of a data structure of a boot program in the NOR flash memory shown in FIG. 5. FIG. It is a flow chart which shows the example of control of the electronic circuit system concerning a 3rd embodiment. It is a processing example when the boot program cannot be read in the flowchart shown in FIG. FIG. 11 is a front view showing an example of displaying a message indicating that a memory abnormality may occur in the NAND flash memory in the display device.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is a block diagram showing a schematic configuration of an example of an electronic circuit system 101 for implementing a method for starting a control device 102 according to an embodiment of the present invention.

  The electronic circuit system 101 shown in FIG. 1 reads the boot program BP into the control device 102, activates the control device 102 by the boot program BP, then reads the main program MP into the control device 102, and loads the control device 102 by the main program MP. It is something to start.

  Here, the boot program BP is a program that is first executed at the time of power-on or reset (including a hardware reset or a software reset restart). For example, the boot program BP is a multifunctional terminal device (specifically, Corresponds to BIOS in a computer such as a smartphone or a tablet terminal device) or a personal computer. For example, the BIOS reads an operating system (OS) at the time of starting a computer such as a multifunctional terminal device (specifically, a smartphone or a tablet type terminal device) or a personal computer, or a device or a device connected to the computer. Make basic input/output control settings.

  The main program MP is a program executed next to the boot program BP. For example, in a computer such as a multifunctional terminal device (specifically, a smartphone or a tablet terminal device) or a personal computer, an operating system (OS) is used. ) Is equivalent to.

  Specifically, the electronic circuit system 101 includes a control device 102 [SOC (System On Chip) in this example] that controls the entire electronic circuit system 101, a boot program BPna (BP), and a main program MPna (MP). A NAND type flash memory 104 for storing, a NOR type flash memory 105 for storing a boot program BPno (BP), and a random access memory 103 acting as a main memory unit [in this example, a DRAM (Dynamic Random Access Memory)]. , A boot monitoring device 106 (in this example, a boot monitoring IC: Integrated Circuit) that monitors the activation state of the control device 102.

  Here, the SOS (SOC) is one in which a predetermined function required for the operation of the electronic circuit system 101 is mounted on a single semiconductor chip. The NAND flash memory 104 is a low-reliability non-volatile memory that has a low bit unit price but has a lot of garbled bits. The NOR flash memory 105 is a highly reliable non-volatile memory that has a high bit unit price but little garbled bits. A DRAM (DRAM) is a volatile memory in which information is stored by electric charges and rewriting (refreshing) is necessary to retain the storage at regular intervals.

  The boot program BPna and the main program MPna stored in the NAND flash memory 104 are the boot program and the main program used for the normal startup operation of the control device 102. The boot program BPno stored in the NOR flash memory 105 is a boot program used when the control device 102 cannot be normally started by a normal starting operation (so-called a boot program for realizing an emergency start).

  The normal activation operation of the control device 102 is the original activation operation of the electronic circuit system 101, and is the activation operation of activating the control device 102 in a normal state.

  The control device 102 includes a RAM interface unit 107, a NAND interface unit 108, and a NOR interface unit 109.

  The RAM interface unit 107 is for communicating with the random access memory 103. The NAND interface unit 108 is for communicating with the NAND flash memory 104. The NOR interface unit 109 is for communicating with the NOR flash memory 105.

  Further, the control device 102 includes a boot state notification signal output unit 114, a boot switching signal input unit 113, an RST signal input unit 112, and a recovery notification signal output unit 111.

  The boot state notification signal output unit 114 is a boot state notification signal BASa (normal signal) or a control device indicating a normal activation of the control device 102 (activation of the control device 102 by the boot program BPna and the main program MPna in a normal activation operation). A boot status notification signal BASb (abnormal signal) indicating that the 102 cannot be normally started is output. In this example, the boot state notification signal BASa (normal signal) is a voltage signal that alternates between a high level and a low level, and the boot state notification signal BASb (abnormal signal) is a low level voltage signal. .

  When the boot switching signal (BCSna, BCSno) for selecting one of the NAND flash memory 104 and the NOR flash memory 105 is input, the boot switching signal input unit 113 receives the NAND flash memory 104 and the NOR. Which of the type flash memories 105 to select is recognized. In this example, the boot switching signal input unit 113 receives the NAND flash memory 104 when a Low-level voltage signal is input as the boot switching signal BCSna (NAND switching signal) for selecting the NAND flash memory 104. When the High level voltage signal is input as the boot switching signal BCSno (NOR switching signal) for recognizing the selection of the NOR type flash memory 105, the selection of the NOR flash memory 105 is recognized.

  When the RST signal (RSSa, RSSb) indicating the start or stop of the start of the control device 102 is input, the RST signal input unit 112 recognizes the start or stop of the start of the control device 102. In this example, when the RST signal RSSa (activation start signal) indicating the start of activation of the control device 102 is input with a voltage signal that switches from the low level to the high level, the RST signal input unit 112 activates the control device 102. When the start is recognized and a voltage signal that switches from the High level to the Low level is input as the RST signal RSSb (start stop signal) indicating the stop of the start of the controller 102, the stop of the start of the controller 102 is recognized.

  The recovery notification signal output unit 111 outputs a recovery notification signal RAS indicating the completion of recovery by the recovery data. In this example, the recovery notification signal RAS (recovery completion signal) is a voltage signal that switches from Low level to High level.

  In addition, the control device 102 has a network interface unit 110 (in this example, a network interface unit 110) for communicating with a network resource NR (a file server in this example) existing on a network NT [for example, a local area network (LAN) or the Internet]. In addition, a network interface card (Network Interface Card: NIC)] is further provided.

  The control device 102 further includes a graphic interface unit 115 that transmits display data (for example, image data) to the display device 120 that displays various display information (for example, image information) as a user interface.

  The boot monitoring device 106 includes a boot state notification signal input unit 119, a boot switching signal output unit 118, an RST signal output unit 117, and a recovery notification signal input unit 116.

  The boot state notification signal input unit 119 recognizes normal startup of the control device 102 when the boot state notification signal BASa (normal signal) is input, and controls when the boot state notification signal BASb (abnormal signal) is input. Recognize that the device 102 cannot start normally.

  The boot switching signal output unit 118 outputs a boot switching signal (BCSna, BCSno). The RST signal output unit 117 outputs RST signals (RSSa, RSSb). When the recovery notification signal RAS (recovery completion signal) is input, the recovery notification signal input unit 116 recognizes the completion of recovery by the recovery data.

  Then, the electronic circuit system 101 according to the present embodiment is configured to use the boot program BPna and the main program MPna stored in the NAND flash memory 104 as a normal startup operation of the control device 102.

  FIG. 2 is a schematic configuration diagram showing an example of the data structure in the NAND flash memory 104 shown in FIG. FIG. 3 is a schematic configuration diagram showing an example of the data structure of the boot program BPna in the NAND flash memory 104 shown in FIG.

  The boot program BPna is stored in a predetermined first storage area Rna1 (see FIG. 2) (address 0x0_0000_0000-0x0_0800_0000 in this example) of the NAND flash memory 104. The main program MPna is stored in a predetermined second storage area Rna2 (see FIG. 2) of the NAND flash memory 104 (address 0x0_1000_0000 to 0x0_A000_0000 in this example).

  A recovery data storage area RR (see FIG. 2) is provided in the NAND flash memory 104, and recovery data RDna used in the third embodiment is stored in the recovery data storage area RR. A storage area SR (see FIG. 2) is provided in the NAND flash memory 104, and various data (specifically, photograph data and music data) used by the user are stored in the storage area SR. Saved.

  The boot program BPna (see FIG. 3) in the NAND flash memory 104 includes setting information such as basic input/output control for devices and devices connected to the electronic circuit system 101 (in this example, system configuration: System). Configuration, RAM interface configuration: RAM I/F Configuration, NAND interface configuration: NAND I/F Configuration, NOR interface configuration: NOR I/F Configuration, general-purpose interface configuration: GPIO I/F Configuration, network interface configuration : NIC I/F Configuration, graphic interface configuration: GRAPHIC I/F Configuration) are stored.

  In the NAND flash memory 104, the main program storage address ADmp (see FIGS. 2 and 3), which is the address of the main program MPna (see FIG. 2) stored in the NAND flash memory 104 (specifically, FIG. 2). The start address 0x0_1000_0000) is stored. In this example, the main program storage address ADmp is included in the boot program BPno.

  FIG. 4 is a flowchart showing a control example in the case where the electronic device system 101 shown in FIG.

  As shown in FIG. 4, in the electronic circuit system 101, in the case of the normal startup operation of the control device 102, first, when the power is turned on (step S101), the boot monitoring device 106 uses the NAND flash memory as a boot device. The boot switching signal BCSna (NAND switching signal) is output from the boot switching signal output unit 118 so as to select the NAND flash memory 104 out of the 104 and the NOR flash memory 105 (step S102), and the control device 102 switches the boot switching. The boot switching signal BCSna (NAND switching signal) output from the signal output unit 118 is input (received) to the boot switching signal input unit 113 (step S103).

  Next, the boot monitoring device 106 outputs the RST signal RSSa (starting start signal) indicating the start of the activation of the control device 102 from the RST signal output unit 117 (step S104), and the control device 102 causes the RST signal output unit 117. The RST signal RSSa (starting start signal) output from is input (received) to the RST signal input unit 112 (step S105), and start-up is started.

  Next, the control device 102 causes the boot program BPna stored in the first storage area Rna1 (see FIG. 2) (address 0x0_0000_0000 to 0x0_0800_0000 in this example) in the NAND flash memory 104 to pass through the NAND interface unit 108. Is read (step S106), and the boot program BPna starts the boot process according to the read setting values (each configuration in this example) in the boot program BPna (see FIG. 3).

  Next, the control device 102, after being booted by the boot program BPna, specifies the main program storage address ADmp (see FIG. 3) stored in the NAND flash memory 104 (specifically, the start address 0x0_1000_0000), The main program MPna stored in the second storage area Rna2 (address 0x0_1000_0000 to 0x0_A000_0000 in this example) (see FIG. 2) in the NAND flash memory 104 is read via the NAND interface unit 108 (step S107) and read. The main program MPna is copied (written) to the random access memory 103 via the RAM interface unit 107 (step S108).

  Next, when the control device 102 determines that the copying of the main program MPna to the random access memory 103 is completed and the main program MPna normally starts, the boot state notification signal BASa (normal Signal) is output from the boot state notification signal output unit 114 (step S109), and the boot monitoring device 106 inputs the boot state notification signal BASa (normal signal) output from the boot state notification signal output unit 114 into the boot state notification signal. It is input (received) by the unit 119 (step S110). As a result, the boot monitoring device 106 recognizes that the control device 102 is normally activated by the main program MPna stored in the NAND flash memory 104 (step S111).

  Thus, in the electronic circuit system 101 that performs the processes of steps S101 to S111, the startup operation of the control device 102 is normally completed.

  By the way, in the electronic circuit system 101 using the method of storing the boot program BPna and the main program MPna in the NAND flash memory 104, a defect such as a memory abnormality due to low reliability which is a characteristic of the NAND flash memory 104 is likely to occur. However, in this case, there is an inconvenience that the control device 102 cannot be normally started. For example, when an abnormality occurs in the boot program BPna, the control device 102 cannot be activated by the boot program BPna.

  In this respect, the electronic circuit system 101 according to the present embodiment has the following configuration.

  FIG. 5 is a schematic configuration diagram showing an example of the data structure of the NOR flash memory 105 shown in FIG. FIG. 6 is a schematic configuration diagram showing an example of the data structure of the boot program BPno in the NOR flash memory 105 shown in FIG.

  A boot program BPno is stored in a predetermined storage area Rno (address 0x0_0000_0000 to 0x0_0800_0000 in this example) of the NOR flash memory 105 (see FIG. 5).

  Here, the boot program BPno to be stored in the NOR flash memory 105 shown in FIG. 6 is the same as the boot program BPna to be stored in the NAND flash memory 104 shown in FIG. 3, and a detailed description thereof will be given here. Is omitted. Note that the boot program BPno may have a reduced function from the boot program BPna, for example, a boot program having a minimum necessary function. Further, the NOR flash memory 105 stores the network boot configuration NCG used in the first and second embodiments.

  When the electronic circuit system 101 determines that the control device 102 cannot be normally started (specifically, the control device 102 cannot be normally started by the boot program BPna stored in the NAND flash memory 104). When it is determined), the boot program BPno stored in the NOR flash memory 105 is read into the control device 102, and the boot device BPno from the NOR flash memory 105 is used to activate the control device 102.

  Specifically, the boot monitoring device 106 determines whether or not the control device 102 cannot start normally. When the boot monitoring device 106 determines that the control device 102 cannot be normally started, the boot monitoring device 106 instructs the control device 102 to read the boot program BPno stored in the NOR flash memory 105. The control device 102 stops the activation and reads the boot program BPno stored in the NOR flash memory 105 to activate (restart) the control device 102 by the boot program BPno from the NOR flash memory 105.

  Specifically, when the boot monitoring device 106 determines that the control device 102 cannot be normally started, it transmits a boot switching signal BCSno (NOR switching signal) to the control device 102, and the control device 102 causes the boot switching device to switch. After receiving the signal BCSno (NOR switching signal), the activation is stopped and the boot program BPno using the NOR flash memory 105 is activated.

  FIG. 7 is a flowchart showing an example of basic control when the electronic circuit system 101 shown in FIG. 1 performs an abnormal starting operation of the control device 102. FIG. 8 shows an example of processing when the boot program BPna cannot be read in the flowchart shown in FIG.

  7 and 8, the processing between the processing of step S106 and the processing of step S107 in the flowchart shown in FIG. 4 will be described. The other processes are the same as those in the flowchart shown in FIG. 4, and the description thereof is omitted here.

  For example, when a memory abnormality such as a garbled bit in the NAND flash memory 104 occurs, specifically, in the NAND flash memory 104 shown in FIG. 2, a predetermined first storage area Rna1 (address 0x0_0000_0000 in this example) is stored. If the boot program BPna stored in 0x0_0800_0000) is destroyed, the boot program BPna cannot be read.

  In this regard, in the electronic circuit system 101, as shown in FIG. 7, when it is determined that the boot program BPna stored in the NAND flash memory 104 cannot be read after the process of step S106 (step S201: No). ) That is, if the control device 102 cannot be normally started by the normal start-up operation, the control device 102 sets the set value (shown in FIG. 3) in the boot program BPna stored in the NAND flash memory 104 shown in FIG. In this example, since each configuration) and the main program storage address ADmp cannot be read, a boot state notification signal BASb (abnormal signal) indicating that the control device 102 cannot start normally is output from the boot state notification signal output unit 114. Output.

  Then, as illustrated in FIG. 8, the boot monitoring device 106 inputs (receives) the boot state notification signal BASb (abnormal signal) from the boot state notification signal output unit 114 to the boot state notification signal input unit 119 (step S202). . As a result, the boot monitoring device 106 recognizes that the control device 102 cannot be normally started by the main program MPna stored in the NAND flash memory 104.

  Next, the boot monitoring device 106, after recognizing that the control device 102 cannot be normally started, outputs the RST signal RSSb (start stop signal) indicating the stop of the start of the control device 102 from the RST signal output unit 117 ( In step S203), the control device 102 inputs (receives) the RST signal RSSb (start/stop signal) output from the RST signal output unit 117 in the RST signal input unit 112 (step S204), and stops the start.

  Next, the boot monitoring device 106 outputs a boot switching signal BCSno (NOR switching signal) so as to select the NOR flash memory 105 among the NAND flash memory 104 and the NOR flash memory 105 as a boot device. The boot switch signal BCSno (NOR switch signal) output from the boot switch signal output unit 118 is input (received) to the boot switch signal input unit 113 (step S206). . As a result, the control device 102 can switch from the NAND flash memory 104 to the NOR flash memory 105 as a boot device.

  Next, the boot monitoring device 106 outputs the RST signal RSSa (starting start signal) indicating the start of the activation of the control device 102 from the RST signal output unit 117 (step S207), and the control device 102 causes the RST signal output unit 117. The RST signal RSSa (starting start signal) output from is input (received) to the RST signal input unit 112 (step S208), and start-up is started.

  Next, the control device 102 causes the boot program BPno stored in a predetermined storage area Rno (see FIG. 5) (address 0x0_0000_0000 to 0x0_0800_0000 in this example) in the NOR flash memory 105 to pass through the NOR interface unit 109. Is read (step S209), and the boot program BPno is used to execute the startup process according to the set values (each configuration in this example) in the read boot program BPno.

  Thus, in the electronic circuit system 101 that performs the above-described steps S101 to S111 and S201 to S209, when the control device 102 is activated, when the control device 102 cannot be activated normally, the boot program from the NAND flash memory 104 is used. It is possible to switch from the activation of the control device 102 by the BPna to the activation of the control device 102 by the boot program BPno from the NOR flash memory 105.

  Note that the processing subsequent to step S209 will be described in the following first to fourth embodiments.

(First embodiment)
By the way, if the main program MPna stored in the NAND flash memory 104 is normal, even if an abnormality occurs in the boot program BPna due to a failure such as a memory abnormality of the NAND flash memory 104, By activating the control device 102 with the boot program BPno from the NOR flash memory 105, the control device 102 can be activated with the main program MPna stored in the NAND flash memory 104. The startup operation of can be completed.

  However, when an abnormality occurs in the main program MPna due to a memory abnormality of the NAND flash memory 104 or the like, the control device 102 is activated by the main program MPna stored in the NAND flash memory 104. Therefore, the startup operation of the control device 102 cannot be completed. Therefore, it is desired that the startup operation of the control device 102 be completed by surely starting the control device 102 by the main program MP.

  In this respect, the electronic circuit system 101 according to the first embodiment can be connected to the network resource NR (see FIG. 1) connected to the network NT (see FIG. 1) (LAN in this example) via the network NT. ing.

  Here, the network resource NR is a resource connected to the network NT and available in the network NT. A typical example of the network resource NR is a file server. The network resource NR is a file server in this example. This also applies to the second embodiment described later.

  FIG. 9 is a schematic configuration diagram showing an example of a data structure in the network resource NR shown in FIG.

  A main program MPnr(MP) is stored in the network resource NR shown in FIG.

  Here, the main program MPnr to be stored in the network resource NR shown in FIG. 9 is the same as the main program MPna to be stored in the NAND flash memory 104 shown in FIG. 2, and the description thereof is omitted here. .. Note that the main program MPnr may have a reduced function from the main program MPna, for example, may have a minimum required function as the main program. Further, recovery data RDnr used in the second embodiment is stored in the network resource NR.

  Specifically, the network resource NR stores the main program MPnr to which the file name of the main program MPnr (MainProgram.bin in this example) is added.

  The NOR flash memory 105 shown in FIG. 6 stores a network boot configuration NCG for connecting to the network resource NR on the network NT. In this example, the network boot configuration NCG is included in the boot program BPno. Here, the network boot configuration NCG is various settings (for example, setting of network identification information such as an IP address) for connecting to the network NT. This also applies to the second embodiment described later.

  FIG. 10 is a schematic configuration diagram showing an example of the data structure of the network boot configuration NCG.

  In the network boot configuration NCG shown in FIG. 10, the network identification information of the electronic circuit system 101 (specifically the IP address, 192.168.0.5 in this example) and the network identification information of the network resource NR (specifically Specifically, the IP address, 192.168.0.10 in this example, and the file name of the main program MPnr (MainProgram.bin in this example) are stored.

  Then, when the control device 102 determines that the control device 102 cannot be normally started, the control device 102 sets the network boot configuration NCG (see FIG. 10) stored in the NOR flash memory 105, and thereby the network NT The main program MPnr (see FIG. 9) stored in the network resource NR (see FIG. 1) is downloaded via the.

  Specifically, the boot monitoring device 106 determines whether or not the control device 102 cannot start normally. When the boot monitoring device 106 determines that the control device 102 cannot be normally started, the boot monitoring device 106 instructs the control device 102 to read the main program MPnr stored in the network resource NR. The control device 102 sets the network boot configuration NCG stored in the NOR flash memory 105, establishes communication with the network resource NR connected to the network NT, and the network resource NR via the network NT. The main program MPnr stored in is downloaded from the network resource NR.

  Moreover, the electronic circuit system 101 according to the first embodiment includes a random access memory 103 (see FIG. 1).

  Here, the random access memory 103 is a memory device capable of performing operations such as reading and writing at arbitrary positions. A typical example of the random access memory is a DRAM. In this example, the random access memory 103 is a DRAM.

  Then, the electronic circuit system 101 copies (writes) the main program MPnr downloaded from the network resource NR via the network NT to the random access memory 103.

  More specifically, the control device 102 copies the main program MPnr downloaded from the network resource NR via the network NT to the random access memory 103, and reads the copied main program MPnr so that the main program MPnr from the network resource NR uses the main program MPnr. The control device 102 is activated.

  FIG. 11 is a flowchart showing a control example of the electronic circuit system 101 according to the first embodiment. FIG. 12 is a processing example when the boot program BPna cannot be read in the flowchart shown in FIG.

  The flowcharts shown in FIGS. 11 and 12 are obtained by adding the processes of steps S210 to S213 according to the first embodiment to the flowcharts shown in FIGS. 7 and 8, and the others are the same as those shown in FIGS. It is the same. In the flowcharts shown in FIGS. 11 and 12, substantially the same processes as those in the flowcharts shown in FIGS. 7 and 8 are designated by the same reference numerals, and the following description will focus on the points different from the flowcharts shown in FIGS. 7 and 8. To do.

  For example, when a memory abnormality such as a garbled bit of the NAND flash memory 104 occurs, specifically, in the NAND flash memory 104 shown in FIG. 2, a predetermined second storage area Rna2 (address 0x0_1000_0000 in this example). If the main program MPna stored in 0x0_A000_0000) is destroyed, the main program MPna cannot be read.

  In this respect, in the electronic circuit system 101, as shown in FIG. 12, the control device 102 executes the boot program BPno (see FIG. 6) stored in the NOR flash memory 105 (see FIG. 5) in the process of step S209. , Via the NOR interface unit 109 (step S209), the boot program BPno starts the boot process according to the read set values (each configuration in this example) in the boot program BPno (see FIG. 6).

  Next, the control device 102 uses the network identification information of the communication source on the network NT (see FIG. 1) of the electronic circuit system 101 as the network boot configuration NCG in the boot program BPno read from the NOR flash memory 105 (this example Then, the IP address (192.168.0.5)] is set and the network identification information of the network resource NR (see FIG. 1) of the communication destination that stores the main program MPnr [IP address (192 in this example) .168.0.10)] is set (step S210). As a result, the electronic circuit system 101 can communicate with the network resource NR via the network interface unit 110.

  Next, the control device 102 uses the network boot configuration NCG (see FIG. 10) read from the NOR flash memory 105 to find the file name of the main program MPnr (MainProgram.bin in this example) stored in the network resource NR. To request the main program MPnr (see FIG. 9) from the network resource NR (step S211). As a result, the electronic circuit system 101 can download the main program MPnr stored in the network resource NR from the network resource NR.

  Next, the network resource NR provides the main program MPnr to the control device 102 (step S212).

  Next, the control device 102 downloads the main program MPnr stored in the network resource NR from the network resource NR via the network interface unit 110 (step S213). Thereafter, the processing of the electronic circuit system 101 returns to step S108 shown in FIG.

  It should be noted that after the processing of step S209, the process proceeds to step S107, and instead of or in addition to the processing of steps S210 to S213 described above, a “NAND flash memory 104 is added between the processing of step S107 and the processing of step S108. In the case where the main program MPna stored in the NAND flash memory 104 cannot be read by providing "processing for determining whether or not the stored main program MPna has been read" and "processing of steps S209 to S213" Alternatively, the processes of steps S209 to S213 may be performed.

(Second embodiment)
By the way, when the control device 102 cannot be started normally, it is not possible to identify the defective portion, and it is not possible to determine whether the abnormality is on the power supply side (for example, a circuit abnormality in the power supply circuit system) or the NAND flash memory 104. Also, the NAND flash memory 104 in which a defect such as a memory abnormality has occurred cannot be self-repaired.

  In this regard, even if the control device 102 cannot be normally started, if the boot program BP and the main program MP, which are regarded as normal, are overwritten in the storage areas of the boot program BPna and the main program MPna of the NAND flash memory 104, Even if a defect such as a memory abnormality occurs in at least one of the boot program BPna and the main program MPna, the defect may be resolved and the boot program BPna and the main program MPna may be restored. Therefore, it is desired to restore the boot program BPna and the main program MPna of the NAND flash memory 104.

  In this respect, the electronic circuit system 101 according to the second embodiment can be connected to the network resource NR (see FIG. 1) connected to the network NT (see FIG. 1) (LAN in this example) via the network NT. ing.

  In the network resource NR shown in FIG. 9, a boot program BPnrr(BP) and a main program MPnrr(MP) are stored as recovery data RDnr.

  Specifically, the network resource NR stores a boot program BPnrr and a main program MPnrr to which the file name of the recovery data RDnr (Recovery.bin in this example) is added.

  Here, the boot program BPnrr of the recovery data RDnr to be stored in the network resource NR shown in FIG. 9 is the same as the boot program BPna to be stored in the NAND flash memory 104 shown in FIG. 3, and here, The description is omitted. The main program MPnrr of the recovery data RDnr to be stored in the network resource NR shown in FIG. 9 is the same as the main program MPna to be stored in the NAND flash memory 104 shown in FIG.

  The NOR flash memory 105 (see FIG. 6) stores a network boot configuration NCG for connecting to the network resource NR on the network NT. The network boot configuration NCG (see FIG. 10) includes the file name (Recovery.bin in this example) of the recovery data RDnr.

  When the control device 102 determines that the control device 102 cannot be normally started (specifically, the boot program BPna stored in the NAND flash memory 104 or the boot program BPna stored in the NAND flash memory 104 is stored). When it is determined that the control device 102 cannot be normally started by the main program MPna), the recovery data RDnr stored in the network resource NR via the network NT is set by setting the network boot configuration NCG. The boot program BPnrr and the main program MPnrr of the recovery data RDnr downloaded from the resource NR are overwritten in the storage areas of the boot program BPna and the main program MPna of the NAND flash memory 104.

  Specifically, the boot monitoring device 106 determines whether or not the control device 102 cannot start normally. When the boot monitoring device 106 determines that the control device 102 cannot be normally started, the boot monitoring device 106 instructs the control device 102 to read the recovery data RDnr stored in the network resource NR. The control device 102 sets the network boot configuration NCG stored in the NOR flash memory 105, establishes communication with the network resource NR connected to the network NT, and the network resource NR via the network NT. The recovery data RDnr stored in is downloaded from the network resource NR.

  Further, the electronic circuit system 101 according to the second embodiment restores the normal boot operation after the NAND flash memory 104 is overwritten with the boot program BPnrr and the main program MPnrr.

  Specifically, after the boot program BPnrr and the main program MPnrr are overwritten on the NAND flash memory 104 (recovery of the NAND flash memory 104), the control device 102 causes the recovery notification signal RAS indicating completion of recovery of the NAND flash memory 104. The (recovery completion signal) is transmitted to the boot monitoring device 106, and the boot monitoring device 106 instructs the control device 102 to read the boot program BPna stored in the NAND flash memory 104. The control device 102 activates (restarts) the control device 102 by the boot program BPna from the NAND flash memory 104 by reading the boot program BPna stored in the NAND flash memory 104.

  Specifically, the boot monitoring device 106 receives the recovery notification signal RAS (recovery completion signal), transmits a boot switching signal BCSna (NAND switching signal) to the control device 102, and the control device 102 causes the boot switching signal BCSna. After receiving the (NAND switching signal), the activation is stopped and the boot program BPna using the NAND flash memory 104 is normally activated.

  FIG. 13 is a flowchart showing a control example of the electronic circuit system 101 according to the second embodiment. FIG. 14 is a processing example when the boot program BPna cannot be read in the flowchart shown in FIG. In this example, a case will be described in which the control device 102 cannot be normally started by the boot program BPna stored in the NAND flash memory 104.

  The flowcharts shown in FIGS. 13 and 14 are different from the flowcharts shown in FIGS. 11 and 12 in that steps S214 to S220 are replaced with steps S214 to S220, and the return destination after the step S220 is changed to step S102. Others are the same as the flowcharts shown in FIGS. 11 and 12. In the flowcharts shown in FIGS. 13 and 14, substantially the same processes as those in the flowcharts shown in FIGS. 11 and 12 are designated by the same reference numerals, and the following description will focus on points different from the flowcharts shown in FIGS. 11 and 12. To do.

  For example, when a memory abnormality such as a garbled bit of the NAND flash memory 104 occurs, specifically, in the NAND flash memory 104 shown in FIG. 2, a predetermined first storage area Rna1 (address 0x0_0000_0000 in this example) is specified. ~0x0_0800_0000) and at least one of the main programs MPna stored in a predetermined second storage area Rna2 (in this example, address 0x0_1000_0000 to 0x0_A000_0000) is normal even if it is destroyed. By overwriting the boot program BP and the main program MP, which are considered, in the storage areas of the boot program BPna and the main program MPna of the NAND flash memory 104, the boot program BPna and the main program MPna can be reliably read.

  In this regard, in the electronic circuit system 101, as shown in FIG. 14, the control device 102 uses the network boot configuration NCG (see FIG. 10) read from the NOR flash memory 105 after the process of step S210 to obtain network resources. The file name (Recovery.bin in this example) of the recovery data RDnr stored in the NR is specified, and the network program NR is requested to the boot program BPnrr and the main program MPnrr of the recovery data RDnr (step S214). As a result, the electronic circuit system 101 can download the boot program BPnrr and the main program MPnrr of the recovery data RDnr stored in the network resource NR from the network resource NR.

  Next, the network resource NR provides the boot program BPnrr and the main program MPnrr of the recovery data RDnr to the control device 102 (step S215).

  Next, the control device 102 downloads the boot program BPnrr and the main program MPnrr of the recovery data RDnr stored in the network resource NR from the network resource NR via the network interface unit 110 and boots the NAND flash memory 104. A predetermined storage area (address 0x0_0000_0000 to 0x1_0000_0000 in this example) of the program BPna and the main program MPna (see FIG. 2) is overwritten via the NAND interface unit 108 (see FIG. 1) (step S216).

  Next, the control device 102 outputs a recovery notification signal RAS (recovery completion signal) indicating the completion of recovery of the NAND flash memory 104 from the recovery notification signal output unit 111 (step S217), and recovers the NAND flash memory 104. The boot monitoring device 106 is notified that the (recovery data RDnr overwrites the NAND flash memory 104) is completed.

  Next, when the boot notification device 106 inputs (receives) the recovery notification signal RAS (recovery completion signal) output from the recovery notification signal output unit 111 to the recovery notification signal input unit 116 (step S218), the boot monitoring device 106 of the control device 102 The RST signal output section 117 outputs the RST signal RSSb (start stop signal) indicating the stop of the start (step S219).

  Next, when the control device 102 inputs (receives) the RST signal RSSb (start/stop signal) output from the RST signal output unit 117 to the RST signal input unit 112 (step S220), all processing is stopped and controlled. The activation of the device 102 is stopped. Thereafter, the processing of the electronic circuit system 101 returns to step S102 shown in FIG.

  Instead of or in addition to the processing of steps S214 to S220 described above, "whether the main program MPna stored in the NAND flash memory 104 has been read is determined between the processing of step S107 and the processing of step S108. If the main program MPna stored in the NAND flash memory 104 cannot be read by providing "determination processing" and "processing of steps S209, S210, and S214 to S220", steps S209, S210, and S214 to You may make it perform the process of S220.

  Further, the configuration of the electronic circuit system 101 according to the first embodiment and the configuration of the electronic circuit system 101 according to the second embodiment are combined and stored in the network resource NR in the configuration of the electronic circuit system 101 according to the first embodiment. The recovery process may be performed in the configuration of the electronic circuit system 101 according to the second embodiment when the control device 102 based on the stored main program MPnr cannot be normally started.

(Third Embodiment)
Further, in the electronic circuit system 101 according to the third embodiment, the recovery data RDna is stored in the NAND flash memory 104 shown in FIG.

  FIG. 15 is a schematic configuration diagram showing an example of the data structure of the recovery data RDna in the NAND flash memory 104 shown in FIG.

  Here, the boot program BPnar of the recovery data RDna to be stored in the NAND flash memory 104 shown in FIG. 15 is the same as the boot program BPna to be stored in the NAND flash memory 104 shown in FIG. Then, the description is omitted. The main program MPnar of the recovery data RDna to be stored in the NAND flash memory 104 shown in FIG. 15 is the same as the main program MPna to be stored in the NAND flash memory 104 shown in FIG.

  FIG. 16 is a schematic configuration diagram showing an example of the data structure of the boot program BPno in the NOR flash memory 105 shown in FIG.

  In the NOR flash memory 105 shown in FIG. 16, the recovery data RDna( stored in the NAND flash memory 104 instead of or in addition to the network boot configuration NCG (see FIG. 6) (in this example). The recovery data storage address ADrd (see FIGS. 2 and 16) (specifically, the start address 0x2_0000_0000), which is the address of FIG. 2), is stored. In this example, the recovery data storage address ADrd is included in the boot program BPno.

  When the control device 102 determines that the control device 102 cannot be normally started (specifically, the boot program BPna stored in the NAND flash memory 104 or the boot program BPna stored in the NAND flash memory 104 is stored). When it is determined that the control device 102 cannot be normally started by the main program MPna), the recovery data RDna is read from the NAND flash memory 104 by the recovery data storage address ADrd stored in the NOR flash memory 105 and read. The boot program BPnar and the main program MPnar of the recovery data RDna are overwritten in the storage areas of the boot program BPna and the main program MPna of the NAND flash memory 104.

  Specifically, the boot monitoring device 106 determines whether or not the control device 102 cannot start normally. If the boot monitoring device 106 determines that the control device 102 cannot be normally started, the boot monitoring device 106 instructs the control device 102 to read the recovery data RDna stored in the NAND flash memory 104. The control device 102 sets the recovery data storage address ADrd stored in the NOR flash memory 105, and reads the recovery data RDna stored in the NAND flash memory 104.

  Further, the electronic circuit system 101 according to the third embodiment restores the normal boot operation after overwriting the boot program BPnar and the main program MPnar in the NAND flash memory 104.

  Specifically, after the boot program BPnrr and the main program MPnrr are overwritten on the NAND flash memory 104, the control device 102 sends a recovery notification signal RAS (recovery completion signal) indicating the completion of recovery of the NAND flash memory 104 to the boot monitoring device. Then, the boot monitoring device 106 instructs the control device 102 to read the boot program BPna stored in the NAND flash memory 104. The control device 102 activates (restarts) the control device 102 by the boot program BPna from the NAND flash memory 104 by reading the boot program BPna stored in the NAND flash memory 104.

  FIG. 17 is a flowchart showing a control example of the electronic circuit system 101 according to the third embodiment. FIG. 18 is a processing example when the boot program BPna cannot be read in the flowchart shown in FIG. In this example, a case will be described in which the control device 102 cannot be normally started by the boot program BPna stored in the NAND flash memory 104.

  The flowcharts shown in FIGS. 17 and 18 are obtained by providing the processes of steps S221 and S222 in place of the processes of steps S210, S214, and S215 in the flowcharts shown in FIGS. It is similar to the flowchart shown in FIG. In the flowcharts shown in FIGS. 17 and 18, substantially the same processes as those in the flowcharts shown in FIGS. 13 and 14 are designated by the same reference numerals, and the following description will focus on the points different from the flowcharts shown in FIGS. 13 and 14. To do.

  In the electronic circuit system 101, as shown in FIG. 18, after the process of step S209, the control device 102 recovers the recovery data storage address ADrd in the boot program BPno stored in the NOR flash memory 105 (see FIG. 6). (0x2_0000_0000 in this example) is read via the NOR interface unit 109 (step S221).

  Next, the control device 102 sets the boot program BPnar and the main program MPnar (see FIG. 15) of the recovery data RDna stored in the NAND flash memory 104 (see FIG. 2) at the read recovery data storage address ADrd to the NAND It is read from the NAND flash memory 104 via the interface unit 108 (step S222), and the NAND interface unit 108 is stored in a predetermined storage area (address 0x0_0000_0000-0x1_0000_0000 in this example) of the boot program BPna and the main program MPna of the NAND flash memory 104. (See FIG. 1) via the overwriting (step S216).

  Instead of or in addition to the above-described processing of steps S221, S222, S216 to S220, "the main program MPna stored in the NAND flash memory 104 is read between the processing of step S107 and the processing of step S108. If the main program MPna stored in the NAND flash memory 104 cannot be read, the process of determining whether the main program MPna is read and the process of steps S209, S221, S222, and S216 to S220 are provided. You may make it perform the process of S209, S221, S222, S216-S220.

  Further, the configuration of the electronic circuit system 101 according to the first embodiment and the configuration of the electronic circuit system 101 according to the third embodiment are combined and stored in the network resource NR in the configuration of the electronic circuit system 101 according to the first embodiment. The recovery process may be performed in the configuration of the electronic circuit system 101 according to the third embodiment when the control device 102 based on the stored main program MPnr cannot be normally started.

  Further, by combining the configuration of the electronic circuit system 101 according to the second embodiment and the configuration of the electronic circuit system 101 according to the third embodiment, the configuration of the electronic circuit system 101 according to the second embodiment and the configuration of the third embodiment can be realized. If the recovery process fails in one of the configurations of the electronic circuit system 101, the recovery process may be performed in the other configuration.

(Fourth Embodiment)
In the electronic circuit system 101 according to the fourth embodiment, the electronic circuit system 101 according to the fourth embodiment boots from the NOR flash memory 105 when it is determined that the control device 102 cannot normally start. After the control device 102 is activated by the program BPno, it is notified that a memory abnormality may occur in the NAND flash memory 104.

  Here, as a mode of notifying that there is a possibility that a memory abnormality has occurred in the NAND flash memory 104, for example, it is indicated that there is a possibility that a memory abnormality has occurred in the NAND flash memory 104. A mode in which a message is displayed on the display device 120 (see FIG. 1), an alarm sound and/or a voice indicating that a memory abnormality may occur in the NAND flash memory 104 is output from an alarm device (not shown). The aspect which emits, and the aspect which combined these aspects can be illustrated.

  FIG. 19 is a front view showing an example of displaying a message indicating that a memory abnormality may occur in the NAND flash memory 104 in the display device 120.

  As shown in FIG. 19, when it is determined that the control device 102 cannot be normally activated, after the control device 102 is activated by the boot program BPno from the NOR flash memory 105, the main program MPnr from the network resource NR and It is possible that a memory abnormality has occurred in the NAND flash memory 104 after the control device 102 is activated by the main program (MPnrr, MPnar) of the recovery data (RDnr, RDna) (for example, “NAND flash memory "There is a possibility that a memory error may have occurred." is displayed.

  In the electronic circuit system 101 according to the fourth embodiment, for example, the flowchart of the first embodiment shown in FIGS. 11 and 12, the flowchart of the second embodiment shown in FIGS. 13 and 14, and FIGS. After the processing of step S111 in the flowchart of the third embodiment shown, the control device 102 displays a message indicating that a memory abnormality may occur in the NAND flash memory 104 [in this example, the "NAND flash memory Message (see FIG. 19)]”, which is a message indicating which boot device of the network resource NR and the NAND flash memory 104 has booted the control device 102 [specifically. Specifically, in the case of the first embodiment or the second embodiment, it may be displayed on the display device 120 (see FIG. 19) together with the message “Started by network boot.” (see FIG. 19)]. it can.

(Other embodiments)
-Control device-
In the first to fourth embodiments, the control device 102 is the SOC, but the control device 102 is not limited to the SOC. For example, the control device 102 may be configured by a Microprocessor such as an arithmetic processing unit (CPU: Central Processing Unit).

-Random access memory-
In addition, in the first to fourth embodiments, the random access memory 103 is a DRAM, but it is not limited to DRAM. For example, the random access memory 103 may be configured with a memory device such as a ferroelectric memory (FeRAM: Ferroelectric Random Access Memory) or a static RAM (SRAM: Static Random Access Memory).

-Direct memory access-
In the first to fourth embodiments, the operation of copying the main program MPna stored in the NAND flash memory 104 to the random access memory 103 is performed via the control device 102. (DMA: Direct Memory Access) control may be performed.

-Error correction-
Further, in the first to fourth embodiments, error detection and correction (in the operation of automatically recovering the network resource NR and/or the recovery data (RDnr, RDna) stored in the NAND flash memory 104 by copying ( An error correction operation using an error correction function such as ECC (Error Check and Correct) may be performed.

-Compression/decompression processing-
In the first to fourth embodiments, the main program (MPnr, MPna) and/or the main program (RDnr, RDna) of the network resource NR and/or the main program (RDnr, RDna) stored in the NAND flash memory 104 ( MPnrr, MPnar), compression processing for reducing the amount of data to be stored and decompression processing for restoring compressed data to original data may be performed.

-Incorporating the startup monitoring operation into the control device-
Further, in the first to fourth embodiments, the boot monitoring device 106 is configured as a separate component from the control device 102 to perform the startup monitoring operation, but the function of the boot monitoring device 106 is incorporated (booting). The controller 102 (incorporating the monitoring device 106) (for example, SOC) may be used to perform the startup monitoring operation. That is, the activation monitoring operation may be performed by a part of the function of the control device 102. As the control device 102, a programmable logic device (PLD) can be exemplified, and typically, a complex programmable logic device (CPLD) and a field programmable gate array (FPGA) are typically used. Can be mentioned.

-Incorporation of NOR flash memory into control device-
In the first to fourth embodiments, the NOR flash memory 105 is provided as a separate component from the control device 102, and the boot program BPno is stored in the NOR flash memory 105. The boot program BPno may be stored in the NOR flash memory 105 in the control device 102 by using the control device 102 (for example, SOC) in which 105 is incorporated. That is, the NOR flash memory 105 may be provided in a part of the control device 102.

-Incorporation of NAND flash memory into control device-
Further, in the first to fourth embodiments, the NAND flash memory 104 is provided as a separate component from the control device 102, and the boot program BPna, the main program MPna, the recovery data RDna, etc. are stored in the NAND flash memory 104. However, the boot program BPna, the main program MPna, the recovery data RDna, etc. are stored in the NAND flash memory 104 in the control device 102 by using the control device 102 (for example, SOC) incorporating the NAND flash memory 104. May be. That is, the NAND flash memory 104 may exist in a part of the control device 102.

-Boot status notification signal-
Further, in the first to fourth embodiments, the boot state notification signal BASa (normal signal) indicating the normal activation of the control device 102 is a voltage signal that alternately switches between a high level and a low level, but is not limited thereto. It is not something that will be done. For example, by setting the boot state notification signal BASa (normal signal) as a voltage signal that is changed from the High level to the Low level, or by using a voltage signal that is changed from the Low level to the High level, the control device 102. The normal startup of may be recognized. In other words, the boot state notification signal BASa (normal signal) can be a signal in which there is a change in the signal state in which it can be recognized whether or not the control device 102 is normally started.

-RST signal-
In addition, in the first to fourth embodiments, the RST signal RSSa (starting start signal) indicating the start of starting the control device 102 is a voltage signal that switches from the low level to the high level, and the start of the control device 102 is stopped. Although the RST signal RSSb (start/stop signal) shown is a voltage signal that switches from the high level to the level low, the present invention is not limited to this. For example, the RST signal RSSa (starting start signal) may be a voltage signal that switches from a high level to a low level, and the RST signal RSSb (starting stop signal) may be a voltage signal that switches from a low level to a high level. The signal may be such that the start timing and the stop timing of the activation of the control device 102 become clear by the change.

-Recovery notification signal-
Further, in the first to fourth embodiments, the recovery notification signal RAS (recovery completion signal) indicating the completion of the recovery by the recovery data (RDnr, RDna) is the voltage signal that switches from the Low level to the High level. It is not limited. For example, the recovery notification signal RAS (recovery completion signal) may be a voltage signal that switches from the high level to the low level, or a signal such that the completion timing of the recovery of the NAND flash memory 104 becomes clear due to changes in other signal levels. May be

-Limit on the number of reads-
Further, in the second to fourth embodiments, the recovery operation of overwriting the boot program (BPnrr, BPnar) and the main program (MPnrr, MPnar) of the recovery data (RDnr, RDna) in the NAND flash memory 104 is performed. When the boot program BPna cannot be read more than a predetermined number of times due to an abnormality that cannot repair the flash memory 104 (recover the boot program BPna and the main program MPna), for example, an alarm device provided separately Is a warning indicating that there is a possibility that the NAND flash memory 104 cannot be repaired by a sound source generation device such as a speaker or a lighting device such as a light emitting element (eg, LED: Light Emitting Diode) (specifically, Voice, warning sound, or lighting of light) may be notified to stop the recovery operation.

  For example, in the flowcharts shown in FIGS. 13 and 14 and FIGS. 17 and 18, between the process of “No” in step S201 and the process of step S202, “the process of counting the number of times of reading” and “the number of times of reading is predetermined. If the number of readings is less than a predetermined number, the process proceeds to step S202, while if the number of readings is more than the predetermined number, a NAND flash is provided. An alarm indicating that there is a possibility that an unrecoverable abnormality of the memory 104 has occurred may be issued from the alarm device and the processing may be ended.

-Limit on the number of communication errors-
In addition, the first embodiment, the second embodiment, and the fourth embodiment that perform a download operation of downloading the main program MPnr, the boot program BPnrr of the recovery data RDnr, and the main program MPnrr by communicating with the network resource NR via the network NT. In the mode, when communication cannot be performed more than a predetermined number of times due to occurrence of a communication error with the network resource NR, for example, a separately provided alarm device (specifically, a sound source generation device such as a speaker or a light emitting element (for example, a speaker) is provided. LED: Lighting device such as Light Emitting Diode)] is used to notify an alarm (specifically, voice, alarm sound, or light is turned on) indicating that a communication error with the network resource NR may occur. The download operation may be stopped.

  For example, in the flowcharts shown in FIGS. 11 and 12 and FIGS. 13 and 14, between the process of step S211 (see FIG. 12) and the process of step S212 (see FIG. 12) and the process of step S214 (see FIG. 14). Between the processing of step S215 and the processing of step S215 (see FIG. 14), a "processing for counting the number of communication errors" and a "processing for determining whether or not the number of communication errors has reached a predetermined number or more" are provided. If the number of times is less than the predetermined number of times, the process proceeds to steps S212 and S215, while if the number of communication errors is more than the predetermined number of times, it is possible that a communication error with the network resource NR has occurred. The alarm can be issued from the alarm device and the processing can be ended.

-Specific description-
In the first to fourth embodiments, the IP address, the file name, the address indicating the storage area of the NAND flash memory 104, the address indicating the storage area of the NOR flash memory 105, the data size of various data, etc. Although specifically described, it goes without saying that the present invention is not limited to these items, and needless to say, these items are optional.

(About this Embodiment)
According to the present embodiment, when it is determined that the control device 102 cannot be normally started, the boot program BPno stored in the NOR flash memory 105 is read into the control device 102, and the boot program BPno is read from the NOR flash memory 105. Since the control device 102 is activated by the boot program BPno, even if the control device 102 cannot be activated normally even when a problem such as a memory abnormality due to the low reliability which is a characteristic of the NAND flash memory 104 occurs. The control device 102 can be activated by the boot program BPno from the NOR flash memory 105 having high reliability. As a result, even when the control device 102 cannot be normally started by the boot program BPna stored in the NAND flash memory 104, the control device 102 is started by the boot program BPno stored in the NOR flash memory 105. Can be reliably performed. In this case, if the main program MPna stored in the NAND flash memory 104 is normal, the control device 102 can be normally started by the main program MP stored in the NAND flash memory 104. The startup operation of 102 can be completed.

  Note that it is also possible to construct an electronic circuit system similar to this embodiment by using a NAND flash memory instead of the NOR flash memory 105 (that is, by using two high-capacity NAND flash memories). However, as compared with the case where two high capacity NAND flash memories are used, this embodiment uses one high capacity NAND flash memory 104 and one low capacity NOR flash memory 105. The electronic circuit system 101 according to the present invention can realize cost reduction. Furthermore, since the NOR flash memory 105 has a low possibility of memory abnormality (specifically, garbled bit), it is possible to improve the reliability of the electronic circuit system 101 when used in an emergency.

  Further, in this embodiment, when it is determined that the control device 102 cannot be normally started by the main program MPna stored in the NAND flash memory 104, the network boot configuration stored in the NOR flash memory 105 is used. By setting the connection NCG to download the main program MPnr stored in the network resource NR via the network NT, the main program MPna can be stored in the main program MPna even when a malfunction such as a memory abnormality of the NAND flash memory 104 occurs. Even if an abnormality occurs, the control device 102 can be activated by the main program MPnr from the network resource NR via the network NT. Accordingly, even when the control device 102 cannot be normally started by the main program MPna stored in the NAND flash memory 104, the control device 102 is surely started by the main program MPnr stored in the network resource NR. Can be made. Therefore, the control device 102 can be normally started up by the main program MPnr stored in the network resource NR, and the startup operation of the control device 102 can be surely completed.

  Further, in the present embodiment, by copying the main program MPnr downloaded from the network resource NR via the network NT to the random access memory 103, the main program MPnr can be accurately copied to the random access memory 103. . As a result, the control device 102 can be more reliably activated by the main program MPnr stored in the network resource NR.

  Further, in the present embodiment, when it is determined that the control device 102 cannot be normally activated, after the control device 102 is activated by the boot program BPno from the NOR flash memory 105, a memory abnormality is detected in the NAND flash memory 104. By notifying that there is a possibility of occurrence, it is possible to make the operator effectively recognize that a memory abnormality may have occurred in the NAND flash memory 104.

  Further, in the present embodiment, when it is determined that the control device 102 cannot start normally, the recovery data stored in the network resource NR via the network NT is set by setting the network boot configuration NCG. By downloading RDnr from the network resource NR and overwriting the boot program BPnrr and the main program MPnrr of the downloaded recovery data RDnr in the storage areas of the boot program BPna and the main program MPna of the NAND flash memory 104, the control device 102 can operate normally. If the boot program BPnrr and the main program MPnrr of the recovery data RDnr, which is considered to be normal from the network resource NR, cannot be started up, the NAND flash memory 104 can be reliably overwritten. Thus, even if at least one of the boot program BPna and the main program MPna has a defect such as a memory abnormality, the defect can be resolved and the boot program BPna and the main program MPna can be automatically restored.

  Further, in the present embodiment, when it is determined that the control device 102 cannot be normally started, the recovery data RDna is read from the NAND flash memory 104 by the recovery data storage address ADrd stored in the NOR flash memory 105. When the control device 102 cannot be normally started by overwriting the boot program BPnar and the main program MPnar of the read recovery data RDna into the storage areas of the boot program BPna and the main program MPna of the NAND flash memory 104, It is possible to reliably overwrite the boot program BPnar and the main program MPnar of the recovery data RDna that is regarded as normal from the flash memory 104 in the NAND flash memory 104. Thus, even if at least one of the boot program BPna and the main program MPna has a defect such as a memory abnormality, the defect can be resolved and the boot program BPna and the main program MPna can be automatically restored.

  In addition, in the present embodiment, after the boot program (BPnrr, BPnar) and the main program (MPnrr, MPnar) are overwritten in the NAND flash memory 104, the normal startup operation is resumed, so that the NAND flash memory 104 is restored. After overwriting the boot program (BPnrr, BPnar) and the main program (MPnrr, MPnar), the boot program BPna and the main program MPna that are considered to be normal can be read from the NAND flash memory 104 into the control device 102. As a result, the control device 102 can be activated by a normal activation operation of the control device 102 using the NAND flash memory 104.

  Note that the present invention is applicable to a multifunctional terminal device (specifically, a smartphone or a tablet type terminal device), a computer such as a personal computer, or the like, after the boot program is read into the control device and the control device is activated by the boot program. Any one may be used as long as it is used in an electronic circuit system that loads the main program into the control device and activates the control device by the main program. For example, the present invention is applicable to, but not limited to, an image forming apparatus such as a copying machine, a multifunction peripheral, a printer, and a facsimile machine, and an electric device such as a household electric device such as a washing machine, a refrigerator, a microwave oven, and an air conditioner. can do.

  The present invention is not limited to the embodiments described above, but can be implemented in various other forms. Therefore, the embodiments are merely examples in all respects and should not be limitedly interpreted. The scope of the present invention is defined by the scope of the claims, and is not bound by the text of the specification. Further, all modifications and changes belonging to the equivalent range of the claims are within the scope of the present invention.

101 Electronic Circuit System 102 Control Device 103 Random Access Memory 104 NAND Flash Memory 105 NOR Flash Memory 106 Boot Monitoring Device 107 RAM Interface Unit 108 NAND Interface Unit 109 NOR Interface Unit 110 Network Interface Unit 111 Recovery Notification Signal Output Unit 112 RST Signal Input unit 113 Boot switching signal input unit 114 Boot state notification signal output unit 115 Graphic interface unit 116 Recovery notification signal input unit 117 RST signal output unit 118 Boot switching signal output unit 119 Boot state notification signal input unit 120 Display device ADmp Main program storage Address ADrd recovery data storage address BASa boot status notification signal BASb boot status notification signal BCSna boot switching signal BCSno boot switching signal BP boot program BPna boot program BPnar boot program BPno boot program BPnrr boot program MP main program MPna main program MPnar main program MPnr main Program MPnrr Main program NCG Network boot configuration NR Network resource NT Network RAS Recovery notification signal RDna Recovery data RDnr Recovery data RR Recovery data storage area RSSa RST signal RSSb RST signal Rna1 First storage area Rna2 Second storage area Rno storage area

Claims (9)

An electronic circuit system in which a boot program is loaded into a control device, the control device is activated by the boot program, and then a main program is loaded into the control device and the control device is activated by the main program,
A NAND flash memory for storing the boot program and the main program; and a NOR flash memory for storing the boot program,
The boot program and the main program stored in the NAND flash memory are used as a normal startup operation of the control device,
It is possible to connect to network resources connected to the network via the network,
The main program is stored in the network resource,
The NOR flash memory stores a network boot configuration for connecting to the network resource on the network,
When it is determined that the control device cannot be normally started, the boot program stored in the NOR flash memory is read into the control device and the boot program from the NOR flash memory causes the control device to operate. start is, and, by setting the network boot configuration stored in the NOR flash memory, is configured you download the main program via said network stored in the network resource An electronic circuit system characterized in that The electronic circuit system according to claim 1 , wherein:
Equipped with random access memory,
An electronic circuit system characterized by copying the main program downloaded from the network resource via the network to the random access memory. The electronic circuit system according to claim 1 or 2 , wherein
When it is determined that the control device cannot be normally started, after the control device is started by the boot program from the NOR flash memory, a memory abnormality may occur in the NAND flash memory. An electronic circuit system that informs that. The electronic circuit system according to claim 1 , wherein:
It is possible to connect to network resources connected to the network via the network,
In the network resource, the boot program and the main program are stored as recovery data,
The NOR flash memory stores a network boot configuration for connecting to the network resource on the network,
When it is determined that the control device cannot be started normally, the recovery data stored in the network resource is downloaded from the network resource via the network by setting the network boot configuration. An electronic circuit system, wherein the boot program and the main program of the downloaded recovery data are overwritten in a storage area of the boot program and the main program of the NAND flash memory. The electronic circuit system according to claim 1 , wherein:
The boot program and the main program are stored as recovery data in the NAND flash memory,
The NOR flash memory stores a recovery data storage address which is an address of the recovery data stored in the NAND flash memory,
When it is determined that the control device cannot be normally started, the recovery data is read from the NAND flash memory at the recovery data storage address stored in the NOR flash memory, and the read recovery data is read. An electronic circuit system, wherein a boot program and the main program are overwritten in a storage area of the boot program and the main program of the NAND flash memory. An electronic circuit system for loading a boot program into a control device, activating the control device by the boot program, and then loading a main program into the control device to activate the control device by the main program,
A NAND flash memory for storing the boot program and the main program; and a NOR flash memory for storing the boot program,
The boot program and the main program stored in the NAND flash memory are used as a normal startup operation of the control device,
The boot program and the main program are stored as recovery data in the NAND flash memory,
The NOR flash memory stores a recovery data storage address which is an address of the recovery data stored in the NAND flash memory,
When it is determined that the control device cannot be normally started, the boot program stored in the NOR flash memory is read into the control device and the boot program from the NOR flash memory causes the control device to operate. The recovery program is started up and the recovery data is read from the NAND flash memory at the recovery data storage address stored in the NOR flash memory, and the boot program and the main program of the read recovery data are read by the NAND flash memory. electronic circuit system, characterized by being configured you overwrite the storage area of the boot program and the main program of the flash memory. The electronic circuit system according to any one of claims 4 to 6 ,
After overwriting the boot program and the main program in the NAND flash memory, the electronic circuit system is returned to the normal startup operation. A method of activating the control device in an electronic circuit system, comprising: loading a boot program into a control device, activating the control device by the boot program, then loading a main program into the control device, and activating the control device by the main program. There
As a normal start-up operation of the control device, the boot program and the main program stored in the NAND flash memory storing the boot program and the main program are used,
It is possible to connect to network resources connected to the network via the network,
The main program is stored in the network resource,
The NOR flash memory that stores the boot program stores a network boot configuration for connecting to the network resources on the network,
When it is determined that the control device cannot be normally started, the boot program stored in the NOR flash memory storing the boot program is read into the control device and the boot program from the NOR flash memory is read. To start the control device and set the network boot configuration stored in the NOR flash memory to download the main program stored in the network resource via the network. starting the control device according to claim to Rukoto. A method of activating the control device in an electronic circuit system, comprising: loading a boot program into a control device, activating the control device by the boot program, and then loading a main program into the control device and activating the control device by the main program. There
As a normal start-up operation of the control device, the boot program and the main program stored in the NAND flash memory storing the boot program and the main program are used,
The boot program and the main program are stored as recovery data in the NAND flash memory,
The NOR flash memory storing the boot program stores a recovery data storage address which is an address of the recovery data stored in the NAND flash memory,
When it is determined that the control device cannot be normally started, the boot program stored in the NOR flash memory storing the boot program is read into the control device and the boot program from the NOR flash memory is read. The control device is activated by the above-mentioned method, the recovery data is read from the NAND flash memory at the recovery data storage address stored in the NOR flash memory, and the boot program and the main of the read recovery data are read. A method of activating a control device, comprising: overwriting a program in a storage area of the boot program and the main program of the NAND flash memory.

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