GB2408151A

GB2408151A - Transmission lines

Info

Publication number: GB2408151A
Application number: GB0326229A
Authority: GB
Inventors: Robert Brian Greed
Original assignee: BAE Systems PLC
Current assignee: BAE Systems PLC
Priority date: 2003-11-11
Filing date: 2003-11-11
Publication date: 2005-05-18
Also published as: GB0326229D0

Abstract

A stripline microwave interconnect 1 is formed by joining together, face to face, two transmission lines (13,14) which provide the input and output portions of the interconnect. The two transmission lines may be microstrip or grounded co-planar waveguide or one of each. The stripline portion has a strip conductor sandwiched by dielectric between a pair of ground planes (15,16), and is formed by overlapping the dielectric bodies (11,12) of the input and output portions. The ground planes of the input and output portions together form the paired ground planes of the stripline portion. The strip conductors of the input and output portions are electrically connected together within the overlap, for example with solder or by bump bonding, to form the conductor of the stripline.

Description

24081 5 1 - 1

TRANSMISSION LINES

Field of the Invention

This invention relates to transmission lines and in particular, but not exclusively, to stripline interconnects.

Background to the Invention

With the rise in high speed electronic circuits and microwave communications there has been tremendous growth in the use of transmission lines operating in frequency bands between hundreds of megahertz and hundreds of gigahertz. In particular, such transmission lines are now widely to used in electronic circuits such as multi-layer hybrid circuits which are used in high speed digital data links, radar, electronic warfare and communications.

Within such circuits, and elsewhere, there exists a need for transmission line interconnects.

Interconnects within multilayer electronic circuits, also known as multilayer printed circuit boards (PCBs), most conventionally take the form of a plated-through hole, which connects electronic conductors on one layer with similar conductors on a second layer, these layers may be on adjacent or non- adjacent layers. Connection is made by drilling an accurately positioned hole between each conductor track, the hole is then plated, this plating extending onto each conductor track between which the interconnection is formed.

An alternative but still common approach is to route the conductor tracks to be interconnected out to the edge of the circuits and to make over-theedge connections, which take the form of plated conductors.

Other known schemes involve the use of capacitive or inductive electro z magnetic coupling.

In each of the foregoing schemes however, there is an inherent bandlimiting feature.

The plated through hole and over-the-edge schemes involve an abrupt change in direction of the conductors, which leads to a disruption of the so electrical signal or energy flow. The abrupt change can be described by a - 2 reactive discontinuity, which at low frequencies (megahertz) has little effect on performance. As the operational frequency is raised the effect of the reactive discontinuity on the efficacy of the interconnect becomes increasingly deleterious. At higher frequencies the presence of the discontinuity gives rise to signals being radiated, further degrading performance. It is a known technique to employ tuning methods to match out the effects of the discontinuity and restore performance, but these are effective only over a limited bandwidth.

Finally, there are also known interconnects which are based on electromagnetic coupling. These are well known at low frequencies, such as may be to found in many consumer electronics applications. However, these techniques have been extended to the frequency bands in excess of hundreds of megahertz. The coupling techniques involve either pseudo- lumped element capacitive patches or distributed coupled lines. Unfortunately, just as with the via hole and over the edge interconnects these coupled methods are band limited.

Summarv of the Invention In a first aspect the invention provides a stripline interconnect having a conductor sandwiched by dielectric between a pair of ground planes, the stripline being formed between input and output transmission lines which each have a conductive strip on one face of a dielectric body and a ground plane on the reverse face of the dielectric body, the transmission lines being arranged with portions of the conductive strips facing each other, the ground planes of the two transmission lines providing the ground planes of the stripline interconnect, and the facing portions of the conductive strips being electrically interconnected 2s to provide the conductor of the stripline interconnect.

In a second aspect the invention provides a method of forming a stripline interconnect between a first transmission line which has a conductive strip on one face of a dielectric body and a ground plane on the reverse face of the dielectric body and a second transmission line which also has a conductive strip so on one face of a dielectric body and a ground plane on the reverse face of its dielectric body, the method comprising the steps of: - 3 arranging the conductive strips of the two transmission lines facing each other; forming an electrical connection between the facing strips; and forming an electrical connection between the ground planes of the two transmission lines; so that a stripline transmission line is formed with the conductor of the stripline provided by the electrically interconnected conductive strips of the first and second transmission lines.

In each of these aspects of the invention, the ground planes are to preferably also connected over the edges along the length of the stripline (overlapped) section.

Embodiments of the interconnect according to the invention are capable of covering very wide frequency ranges with a single design. For example, with careful design, it is possible to produce an interconnect which is useful throughout the range from 2 to 20GHz. With an appropriate choice of materials and design parameters, an ever wider frequency range may be accommodated.

Of course in optimising the design it is necessary to trade, to some extent, high and low frequency performance. Not all band limitations can be eliminated in a single design. If the physical dimensions of the interconnect are reduced to no extend the top end frequencies the geometry is likely to be too small for low frequency designs causing a discontinuity and by implication band limiting.

Throughout this patent specification, expressions such as "overlapping", "over", and "overlie" have been used with a view to facilitating description and understanding. The reader will appreciate, however, that the precise orientation as of interconnects according to the invention, and their parts, is not relevant to their construction or their performance. Consequently, unless the context clearly requires otherwise, the use of such terms is not to be construed as referring to a particular orientation of the interconnect in use or otherwise.

Embodiments of the invention will now be described, by way of example so only, with reference to the accompanying drawings.

Brief Description of the Drawinns

Figure 1 is a schematic drawing showing an interconnect, according to an embodiment of the invention, connecting tracks on a multilayer microwave circuit; and Figure 2 is a schematic drawing showing an interconnect of the same general form as that of Figure 1 before assembly.

Detailed Description of Preferred Embodiments

Figure 1 is a schematic drawing showing an interconnect 1, according to an embodiment of the invention, interconnecting two microstrip tracks 2 and 3 to on the outer surfaces, 4 and 5, of two layers, 6 and 7, of a multilayer PCB stack 8. In this stack, any of the layers may be microstrip lines, striplines or co-planar waveguides. In this example, the layers 6 and 7 are the outermost layers of the stack 8, but this is not essential. One or both layers could be within the stack rather than being an outermost layer, provided that provision is made to permit the necessary connection to be made between the interconnect and the tracks 2 and 3. Each of the microstrip tracks, 2 and 3, has an associated ground plane 9 and 10 within the stack 8.

The interconnect 1 is formed from two pieces of dielectric material, 11 and 12. In this case the material is alumina, which is the same dielectric material as is used to form the PCB stack 8 (although this is not essential).

Each of the two pieces of dielectric material, 11 and 12, carries a microstrip track 13 and 14 on one face, with a ground plane, 15 and 16, on the opposite face. The two tracks, 13 and 14, start at one of the long edges of the interconnect dielectric, where they are electrically connected to their respective "parent" microstrip track 2 or 3 using a wire or tape bonding process. The two tracks, 13 and 14, of the interconnect then curve round through 90 to run down the length of the interconnect dielectric pieces, 11 and 12. The figure shows the tracks running down the centre lines of the dielectric pieces 11 and 12 but in practice the actual position is determined by the geometry of the "parent" So microstrip tracks which are to be joined. As an alternative to using curving tracks it would be possible to use compensated right angle bends. - 5

The two pieces of interconnect dielectric, 11 and 12, are arranged with the faces that carry the microstrip facing each other, with the ground planes 15 and 16 lying outwardly. The ends of the two interconnect dielectric pieces are staggered so that an overlap, 17, is formed. Within this overlap the two interconnect microstrip tracks are in intimate electrical contact. This intimate electrical contact may be achievable by simply providing a track to track pressure contact. However, in many situations greater reliability of contact can be achieved by using a bonded contact. As shown in this embodiment, this electrical contact is provided by allowing the two microstrips to overlie each to other with a reflowed solder connection between them. The solder usefully provides both a mechanical connection and the required electrical connection.

In the overlap portion the connected microstrip tracks are confined by the two ground planes 15 and 16 so that a stripline section is formed. For optimum performance it is of course important to choose the dimensions (especially height and width) and properties (ZO etc) so that the properties and performance of the stripline section are a good match for those of the microstrip parts. For example, one will generally need to reduce the width of the tracks 13 and 14, as shown by 21, compared to their width in the portion outside the overlap.

In addition to connecting the microstrips, 13 and 14, of the interconnect to their respective "parent" microstrips, 2 and 3, of the PCB assembly, the ground planes of the interconnect parts are in electrical contact with the corresponding ground planes of the PCB assembly. Figure 1 shows another technique which is used to improve the performance of the interconnect. That is, for the section of the dielectric pieces which will form the overlap 17, the as ground plane is continued over the edges of the dielectric, shown as parts 18 and 19. In this way, in the overlap 17, a stripline is formed with a ground plane which is substantially continuous on four sides around it.

It will be appreciated that this approach to providing an interconnect between tracks on different layers of a PCB effectively provides a simple So continuous RF transmission line which is inherently very broadband. Clearly, in order to avoid high-frequency operation being limited by the onset of higher order modes, it is necessary to make an appropriate selection of the cross - 6 sectional dimensions, etc. of the interconnect. This can be achieved without effecting the low frequency operation of the interconnect.

The presence of the stripline section also enables a "twisted" interconnect (which in effect enables the interconnect to provide a selected, fixed, mechanical rotation between its input and output lines) to be provided

without disturbing the RF electro-magnetic fields.

For an interconnect of the general form shown in Figure 1, and subject to the need for compatibility with the properties of the PCB microstrip and circuitry with which the interconnect is to be used, the following typical dimensions Jo provide a convenient basis for optimization.

The microstrip tracks 13 and 14 (electrodes) are 0.540 mm wide.

The stripline tracks 21 (electrodes) are 0.370 mm - that is, this is the width throughout the length (2.2 mm) of the overlap.

These tracks have an operative portion which is 3 to 5 skin depths thick at the lowest operational frequency. This portion of the tracks is made from an excellent conductor of electricity, typically high purity gold, silver, or copper.

Where the appropriate operating conditions will exist it will be possible to use a superconductor on an appropriate substrate in place of the metal conductors.

The make up (material and the thickness of the operative portion) of the ground planes will typically be the same as that of the tracks.

Each of the dielectric pieces can be 3.14 mm wide and 5.25 mm long, giving an overall length of the interconnect of 8.55 mm (with a 2.2 mm overlap).

The radius of curvature of the inner periphery of the track at the bends can conveniently be 1.00 mm.

The separation between the two electrode tracks in the stripline section would typically be between O and 10 microns depending upon how the two tracks are connected to each other (more of which below). Ideally the separation should be zero, i.e. a direct interconnection, but in general the imperfect flatness of the substrates precludes this. The use of solder pads or so bumps in a bump bonding process compensates for the non- flat surface. The - 7 upper limit of separation is set by the influence of the air gap on the performance of the stripline. The higher the pads or bumps, the bigger the air gap and the more this affects performance.

The use of a solder re-flowing technique to join and electrically connect the two stripline electrodes has already mentioned. Typically, after the stripline tracks (electrodes) have been formed using a photolithographic process, a second pattern mask of windows is applied over the tracks. The 'solder' is then formed by depositing a suitable second metal through the windows where it becomes alloyed with the track metal, after which the mask is removed leaving to solder pads or bumps. The footprint of the bumps is not important and can be almost any shape. For example, the footprint can be nominally square. The bumps may for example be 15 to 20 microns on each side. The pads or bumps are applied to the two tracks in "mirror imaged" positions so that they overlap when the two interconnect parts are face-to-face and correctly aligned. Such an s arrangement facilitates the production of excellent electrical connection through the formation of good soldered or bump bonded joints. Alternative arrangements of pads or bumps are of course possible. For example, it would be possible to arrange the bumps in a staggered manner, so that during assembly of the stripline the bumps fit between each other. Appropriate treatment of the tracks between the pads or bumps to ensure good bonding would then be sensible. As is well known, soldering to an unwetted track can be problematic, particularly for metals such as copper which oxidise readily.

Likewise bonding two bumps together is generally easier and more reliable than trying to bond a bump to a unprepared area of track.

s It would also be possible to use an electrically conductive epoxy adhesive, in place of re-flowed solder.

If using solder pads, bump bonding, epoxy resin "dots" or another technique which results in spaced-apart points of connection along the overlap, it is important that the spacing between adjacent bumps/contacts is sufficiently so controlled. What is important is that the spacing of the contacts (along the length of the overlap) is short relative to the shortest wavelength with which the system will be used. Typically, the separation would be one-tenth to one-eighth - 8 of the wavelength at that point in the system (i.e. in the stripline part) if the separation is not short compared to the wavelength then this can give rise to spurious propagation. In the limit, if the gap becomes equal to multiples of a half wavelength, trapped resonances are likely to be excited.

Once the parts are aligned they are clamped together and heated to reflow and fuse the solder. Clearly, if one is using an electrically conductively epoxy resin, the parts are again aligned and clamped and then suitable setting conditions created for the resin.

Of course, in place of a re-flow soldering technique using solder bumps, to it would also be possible to use a bump bonding technique using soft metal bumps laid down using a photolithographic process as described above.

Ideally, the two overlapping tracks are connected throughout their length - that is providing a total area connection of the two tracks. However, for reasons of practical expediency, multiple, spaced-apart connections are used.

The pads or bumps may be the full or nearly the full width of the strip or they may be provided as rows along the centre-line and/or both edges of the strips.

Ideally, there will be connections between the conductors at each end of the stripline section. Practically, in may not be possible to achieve this, but one should still endeavour to locate a connection as close as possible to each end so of the stripline section.

A uniform spread of solder can also be achieved using a re-flowing technique. Other suitable techniques may also be used to provide an interconnection which extends along the whole of the overlap length rather than providing a series of point connections. Given that full track connection is the 2s ideal, the use of a continuous rib or fin formed on one, the other or both of the stripline tracts would be a suitable structure provided that a satisfactory electrical bond could be formed with such a structure, between the stripline tracks.

In the case of the embodiment described with reference to Figure 1, the interconnect incorporates bends in the conductors to permit connection between the appropriate strips on the PCB. The radius of curvature of the - 9 - bends is adjusted to optimise the RF performance of the bend over the required operational band. Of course, where an in-line interconnect is required this can be achieved using an interconnect which is made without bent conductors.

Performance is further optimised by controlling the angle of the interconnect with respect to the substrates to be interconnected. As the angle of the interconnect is increased from in-plane with respect to say the outer surface 4 of layer 6 then the performance will degrade. At a 90 degree angle the conductors are crossed and would be close to a short circuit (and would tend to behave like "over the edge" interconnects). The angle of the to interconnect is controlled by taking account of the vertical spacing between the tracks, and hence setting the relative positions of the "parent" tracks 2 and 3 on 4 and 5. For angles typically less than 20 degrees (from the plane of the relevant surface) (that is with an included angle of 160 degrees or more) the broad band performance can be excellent. Angles of greater than 20 degrees, for example 25, 30, 35, 40 or even 45 degrees (that is, included angles of more than 155, 150, 155, 140 and 135 degrees) may be usable in any particular application depending upon other design factors and the frequency response requirements for the interconnect.

Just as it is essential for the two mating tracks to be in good electrical contact it is equally important that the two ground planes of the stripline section are at the same ground potential along their length. At high microwave frequencies it is generally not good enough to rely on the external packaging to do this. Direct connection by the shortest route between the ground planes is desirable; otherwise inductive paths are likely to be introduced. In large area circuits, ground connections in the form of vies are strategically spread across the whole circuit surface to ensure that all points on the top and bottom ground planes are at the same potential. One could adopt this approach in forming the stripline section of the interconnect, using a row or fence of conductive vies., In the design described with reference to Figure 1 the width of the stripline section was reduced to prevent an upper frequency limit due to unwanted resonances.

Where vies are used in place of the edge conductors then the vies can be similarly spaced from the tracks. The vies are typically spaced at onetenth - 1 0 wavelength along the section. The edge metallisation or via fence, which are known techniques, provide a good connection between the ground planes and RF shielding.

Once the interconnect has been formed, it is mounted into for example a machined slot between the substrate assemblies to be connected. Preferably, electrically-conductive epoxy or the like is used to secure the interconnect into place. This can also provide the necessary electrical connection between the ground planes of the interconnect and those of the substrate assembly. Finally, electrical connections in the form of wire or tape are made between the tracks, to 13 and 14, on the interconnect and the tracks, 2 and 3, on the substrate assembly.

Figure 2 is schematic diagram showing the two parts of the interconnect 1 before assembly. The narrowing of the microstrips 13 and 14 at the start of the region of the overlap 17 can clearly be seen. In addition, on the narrow electrode portions 21 and 22 can be seen the metallic pads or bumps, which will be used both to secure the two parts 11 and 12 together as well as to provide the electrical connection between the two microstrips which will, together with the ground planes 15 and 16, form a stripline. The ground plane edge plating 18 and 19 of the dielectric parts of the length of the overlap can also be seen.

When the two parts of the interconnect are bonded, electrical connections are also achieved between the two ground planes 16 and 17 via the edge plating 18 and 19. This edge plating is preferably done following assembly of the two parts and the application of a filler bead, e.g. a viscous epoxy, along the joint.

Instead of forming the interconnect using microstrip input and output portions one could equally well use a grounded co-planar waveguide.

Alternatively, one or other of the input and output portions could be microstrip or a co-planar waveguide. The constraints of the microstrip version equally apply to a co-planar waveguide design. The central overlapping strips will be connected together as for the stripline version. And in addition the overlapping, finite width co-planar waveguide ground planes on the signal (strip) side would have to be bonded together with pads in a similar manner and grounded to the upper and lower ground planes by edge metallisation or via fences. - 11

The above embodiments are to be understood as illustrative examples of the invention. Further embodiments of the invention are envisaged. It is to be understood that any feature described in relation to any one embodiment may be used alone, or in combination with other features described, and may also be used in combination with one or more features of any other of the embodiments, or any combination of any other of the embodiments.

Furthermore, equivalents and modifications not described above may also be employed without departing from the scope of the invention, which is defined in the accompanying claims. - 12

Claims

Claims 1. A stripline interconnect having a conductor sandwiched by

dielectric between a pair of ground planes, the stripline being formed between input and output transmission lines which each have a conductive strip on one face of a dielectric body and a ground plane on the reverse face of the dielectric body, the transmission lines being arranged with portions of the conductive strips facing each other, the ground planes of the two transmission lines providing the ground planes of the stripline interconnect, and the facing portions of the conductive strips being to electrically interconnected to provide the conductor of the stripline interconnect.
2. A stripline interconnect as claimed in claim 1, wherein the input portion is formed of a microstrip or a grounded co-planar waveguide.
3. A stripline interconnect as claimed in claim 1 or 2, wherein the output portion is formed of a microstrip or a grounded co-planar waveguide.
4. A stripline interconnect as claimed in any one of claims 1 to 3, wherein the dimensions of the conductive strips in the stripline and those of the input and output are arranged so that the characteristic impedance of the stripline matches that of the input and output.
5. A stripline interconnect as claimed in any one of claims 1 to 4, wherein the sides of the dielectric between the pair of ground planes are provided with an electrically conductive layer about the stripline portion to electrically connect the two ground planes.
6. A stripline interconnect as claimed in any one of claims 1 to 4, wherein 2s the dielectric sandwiching the stripline portion includes two rows of vies connecting the pair of ground planes to provide an electrically conductive path to electrically connect the two ground planes.
7. A stripline interconnect as claimed in any one of claims 1 to 6, wherein the conductor of the stripline includes re-flowed solder portions which - 13 mechanically bond and electrically connect its constituent conductive strips.
8. An interconnect having input and output portions each of which is formed by a dielectric body which carries on one face a ground plane and on an opposite face a strip conductor, the input and output portions being interconnected by means of a stripline portion which has a strip conductor sandwiched by dielectric between a pair of ground planes, the stripline portion being formed by overlapping the dielectric bodies of the input and output portions with their ground planes providing the pair of to ground planes, and the strip conductors being electrically connected together within the overlap to form the conductor of the stripline.
9. A multilayer electronic circuit having first and second transmission lines formed on different layers of the circuit, the first and second transmission lines being electrically connected with an interconnect as claimed in any one of claims 1 to 8.
10. A multilayer electronic interconnect as claimed in claim 9, wherein the included angle between the interconnect and each of said different layers of the circuit is not less than 135 degrees.
11. A multilayer electronic circuit as claimed in claim 9 or claim 10, wherein the interconnect is housed in a slot formed in a side of the circuit.
12. A method of forming a stripline interconnect between a first transmission line which has a conductive strip on one face of a dielectric body and a ground plane on the reverse face of the dielectric body and a second transmission line which also has conductive strip on one face of a dielectric body and a ground plane on the reverse face of its dielectric body, the method comprising the steps of: i) arranging the conductive strips of the two transmission lines to face each other; ii) forming an electrical connection between the facing strips; and - 14 iii) forming an electrical connection between the ground planes of the two transmission lines; so that a stripline transmission line is formed with the conductor of the stripline provided by the electrically interconnected conductive strips of the first and second transmission lines.
13. A method as claimed in claim 12, wherein at least the first transmission line is a microstrip transmission line.
14. A method as claimed in claim 12 or claim 13, wherein at least the second transmission line is a grounded co-planar waveguide.

o
15. A stripline interconnect substantially as hereinbefore described, in particular with reference to Figures 1 and 2.