GB2401764B - System clock synchronisation using phase-locked loop - Google Patents

System clock synchronisation using phase-locked loop

Info

Publication number
GB2401764B
GB2401764B GB0417985A GB0417985A GB2401764B GB 2401764 B GB2401764 B GB 2401764B GB 0417985 A GB0417985 A GB 0417985A GB 0417985 A GB0417985 A GB 0417985A GB 2401764 B GB2401764 B GB 2401764B
Authority
GB
United Kingdom
Prior art keywords
phase
locked loop
system clock
clock synchronisation
synchronisation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
GB0417985A
Other versions
GB2401764A (en
GB0417985D0 (en
Inventor
Chris J Goodings
Matthew Young
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
VTech Communications Ltd
Original Assignee
VTech Communications Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from GBGB0100094.2A external-priority patent/GB0100094D0/en
Application filed by VTech Communications Ltd filed Critical VTech Communications Ltd
Publication of GB0417985D0 publication Critical patent/GB0417985D0/en
Publication of GB2401764A publication Critical patent/GB2401764A/en
Application granted granted Critical
Publication of GB2401764B publication Critical patent/GB2401764B/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/181—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a numerical count result being used for locking the loop, the counter counting during fixed time intervals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/08—Speed or phase control by synchronisation signals the synchronisation signals recurring cyclically

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
GB0417985A 2001-01-03 2002-01-03 System clock synchronisation using phase-locked loop Expired - Lifetime GB2401764B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GBGB0100094.2A GB0100094D0 (en) 2001-01-03 2001-01-03 System clock synchronisation using phased-lock loop
GB0200077A GB2375934B (en) 2001-01-03 2002-01-03 System clock synchronisation using phase-locked loop

Publications (3)

Publication Number Publication Date
GB0417985D0 GB0417985D0 (en) 2004-09-15
GB2401764A GB2401764A (en) 2004-11-17
GB2401764B true GB2401764B (en) 2005-06-29

Family

ID=33312342

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0417985A Expired - Lifetime GB2401764B (en) 2001-01-03 2002-01-03 System clock synchronisation using phase-locked loop

Country Status (1)

Country Link
GB (1) GB2401764B (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1842299A2 (en) * 2005-01-14 2007-10-10 Koninklijke Philips Electronics N.V. Method to synchronize receiver's clock to transmitter's clock at sub-100nsec
WO2010141514A2 (en) * 2009-06-01 2010-12-09 Bit Cauldron Corporation Method of stereoscopic synchronization of active shutter glasses
CN104321720B (en) * 2012-01-09 2017-11-07 爱普生挪威研究发展公司 For synchronous, identification and the low interference system and method for tracking visual interactive formula system
AT513112A1 (en) * 2012-07-11 2014-01-15 Felix Dipl Ing Dr Himmelstoss Synchronization method and apparatus for oscillators
WO2020038542A1 (en) 2018-08-20 2020-02-27 Renesas Electronics Corporation Oscillator frequency adjustment

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09298463A (en) * 1996-05-08 1997-11-18 Nec Corp Clock generation circuit
GB2315197A (en) * 1996-07-11 1998-01-21 Nokia Mobile Phones Ltd Adjusting radio telephone system clock
WO1998004063A2 (en) * 1996-07-19 1998-01-29 Telefonaktiebolaget Lm Ericsson (Publ) A method and an apparatus for recovery of the clock of a constant bit-rate service
JPH10178458A (en) * 1996-12-17 1998-06-30 Kokusai Electric Co Ltd Demodulation circuit
JP2000216760A (en) * 1999-01-27 2000-08-04 Nec Eng Ltd Data transmission system and method for transmitting clock in the same system

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09298463A (en) * 1996-05-08 1997-11-18 Nec Corp Clock generation circuit
GB2315197A (en) * 1996-07-11 1998-01-21 Nokia Mobile Phones Ltd Adjusting radio telephone system clock
WO1998004063A2 (en) * 1996-07-19 1998-01-29 Telefonaktiebolaget Lm Ericsson (Publ) A method and an apparatus for recovery of the clock of a constant bit-rate service
JPH10178458A (en) * 1996-12-17 1998-06-30 Kokusai Electric Co Ltd Demodulation circuit
JP2000216760A (en) * 1999-01-27 2000-08-04 Nec Eng Ltd Data transmission system and method for transmitting clock in the same system

Also Published As

Publication number Publication date
GB2401764A (en) 2004-11-17
GB0417985D0 (en) 2004-09-15

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Legal Events

Date Code Title Description
PE20 Patent expired after termination of 20 years

Expiry date: 20220102