GB2387479A

GB2387479A - Sacrificial side tilting mirror for on-wafer optical testing

Info

Publication number: GB2387479A
Application number: GB0208078A
Authority: GB
Inventors: Seng Lee Ng; Yuen Chuen Chan; Kian Hin Victor Teo; Yee Loy Lam; Hiroshi Nakamura
Original assignee: DenseLight Semiconductors Pte Ltd
Current assignee: DenseLight Semiconductors Pte Ltd
Priority date: 2002-04-08
Filing date: 2002-04-08
Publication date: 2003-10-15
Also published as: GB0208078D0

Abstract

A wafer comprises a substrate 1, an edge emitting photonic device 3 for example a laser diode formed on the substrate and an integral sacrificial tilted mirror 2 formed by etching the substrate adjacent a facet of the photonic device. The mirror, preferably inclined at 45{ to the facet and to the substrate, can reflect light into or out of a device. This allows on-wafer optical testing of the device by using an optical fibre 4 perpendicular to the substrate, prior to cleaving the substrate to separate the devices from the mirrors and the remainder of the substrate. Devices can be arranged in rows (fig 5) or staggered rows (fig. 6), with each mirror associated with a single device, or, where the mirror structure has two reflecting surfaces (fig 3), with two devices facing one another.

Description

SACRIFICIAL SIDE TILTING MIRROR FOR

ON-WAFER OPTICAL TESTING

Field of the Invention

5 The present invention relates to an apparatus and method to allow onwafer testing of optical parameters of optoelectronic devices without dicing the wafer.

Background to the Invention

On-wafer testing using an automatic probing station provides lower 10 measurement costs and faster testing time. Most importantly, it eliminates the need to dice the wafer, bond and package the devices before test. It also serves to bin the devices, separating the good ones from the defective devices, which would otherwise be packaged. The absence of bond wires or package parasitic to obscure the intrinsic device data results in a more accurate measurement. In addition, for 15 high throughput testing, the use of manual micro-positioners is usually replaced by means of a probe card. A probe card can be custom- designed to probe multiple dies at a time, commonly known as multiple die testing. For multiple die testing, the testing speed for probing would be greatly increased. Moreover, from the mechanical point of view, the life span of the probe tips and the prober would be 20 longer, and therefore, this helps to reduce the frequency of replacing a new probe card or maintenance of the prober. Thus, this would cut down the potential cost incurred as well.

Probing stations such as test equipment can evaluate electro-optical component at on-wafer level. Electrical parameters can be easily extracted by semi 25 automatic probe stations at a very fast speed. However, the optical parameters of optical components are far more important than that of the electrical ones. So far, the capability of on- wafer testing for optical components, such as laser diode, has not been developed.

The current state of art on optical measurements of optoelectronic devices at 30 on-wafer level or by laser bars probing has been developed by Cascade Microtech, making use of a fibre optic wafer probe as described in US 5,101,453. It can illuminate and collect optical signals used in the characterization of a variety of photonic devices. The illumination is of approximately 5-micron diameter using a lensed fiber and at least of 25-micron diameter using a cleaved end. However, for 35 on-wafer probing, it is only applicable to VSCELs (Vertical Cavity Surface Emitting Lasers), but not to the edge-emitting laser diode. For edge-emitting laser diodes, the optical parameters are extracted in the laser bar form, instead of at wafer level.

Summary of the Invention

According to the present invention, a wafer comprises a substrate, a photonic device formed on the substrate and a light fuming structure formed 5 integrally with the substrate adjacent a facet of the photonic device, wherein the light turning structure is capable of reflecting light into or out of the facet.

The arrangement of the present invention allows testing of optical parameters of an edge emitting device at wafer level. Light can be directed into or out of the device via the light fuming structure without cleaving a wafer into bars of 10 devices or individual devices. After testing, the wafer may be cleaved to separate the light fuming structure from the photonic device, and the light fuming structure can be discarded. As a result of allowing wafer level testing, testing can be accelerated, and the performance of individual devices can be evaluated and the; good and bad dies binned without the need for cleaving and packaging the devices.

15 Preferably, the light fuming structure is formed by etching the substrate. I Preferably, the substrate is InP, and the light fuming structure is formed by etching along the (01 1) and/or (011) planes. Preferably, the light fuming structure has a reflecting face at substantially 45 to the facet and the substrate. This allows nommal incidence of light emitted from the facet on a receiving optical fibre perpendicular to 20 the substrate, or conversely nommal incidence of light on the facet from such an optical fibre.

Preferably, the photonic device is an edge emitting photonic device, more preferably an edge emitting laser diode.

Preferably, the wafer comprises a plurality of photonic devices and a plurality 25 of light fuming structures.

In one embodiment, each photonic device on the wafer has a single light fuming structure associated with it.

In a second embodiment, a single light fuming structure is associated with two devices, the light fuming structure having two reflecting faces, one for each 30 device. The two faces are preferably etched from the (01 1) and (011) planes of an InP substrate.

In a further embodiment, the wafer comprises a plurality of rows of photonic devices, the photonic devices in each row being off-set from those in an adjacent row and a light fuming structure is associated with each photonic device, wherein 35 the light fuming structures associated with the photonic devices in each row are interleaved between photonic devices in an adjacent row. This embodiment has the

advantage of saving space on the wafer. When the wafer is cleaved, each photonic device is cleaved from its associated light turning structure, but the light fuming structure to one side of it which is associated with a device on an adjacent row remains attached.

5 According to a second aspect of the present invention, a method of testing a photonic device comprises the steps of: providing a photonic device on a substrate; providing a light fuming structure integral with the substrate and arranged to receive light from or direct light into a facet of the photonic device; 10 testing the device by either directing light into or receiving light from the facet via the light fuming structure; and, cleaving the substrate to separate the photonic device from its associated light turning structure.

Preferably, the device is tested whilst on a wafer comprising a plurality of 15 devices. Preferably, the light fuming structure is etched in the substrate.

Brief Description of the Drawings

Examples of the present invention will now be described with reference to the accompanying drawings in which: 20 Figure 1 is a side view of a wafer including a plurality of dies; Figure 2 is a side elevation of a single die; Figure 3 illustrates a first embodiment of a light fuming structure; Figure 4 illustrates a second embodiment of a light turning structure; Figure 5 shows a first possible arrangement of devices and light fuming 25 structures on a wafer; Figure 6 shows a second possible arrangement of devices and light turning structures on a wafer; and Figure 7 illustrates a possible method of cleaving the wafer.

30 Detailed Description

The present invention provides a new design to achieve on-wafer optical probing of edge-emitting photonic devices 3. The basic principal is that a sacrificial side-tilting mirror 2 is fabricated next to a facet of each photonic device 3, as shown in Figure 1. Both the mirror 2 and the photonic device 3 are fabricated on a 35 substrate 1. This configuration allows both the illumination and collection of light to and from the devices 3, such as laser diodes or photodetectors' where the output light is directed upwards from the devices 3 using the side-tilting mirrors 2 or

directed into the devices 3 using the mirrors 2. An optical fibre 4 provides or collects the light. A probe card as disclosed in copending application [DLS-140-WPC] may be used to monitor a plurality of devices simultaneously. After the on-wafer testing, the side-tilting mirrors 2 on the wafer can be detached by means of cleaving.

5 In this arrangement, both electrical and optical parameters, such as Light Current-Voltage (L-l-V) characteristics of the edge-emitting laser diode or the responsivity of a photodetector, can be easily extracted from the devices 3 at wafer level. As a result, this setup will accelerate the testing speed to evaluate the performance of the devices and then to bin out between the good and bad dies.

10 After evaluation of the device performance, the wafer will be sent for cleaving and then perhaps further packaging. In this case, the cleaving can be done in such a way that the side-tilting mirrors 2 and the wouldbe packaged dies are detached from one another.

To enable normal incidence of the light onto the cleaved optical fibre 4, the 15 side-tilting mirror structures 2 must have a reflecting face 5 at an angle of 45 with respect to the horizontal direction (at one of the etched facets) as shown in detail in Figure 2. Based on the crystal growth direction l001l of the InP substrate 1, the sidewall mirror pair 6a, 6b as shown in Figure 3 can be obtained in the crystal planes of (01 1) and (011) by wet etching. These crystal facet planes 6a, 6b are 20 obtained because of the wet etch selectivity in the specified directions. With a proper masking with a mask 7 such as silicon dioxide or nitride, the sidewalls in the crystal planes of (01 1) can be avoided, whereby only the sidewalls 6b with (011) crystal plane are obtained, as shown in Figure 4. The length of the photonic devices 3 varies from 300 to 1000 m. For the sacrificial sidewall, its length must be at least 25 200 1lm for ease of cleaving after on-wafer testing.

The mesa structure shown in Figure 3 could be used as the side-tilting mirror structure for a single device since the facet facing the device 3 being tested has the correct orientation of tilt. A number of different possible arrangements of devices 3 on a wafer are possible. In Figure 5, each mirror structure 2 could be a structure as 30 shown in Figures 3 or 4, with a single structure associated with each device 3. With the double sided structure of Figure 3, a single structure could reflect light into/out of devices on both sides. However, this would require adjacent rows of devices to "face" in opposite directions.

After on-wafer testing, the photonic device die will be cleaved to separate the 35 side-tilting mirror 2 and the device 3 for packaging. The cleave lines 8a, 8b are

shown in Figure 5. In this case, the portions of the wafer where the sidetilting mirrors 2 are present will be discarded.

To further improve the utilization of the real estate of the wafer for the photonic device dies, another configuration is proposed, as shown in Figure 6. In 5 this configuration, the photonic device dies in each row are not placed inline but are staggered altemately. As a result, there will be no discarded portions although the side-tilting mirrors 2 will be situated within a single die area. However, this will not affect the device performance in any way. with this, the semiconductor wafer can be populated completely with the desired photonic devices 3.

10 In a further embodiment, upon etching of the side-tilting mirrors 2, the facets of the photonic device 3 will also be defined. This means that a cavity can be formed to support losing, allowing for on-wafer testing of edge-emitting laser diodes. The side-tilting mirrors 2 will be cleaved off after on-wafer testing. In this cleaving process, we could also cleave out the facets 9a, 9b of the laser diode devices 3, as 15 shown in Figure 7. The subsequent cleaved bar of devices 3 could be processed for optical coating deposition. This means that the proposed scheme allows for the flexibility of facet formation by either etching or cleaving.

The etched facet is implemented to form a cavity so that the edgeemitting photonic devices could be tested on a wafer level, for a quick assessment of the 20 device performance. Consequently, the facet etching process requirements may not need to be stringent (such as achieving good perpendicular orientation with the surface and low surface roughness) if the normal cleaving process eventually forms the final device facets.

Claims

: - - - CLAIMS

1. A wafer comprising a substrate, a photonic device formed on the substrate and a light fuming structure formed integrally with the substrate adjacent a facet of 5 the photonic device, wherein the light fuming structure is capable of reflecting light into or out of the facet.

2. A wafer according to claim 1, wherein the light fuming structure is fommed by etching the substrate.

3. A wafer according to claim 1 or 2, wherein the substrate is InP, and the light fuming structure is formed by etching along the (01 1) and/or (011) planes.

4. A wafer according to any one of the preceding claims, wherein the light 15 fuming structure has a reflecting face at substantially 45 to the facet and the substrate.

5. A wafer according to any one of the preceding claims, wherein the photonic device is an edge emitting photonic device.

6. A wafer according to any one of the preceding claims, comprising a plurality of photonic devices and a plurality of light fuming structures.

7. A wafer according to claim 6, wherein each photonic device on the wafer has 25 a single light fuming structure associated with it.

8. A wafer according to claim 6, wherein a single light fuming structure is associated with two devices, the light fuming structure having two reflecting faces, one for each device.

9. A wafer according to claim 8, wherein the two faces are etched from the (01 1) and (011) planes of an InP substrate.

10. A wafer according to claim 6, comprising a plurality of rows of photonic 35 devices, the photonic devices in each row being off-set from those in an adjacent row and a light fuming structure is associated with each photonic device, wherein

the light turning structures associated with the photonic devices in each row are interleaved between photonic devices in an adjacent row.

11. A method of testing a photonic device comprising the steps of: 5 providing a photonic device on a substrate; providing a light turning structure integral with the substrate and arranged to receive light from or direct light into a facet of the photonic device; testing the device by either directing light into or receiving light from the facet via the light fuming structure; and, 10 cleaving the substrate to separate the photonic device from its associated light fuming structure.

4/ (-'in) _,; INVESTOR rN PEOPLE t. T9/ Application No: GB 0208078. 6 Examiner: Anna Brandon Claims searched: 1 to 11 Date of search: 20 December 2002

Patents Act 1977: Search Report under Section 17 Documents considered to be relevant: Category Relevant Identity of document and passage or figure of particular relevance to claims X,5,6,7, JP2047888 (NIPPON ELECTRIC) English language abstract, 11 at least figs.

X 1-4,6-7 EP0535690 (SUMITOMO ELECTRIC INDUSTRIES) figs 6 & 9, cot 2 line 33-col 3 line 13, cot 3 lines 26-34, cot 6 lines 39-44, col 10 lines 9-25 & 36-42 X,5,6,7 US5606181 (RICOH) figs 8 & 28, cot 7 lines 28-39 X,2,4, s US4807238 (RICOH) fig 9, col 3 lines 45-49 X -3, s US6071426 (UNIV CALIFORNIA) figs 4 & 5, col 2 lines 48 X i,2,4,6, EP0827211 HEWLETT PACKARD fig 7, cot 2 line 56-col 3 7 line 7, cot 4 lines 20-30 & 36-38 Cate vies: g X Document indicating lack of novelty or inventive step A Document indicating technological background and/or state of the art.

Y Document indicating lack of inventive step if combined P Document published on or after the declared priority date but before the with one or more other documents of same category. filing date of this invention.

& Member of the same patent family E Patent document published on or after, but with priority date earlier than, the filing date of this application.

Field of Search:

Search of GB, EP, WO & US patent documents classified in the following areas of the UKCT: I H1K l Worldwide search of Datent documents classified in the following areas of the IPC7: 1 HOlL, G02B, HOlS l The following online and other databases have been used in the preparation of this search report: I EPODOC, WPI, JAPIO l An Executive Agency of the Department of Trade and Industry