GB2377095A - Method of generating offset drive control signals for half bridge converters - Google Patents
Method of generating offset drive control signals for half bridge converters Download PDFInfo
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- GB2377095A GB2377095A GB0204917A GB0204917A GB2377095A GB 2377095 A GB2377095 A GB 2377095A GB 0204917 A GB0204917 A GB 0204917A GB 0204917 A GB0204917 A GB 0204917A GB 2377095 A GB2377095 A GB 2377095A
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- 238000006243 chemical reaction Methods 0.000 claims description 8
- 238000010586 diagram Methods 0.000 description 17
- 238000006073 displacement reaction Methods 0.000 description 5
- 239000003990 capacitor Substances 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000001276 controlling effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 241000826860 Trapezium Species 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- ZEKANFGSDXODPD-UHFFFAOYSA-N glyphosate-isopropylammonium Chemical group CC(C)N.OC(=O)CNCP(O)(O)=O ZEKANFGSDXODPD-UHFFFAOYSA-N 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K7/00—Modulating pulses with a continuously-variable modulating signal
- H03K7/08—Duration or width modulation ; Duty cycle modulation
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0043—Converters switched with a phase shift, i.e. interleaved
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
- H02M3/1584—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/493—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode the static converters being arranged for operation in parallel
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/539—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency
- H02M7/5395—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency by pulse-width modulation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/01—Shaping pulses
- H03K5/08—Shaping pulses by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Inverter Devices (AREA)
- Dc-Dc Converters (AREA)
Abstract
A method of generating offset drive control pulses for half bridges included in polyphase transformers or direct voltage transformers comprises the step of displacing a reference voltage U<SB>Ref</SB> (31) by a delay time or dead time T<SB>o</SB> (33) or displacing a control voltage U<SB>St</SB> (30) by the delay time or dead time T<SB>0</SB> (33) respectively divided by the number of offsets. The control signals may be PWM signals. The delay may be achieved using a digital delay element, a shift register, or counter.
Description
METHOD OF GENERATING OFFSET DRIVE CONTROL SIGNALS
The present invention relates to a method of generating offset drive control signals for power semiconductors, particularly half bridges.
The conversion of electrical energy, for example in a vehicle on-board power supply, is usually carried out by static transformers, by which direct magnitudes are converted into alternating magnitudes of a specific frequency or alternating magnitudes are converted into direct magnitudes. The possibility also exists of converting direct magnitudes into direct magnitudes, for example a direct voltage into a direct voltage with a different voltage level. A transformer for converting electrical energy is described in DE 199 47 476.1. This transformer is used in an on-board power supply system of a vehicle and comprises at least one half bridge. The half bridge in turn comprises at least one high-side switch and at least one low-side switch, the switches of the half bridge being present in any number.
The high-side switches are connected with a positive pole and the iowside switches either with ground or with a negative pole, which is connected with a component generating electrical energy, for example a three-phase alternator. Arranged in parallel with the half bridge is an intermediate circuit capacitor, the capacitance of which is kept as small as possible. In order to achieve this, the drive control of this switches is carried out at an offset from one another so that the current to be supplied by the intermediate circuit capacitor remains as low as possible.
In the case of direct-currenVdirect-current converters (DC/DC converters) in use at present only one pulse-width-modulated (PWM) signal is generated in the case of a single-phase connection. The drive control method usually involves generation of a reference signal in the shape of a trapezium. In this drive control method the reset time points are displaced relative to one another each time by a half period duration T/2. A disadvantage with reference signals extending in trapezium-shaue is the deteriorated characteristics thereof with respect to the EMV. Moreover, in this drive control method it is disadvantageous that the reset time instants are fixed at the half period duration T/2 and therefore use with multiphase half bridges with offset keying is possible only with increased outlay.
According to the present invention there is Rodeo a method of generating offset drive control signals for half bridges, which are n:;,uded in polyphase transformers or direct
voltage transformers, comprising the step of displacing a reference voltage by a delay time corresponding with the offsets or displacing a pulse-width-modulated signal by a delay time corresponding with the period duration divided by the number of offsets.
Multiphase half bridges with offset keying can be reliably controlled in drive by a method exemplifying the invention, wherein the offsetting of the drive control pulse can take place in two different ways In one procedure, the reference voltage can be displaced by a time period This can be managed by means of a signal generator or by use of an analog delay element at which the dead times are presettab!e within wide ranges. According to the number of half bridges employed, drive instants uniformly spaced apart in time can be set in order to produce sufficient drive control pauses At these instants there takes place a drive control of the corresponding half bridge by means of centre-aligned PWM drive control commands (centre-aligned PWM), which is preferred for. avoidance of signal blurring and signal overlapping of an edge-aligned PWM. In the other procedure, the offsetting of the drive control pulse can be carried out by a displacement of the PWM pulse by a dead time. For that purpose use is made of a T member, for example, a dead-time element operating in analog manner or a shift register Within the scope of generation of drive control signals in digital manner there can be used counters which are reset at the respective positive/negative flanks of the controlling PWM signal. The count states of the digital counters are evaluated and, on fulfillment of specific criteria, output gates can be set or reset in signal-dependent manner.
In the case of doubly offset keying of the drive control signals, it is possible to mirror either the reference voltage or the control voltage and in this manner to modulate a PWM signal, i.e. to effect displacement in terms of time within the period duration The method for the generation of offset drive control pulses for multiphase half bridges can be delectably executed as a software algorithm in a microcontroller or as a programmable logic; it can obviously also be realised as a hardware structure.
Examples of the method exemplifying the invention will now be more particularly described with reference to the accompanying drawings, in which: Fig. 1 is a circuit diagram of a module of a half bridge for offset drive control, to which a method exemplifying the invention can be applied;
Fig. 2 is a circuit diagram of a complete three-phase converter, formed from three identical half bridges, for offset drive control, to which a method exemplifying the invention can be applied; Fig. 2.1 is a circuit diagram of a direct voltage transformer (DC/DC transformer) with different voltage levels, to which a method exemplifying the invention can be applied; Fig. 3 is a diagram showing displacing of a reference voltage URef, by To in first and second methods exemplifying the invention; Fig. 4 is a diagram showing displacing of PWM signals by a delay time To = Tper Od/n in third and fourth methods exemplifying the invention; Fig. 5 is a diagram of a circuit for generation of PWM signals for doubly offset switching by a delay element; Fig 6 is a diagram of a circuit for conversion of the time delay by means of reflection of the reference voltage for U = 50%; Fig. 7 is a diagram of a circuit for generation of offset PWM signals for doubly offset keying; and Fig. 8 is a diagram of a circuit for digital conversion of the time delay by counters for positive/negative flanks of the PWM signal.
Referring now to the drawings, there is shown in Fig. 1 a module of a half bridge for a transformer with offset drive control. The half bridge contains, by way of example, four switches 4, 5, 6 and 7 connected in parallel and a further four switches 8, 9, 10 and 11 also connected in parallel. However, any other number of parallel switches or another number of parallel part branches is also conceivable. The module also includes an intermediate circuit capacitance 2 and decoupling inductances 3.1, 3.2, 3.3 and 3.4, which are required for the functional capability of the transformer.
Fig. 2 shows a complete three-phase transformer formed from three identical half bridges 12, 13 and 14 for offset drive control. A respective capacitance 2 and a respective set of
decoupling inductances 3.1, 3.2, 3.3 and 3 4 are associated with each of the half bridges 12, 13 and 14. The drive control of the switches can be managed by, for example, arrangement of a control and regulating device. The phase windings 15, 16 and 17 of a three-phase alternator, which is operated by way of the multiphase transformer containing the individual half bridges 12, 13 and 14, are indicated by way of example in schematic form. Fig. 2.1 shows a direct voltage converter (DC/DC converter) 18 with different voltage levels, the converter including a half bridge analogous to that of Fig. 1. The switches 4, 5, 6 and 7 are arranged on the high side of the half bridge and the switches 8, 9, 10 and 11 are disposed on the low side of the half bridge. The individual parallel branches of the half bridge of the direct voltage converter 18 are respectively provided with decoupling inductances 3.1, 3.2, 3.3 and 3.4. In departure from the half bridge of Fig. 1, a further capacitance in the form of a capacitor 21 is present in the converter 13. A first voltage level 19 is represented by a direct voltage of 14 V, by which a part of a vehicle on- board mains can be supplied, and the second voltage level 20 is represented by, for example, a level of about 42 V, by which further loads of the mains can be supplied.
Methods of generating offset drive control signals for the switches of the half bridge or half bridges are shown in Figs. 3 and 4.
Fig. 3 shows the displacement of a reference voltage URef by a delay time To. In this method, in the lefthand diagrams of Fig. 3 the path 30 of the control voltage US does not change over time. Superimposed on the control voltage path 30 is the triangular path 31 of the reference voltage URe,,. The pulse-width-modulated signal (PWM1) is reproduced as a rectangularly extending signal path 32. If the reference voltage path 31 is displaced by an amount 33 of the delay time To, a reference voltage path 35 correspondingly displaced by the delay time To amount 33 is set The delay time To is determined by the equation To = Tpe,iOd/n.
wherein n signifies the number of offsets, i.e. the keying.
In the righthand diagrams of Fig. 3, the same effect is achieved by a displacement of the PWM signal by the delay time To amount 34 with the control voltage path 30 and reference
voltage path 31 remaining unchanged. The reference voltage path 31 is, as before, substantially triangular, which is of significant advantage for the use of a centre-aligned PWM signal, particularly with respect to improvement of the EMV. The path of the resulting, displaced PWM signal is, according to Fig. 3, denoted by 36 and is displaced by the delay time amount 34, like the reference voltage path 31 in the lefthand diagram of Fig. 3. Fig. 4 shoves the generation of offset PWM signals by mirroring or reflection of the control voltage US and mirroring or reflection of the reference voltage URef with doubly offset keying (n = 2).
The reflection of the voltage path 31 of the reference voltage URef for U = 50 % is illustrated in the lefthand diagrams of Fig. 4. Inversion of the reference voltage path 31 to provide path 37 results from reflection of the reference voltage URef at the reflection axis 38, which in this example is intentionally selected by U = 50 %. The following equations thus respond to the PWM signal paths 32 and 36 which arise: PWM1 = SIGN (URef1 - Use) PWM2 = SIGN (URe 2 - Us) A comparison of the path 32 of the PWM1 signal with the path 36 of the PWM2 signal shows that a displacement of the second PWM signal path 36 by the amount 33 of the delay or dead time To takes place through the illustrated manipulation of the reference voltage path 31.
A further possibility for generation of a delay of the PWM signal path 31 is reproduced in the righthand diagrams of Fig. 4. These diagrams also relate to the case n = 2, thus a doubly offset keying of the PWM signal. In this example of the method, the path 31 of the reference signal, i.e. the reference voltage URe,, is maintained and runs continuously triangularly, whilst the path 30 of the control voltage US is reflected or mirrored at the reflection axis 38 for U = 50 % The formation of the PWM signal paths 32 and 367 the latter providing the inverted PWM signal 39, takes place in this variant in accordance with the following equations: PWM1 = SIGN (URef- Used) PWM2 = SIGN (Use - URef).
A delay of the second PWM signal path 36 by the amount 33 of the delay or dead time To can also be achieved by the reflection of the control voltage Use.
A circuit arrangement for generating PWM signals with doubly offset switching can be inferred from Fig. 5. The output PWM signal is tapped at a tap point and applied to a delay element 40. If the delay element 40 is an analog delay element, the delay time To can be preset thereat to obtain a PWM1 signal 36 displaced in time. If the conversion takes place in a digital manner, a shift register can be used at delay element 40.
Fig. 6 shows a circuit for conversion of the time delay by means of reflection of the reference voltage URef, i e. the signal path 31. This circuit corresponds with the conversion shown in the lefthand part of the diagram of Fig. 4. The control voltage Use, which provides the signal path SO, is fed to both inputs, which have positive signs, of the input side 44 of operational amplifiers 41 and 42. At the outputs 45 of the amplifiers 41 and 42 the output signals thereof are connected with the inverted inputs of K elements 46 and 47, at the outputs of which in turn the PWM signals 32 and 36 displaced in time relative to one another arise and can be tapped off.
The reference voltage URef is applied to the + input of the K1 element 46 directly and to the + input of the K2 element 47 via an inverting stage 43. The reflection axis 38 is implemented at this for U = 50 %; according to the equation y = x - 1 the reference voltage URe, is reflected and can be set according to the path 31 reproduced in the lefthand diagrams of Fig. 4, i.e. displaced in time.
Fig 7 shows a circuit for generation of offset PWM signals for doubly offset switching with reflection of the control voltage US for U = 50 % and subsequent formation of the inverted PWM signal. For the reflection, which is reproduced in the righthand part of Fig. 4, of the control voltage US the inverting stage 43 is, in the circuit of Fig. 7, connected upstream of the operational amplifier 42. In this variant for the case n = 2, the reference voltage URef is applied directly to a K1 element 46 and a <2 element 47. At the outputs of the K1 element 46 and the K2 element 47 there arise the PWM1 and PWM2 signals, respectively (paths 32 and 36) which are displaced relative to one another in time by To, i.e. in correspondence with the set delay or dead time.
A digital conversion of the time delay of PWM signals by digital counters for positive/negative signal flanks of the PWM signal is possible by the circuit shown in Fig. 8.
In this digital embodiment, a pulse transmitter 50 (CLK) is connected by way of connecting lines with a clock input 52 of each of two flip-flops 51 and 53 connected in series, the flip-
flops also being acted on by a controlling - the master- PWM signal. The positive output of the first flip-flop 51 is connected with one input of a NAND logical unit 55 and one input of an OR logical unit 54. The negative output of the second flip-flop 53 is similarly connected with the other two inputs of the units 54 and 55.
A start signal deriving from the pulse transmitter 50 is applied, apart from to the two clock signal inputs 52 of the two flip-flops 51 and 53, to a pulse transmitter input 60 of each of two digital counters 56 and 57. The counter 56 counts the positive flank transits 58 and the counter 57 counts the negative flank transits 59. The respective positive/negative flanks of the master PWM signal are reset at the counters 56 and 57. The counters 56 and 57 can be executed as, for example, 12 bit counters, which offset the positive flank by the dead time To or, in the alternative, the negative flank 59 of the master PWM signal by the dead time To.
Count values, which are merely examples, are indicated in the following table.
count values for conditions for "high" TPWM = 50 Ins To = 500 ns set reset ___ HS1 Z_p (56)= 16 Zap 57) - 1 LS1 Z_n (57) = 16 Z_p (56) = 1 HS2 Z_p (56) = 766 Z_n (57) = 751 LS2 Z_n (57) = 766 Z_p (56j - 751
Claims (11)
1. A method of generating offset drive control signals for a half bridge for a transformer, comprising the step of displacing a reference voltage by a delay time corresponding with the offsets or displacing a pulsewidth-modulated signal by a delay time corresponding with the period duration divided by the number of offsets.
2. A method as claimed in claim 1, wherein the step of displacing the reference voltage is carried out by triggering a signal generator.
3. A method as claimed in claim 1, wherein the step of displacing the reference voltage is carried out by means of a delay element which is arranged in the signal path and at which the delay time or dead time is predeterminable.
4. A method as claimed in claim 1, wherein the step of displacing the pulse-width-
modulated signal is carried out by means of a digital delay element.
5 A method as claimed in claim 1, wherein the step of displacing the pulse-width-
modulated signal is carried out by means of a shift register.
6. A method as claimed in claim 1, wherein the output signal pulse of the pulse-width-
modulated signal is that of a centre-aligned pulse-width-modulated signal.
7. A method as claimed in claim 1, wherein the delay of the pulse-widthmodulated signal is carried out by means of digital counters.
8. A method as claimed in claim 7, wherein one of the counters is associated with the positive flank and the other with the negative flank of the pulse-width-modulated signal.
9. A method as claimed in claim 1, wherein doubly offset keying is carried out and the reference voltage is mirrored by being passed through an inverting stage.
10. A method as claimed in claim 1, wherein doubly offset keying is carried out and the control voltage is mirrored by being applied to an inverting stage.
)
11. A method as claimed in any one of the preceding claims, wherein the conversion of the offset drive control is implemented as a software algorithm in a microcontroller or as a programmable logic.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE10110615A DE10110615A1 (en) | 2001-03-06 | 2001-03-06 | Process for generating drive pulses for power semiconductors |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| GB0204917D0 GB0204917D0 (en) | 2002-04-17 |
| GB2377095A true GB2377095A (en) | 2002-12-31 |
| GB2377095B GB2377095B (en) | 2003-06-04 |
Family
ID=7676405
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB0204917A Expired - Fee Related GB2377095B (en) | 2001-03-06 | 2002-03-01 | Method of generating offset drive control signals |
Country Status (3)
| Country | Link |
|---|---|
| DE (1) | DE10110615A1 (en) |
| FR (2) | FR2821995B1 (en) |
| GB (1) | GB2377095B (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101865080A (en) * | 2010-06-28 | 2010-10-20 | 苏州能健电气有限公司 | Dead zone generation circuit of driver of variable pitch control system |
| RU2654295C1 (en) * | 2016-11-23 | 2018-05-18 | Федеральное государственное бюджетное образовательное учреждение высшего профессионального образования "Новосибирский государственный технический университет" | Autonomous voltage inverter control method |
| RU2747743C1 (en) * | 2020-11-02 | 2021-05-13 | Павел Ахматович Рашитов | Control method for single-phase bridge autonomous voltage inverter |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7199747B2 (en) * | 2005-05-03 | 2007-04-03 | M/A-Com, Inc. | Generating a fine time offset using a SiGe pulse generator |
| DE102007025229A1 (en) | 2007-05-31 | 2008-12-04 | Robert Bosch Gmbh | Multiphase DC-DC converter |
| DE102007043603A1 (en) | 2007-09-13 | 2009-03-19 | Robert Bosch Gmbh | Multiphase DC-DC converter |
| DE102009000096A1 (en) | 2009-01-09 | 2010-07-15 | Robert Bosch Gmbh | Method for controlling a power supply device with an inverter |
| DE102009029091A1 (en) | 2009-09-02 | 2011-03-03 | Robert Bosch Gmbh | Jump-start procedure and device for carrying out the method |
| RU2556874C1 (en) * | 2014-03-20 | 2015-07-20 | Федеральное государственное бюджетное образовательное учреждение высшего профессионального образования "Новосибирский государственный технический университет" | Control method of self-commutated inverter |
| AT523973A1 (en) * | 2020-07-02 | 2022-01-15 | Avl List Gmbh | DC converter with extended voltage range |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1342930A (en) * | 1972-05-22 | 1974-01-10 | Electrical Research Ass | Pulse width modulation systems |
| GB1370495A (en) * | 1971-02-04 | 1974-10-16 | Borg Warner | Power switching means |
| GB1578423A (en) * | 1978-02-20 | 1980-11-05 | Vnii Vagonostroenia | Thyristor pulse-width controlled converter digital control apparatus |
| GB2145583A (en) * | 1983-08-23 | 1985-03-27 | Westinghouse Electric Corp | Inverter firing control with compensation for variable switching delay |
| GB2177555A (en) * | 1985-06-27 | 1987-01-21 | Westinghouse Electric Corp | Switching time correction circuit |
| US5515258A (en) * | 1993-01-15 | 1996-05-07 | Siemens Aktiengesellschaft | Drive device for a push-pull stage |
| US5995381A (en) * | 1997-07-08 | 1999-11-30 | Media Technology Corporation | Pulse width modulation controlled switching regulator |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3226001A1 (en) * | 1982-07-12 | 1984-01-12 | Siemens Ag | METHOD FOR GENERATING CONTROL IMPULS FOR A DC CONTROLLER AND CIRCUIT ARRANGEMENT FOR IMPLEMENTING THE METHOD |
| JP2888068B2 (en) * | 1992-11-30 | 1999-05-10 | 株式会社日立製作所 | Control method of parallel multiple inverter and device thereof |
| AU688699B2 (en) * | 1996-01-16 | 1998-03-12 | Illinois Tool Works Inc. | Plasma cutting or arc welding power supply with phase staggered secondary switchers |
| US5905369A (en) * | 1996-10-17 | 1999-05-18 | Matsushita Electric Industrial Co., Ltd. | Variable frequency switching of synchronized interleaved switching converters |
| DE19720948A1 (en) * | 1997-05-17 | 1998-11-19 | Bosch Gmbh Robert | Voltage conversion device |
| US6144194A (en) * | 1998-07-13 | 2000-11-07 | Linear Technology Corp. | Polyphase synchronous switching voltage regulators |
| US6198261B1 (en) * | 1998-10-30 | 2001-03-06 | Volterra Semiconductor Corporation | Method and apparatus for control of a power transistor in a digital voltage regulator |
| US6043634A (en) * | 1998-12-22 | 2000-03-28 | Intel Corporation | Interleaved switching regulator |
-
2001
- 2001-03-06 DE DE10110615A patent/DE10110615A1/en not_active Ceased
-
2002
- 2002-03-01 GB GB0204917A patent/GB2377095B/en not_active Expired - Fee Related
- 2002-03-06 FR FR0202837A patent/FR2821995B1/en not_active Expired - Lifetime
- 2002-08-08 FR FR0210089A patent/FR2827094B1/en not_active Expired - Fee Related
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1370495A (en) * | 1971-02-04 | 1974-10-16 | Borg Warner | Power switching means |
| GB1342930A (en) * | 1972-05-22 | 1974-01-10 | Electrical Research Ass | Pulse width modulation systems |
| GB1578423A (en) * | 1978-02-20 | 1980-11-05 | Vnii Vagonostroenia | Thyristor pulse-width controlled converter digital control apparatus |
| GB2145583A (en) * | 1983-08-23 | 1985-03-27 | Westinghouse Electric Corp | Inverter firing control with compensation for variable switching delay |
| GB2177555A (en) * | 1985-06-27 | 1987-01-21 | Westinghouse Electric Corp | Switching time correction circuit |
| US5515258A (en) * | 1993-01-15 | 1996-05-07 | Siemens Aktiengesellschaft | Drive device for a push-pull stage |
| US5995381A (en) * | 1997-07-08 | 1999-11-30 | Media Technology Corporation | Pulse width modulation controlled switching regulator |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101865080A (en) * | 2010-06-28 | 2010-10-20 | 苏州能健电气有限公司 | Dead zone generation circuit of driver of variable pitch control system |
| RU2654295C1 (en) * | 2016-11-23 | 2018-05-18 | Федеральное государственное бюджетное образовательное учреждение высшего профессионального образования "Новосибирский государственный технический университет" | Autonomous voltage inverter control method |
| RU2747743C1 (en) * | 2020-11-02 | 2021-05-13 | Павел Ахматович Рашитов | Control method for single-phase bridge autonomous voltage inverter |
Also Published As
| Publication number | Publication date |
|---|---|
| DE10110615A1 (en) | 2002-09-19 |
| FR2827094A1 (en) | 2003-01-10 |
| GB0204917D0 (en) | 2002-04-17 |
| GB2377095B (en) | 2003-06-04 |
| FR2821995B1 (en) | 2010-03-12 |
| FR2827094B1 (en) | 2008-07-18 |
| FR2821995A1 (en) | 2002-09-13 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 20160301 |