GB2375445A - Infinite capacity information sources - Google Patents

Infinite capacity information sources Download PDF

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Publication number
GB2375445A
GB2375445A GB0111554A GB0111554A GB2375445A GB 2375445 A GB2375445 A GB 2375445A GB 0111554 A GB0111554 A GB 0111554A GB 0111554 A GB0111554 A GB 0111554A GB 2375445 A GB2375445 A GB 2375445A
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oscillators
universal
oscillator
period
main
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Theofanis Raptis
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APPLIED ENDOPHYSICS Ltd
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APPLIED ENDOPHYSICS Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/34Analogue value compared with reference values
    • H03M1/36Analogue value compared with reference values simultaneously only, i.e. parallel type
    • H03M1/368Analogue value compared with reference values simultaneously only, i.e. parallel type having a single comparator per bit, e.g. of the folding type

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)

Abstract

Each of oscillators 1 to L0 has a period twice the period of the previous oscillator.

Description

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Infinite Capacity Information Sources . C. I. S.) 1 Specification j We, APPLIED ENDOPHYSICS LTD, a corporation of United Kingdom, do hereby declare the invention for which we claim that a patent may be granted to us, and the method by which it is to be performed, to be particularly described in and by the following statement: The present invention relates to novel methods and means for manipulating information and complexity. These methods have been thoroughly and extensively studied in the framework of the theory of Universal Lexicons as this has been exposed in a series of Technical reports published by our corporation, namely Tech. Report Xl/30-10-2000, (Infinite Ca- pacity InforTaaion Sources and thezr Applications), Tech. Report X4/30-10-2000, (Deep Structure, Universal Lexicons and Information Unfolding Processes), Tech. Report X6/15- 3-2001, (CommunMcation Protocols based on Optimal Compression). The invention has been termed, a Universal Multiplexer and it is accompanied by two protocols which stand either for microcontroller instruction sets or direct circuitry or a combination of both. It can be
described as an array of oscillators spanning an exponential range of frequencies [/0, 2-'fO] where L is an integer index labeling each oscillator and/0 the highest frequency attainable.
Each of the oscillators may or may not be coupled to all other oscillators. Coupling may be controlled through a connectivity matrix in which case it forms a network of oscillators.
Different types of oscillators correspond to different programming needs for this device. We classify them as square, harmonic or ramp oscillators and we will distinguish each case at each specific application. Primary role of the coupled mode is adjustment of phase relationships or of the periods of individual oscillators according to a pre-specified schedule except if otherwise stated. Collective states of the coupled or uncoupled array may be sampled at subsequent times according to an external schedule. The tremendous simplicity of the Universal Multiplexer combined with the exponentially increasing number of stored messages, is accompanied by a special theoretical framework which supports it with unique capabilities like erasure-free computation (quantum computation). It also permits various implementations, either in analogue/digital hardware or in photonic circuitry. It is also possible to use solid-state devices manufactured on bulk crystals utilizing special physical properties of materials like phonon oscillations that permit the direct transference of the oscillator model in large scale integration. In the general description provided below, we will use a conventional electronics viewpoint except if otherwise stated. All of the above make the Universal Multiplexer a valuable candidate for a new computer architecture with a variety of applications in computer industry, telecommunications, automation and robotics.
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2 General Description The mathematical justification of the functionality of the aforementioned Universal Multiplexer is based on the theory of Universal Lexicons and cannot be fully understood without recourse to the fundamental notions of this theory which has been developed in the course of a long research on the full potential and the capabilities of the aforementioned Universal Multiplexer. For the shake of clarity we first give some preliminary definitions.
definition 1 (i) a code or message will be used to denote an arbitrary symbolic sequence, usually in a binary format, mdependently of the kind of encoding used (ASCII, Hufmann, etc) in a specific context or, of the interpretation.
. (ii) A transmission channel will denote an arbitrary'medium (wired/wreles ? used for communication. Problems concerning the transmission itself will be considered as already covered by existing theory. except if otherwise stated.
* (iii) A L-Lexicon will denote an ordered collection of all 2'binary sequences (messages) of length L in the form of a L X 2L matrix. We will refer to the entries of such a matrix with a set of indices called Length index (L) and Sequence Index (S) for rows and columns respectively.
* (iv) A Universal Lexicon will denote the limit L # # of an L-Lexicon in the form of a biinfinite matrix and will be denoted as UL (b).
. (v) A Natural Ordering is given by y the exact correspondence of the absolute value of a specific binary sequence in any other arithmetic base. Thus, the natural ordering adopted here corresponds to the natural numbers 0,1, 2, Do with the sequence index given as a shift 1, 2, 3,..., 00.
. (vi) A Reordering of a Universal Lexicon is a permutation or a 11 discrete integer function that performs a rearrangement of all the column vectors of the Lexzcon matrix.
Any computation may be proven equivalent to a specific Reordering of a Lexicon matrix.
The properties of the abstract entity referred here as the Universal Lexicon, occur from a geometrical representation. An example of this representation is presented in FIG. 1 in the form of a finite approximation which is the 10 x 1024 Lexicon matrix. From this representation we deduce 'Principle of Scale-Invariance The infinite matrix representation of a Ur (2)-matrix is a self-similar object and can thus be reconstructed with a minimal instruction set. The same holds true for any UL (b)-Lexicon.
. Principle of Interconnectedness All codes are eventually interconnected and form a network as it can be shown also with the aid of a theorem that proves the existence of Trace signals with which all messages can be classified independently of the length used.
* Principle of Complementarity For any finite approximation of an infinite Lexicon matrix constructed from the collection of all codes standing for column vectors, there exists a complementary construction using only row vectors. A simple inspection of the Lexicon
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matrix reveals that the same matrix can also be reconstructed from an exponential sequence of periods of the form 2'To where To is the lowest period.
A direct correspondence of the above construction with a Universal Multiplexer is selfevident from the last principle. For this we identify each row vector of the Lexicon matrix with the time series that occur from the sampling of each individual oscillator, where now each oscillator label corresponds to the length index shifted as L -1. In the example given in FIG. 1 we use 9 square oscillators of which the outputs correspond to each row vector of the matrix. Also, we label the 9 different periods of this group of oscillators with the same label so that all periods may be put in ascending order in the range [2, 29]. Universality is here used to denote the fact that the same infinite matrix is obtainable even with finite means, which is with a finite number of oscillators. It also serves for proving its equivalence with a Universal Turing Machine. We further explain the utility of such a d'evice as an information source by introducing a special sampling protocol under which we will call this device, an OMNIPLEX machine and for which we will also explain its capability as a powerful compression device.
Some preliminary definitions are given here definition 2 o (i) A Duty Cycle is here used to denote the highest period of an oscillator.
Given a labeling of Lo oscillators in the range [1, LoL we assign to each oscillator the distinct periods in the range [2To, 2LoTo] and the corresponding frequencies [2-1 fo, 2-Lo 10J where fo = 21r/To. Then, 2To is the lower oscillator perwd and Tmax = 2LoTo is the highest or Duty Cycle period. o (ii) A Minimum Range is here used to denote the binary representation of all integer numbers in the range [0, 2 -1] where Lo is the label used for labeling the oscillators in the range [1, Lo]. o (iii) A Sampling of the oscillators outputs is here used to denote a measurement of the
collective state of all oscillators from label 1 to label Lo for a pre-specified time interval and of which the outcome can then be stored in a static memory or transfered by any means to any other device.
* (iv) A minimum Sampling Rate is denoted here to be the lower frequency bound fo
corresponding to the lower bound To of all oscillator periods. o (v) A Sampling Schedule is here used to denote a special protocol for altering the sampling rates of the oscillators at subsequent operations.
At a sampling rate equal to To, all the binary codes in the minimum range can be retrieved during a Duty Cycle. All codes are periodically repeated with each Duty Cycle. We say that the Universal Multiplexer is equivalent with a Dynamic Memory at this operational mode. All codes in the minimum range are dynamically encoded in the phase relations of the oscillators. For this use we utilize either an array of square oscillators or an array of harmonic oscillators sampled between peaks and zeroes of their outputs.
We now explain the OMNIPLEX Protocol by which we can indefinitely increase the capacity of this memory at the cost of increase of the equivalent Duty Cycle. For this we introduce a special Sampling Schedule which corresponds to a sequence of periods higher than those attainable by the set of Lo oscillators. The Protocol consists of the steps that realize a
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sequence over the Length and Sequence indices. We say that the machine forms an Unfolding sequence when operating on this mode. For this sequence we present the following Sampling Schedule < * After the first Duty Cycle, the first plurality of codes inside the minimum range, or any specific code indexed fom the plurality of codes are stored in a static RAM memory and/or transfered to other devices. w At the next step the same Duty Cycle is repeated until all outputs of all oscillators are concatenated with each one of the plurality of codes previously stored in the static RAM memory and/or they are directly transfered to other devices for further processing. This step is completed after exactly 2'0-I Duty Cycles and it constitutes a new increased Duty Cycle thus expanding the previous contents of the static RAM memory.
* Concatenation of each new code to a previously stored one is here used to denote the addition of the new code in front of the previously generated one.
. We continue this process ad infinitum until all external static RAM memory has ex- ceeded its maximum capacity or no further demand is presented by any other external device which dissipates the information produced by the Universal Multiplexer.
Using the above procedure it is proven by induction, that any other code from a plurality of codes outside the minimum range becomes retrievable independently of the length of this code. In the infinite time limit we may retrieve all binary codes of length [0, 00).
Furthermore, any other encoding in an arbitrary alphabet of symbols in the range [0, b] is also retrievable by altering from square to ramp oscillators producing sawtooth waveforms at the same exponential range and appropriately adjusting the output sampling rate to exactly b samplings/period. We conclude that the aforementioned Universal Multiplexer described above constitutes the first physical application of an information source of infinite capacity as its production rate diverges while its algorithmic description is a minimal one.
In FIG. 2 we present the simplest schematic representation of a Universal Multiplexer for arbitrary base encodings using ramp oscillators.
In FIG. 3 we present the schematic representation of a arbitrary binary pattern generator using a Universal Multiplexer under the OMNIPLEX Protocol.
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3 Applications 3.1 Universal Simulators/Universal Constructors According to the theory of Universal Lexicons, the following conjectures are a natural result of the existence of information sources of unlimited capacity. conjecture 1 o (i)Self-descriptiveness The Universal Lexicon contains the code for its own reconstruction. There exists a lower bound of complexity L1 for which the descrip- tion of a minimal Unfolding algorithm and a minimal machine description becomes reachable.
* (ii) If a certain system is able to produce an L1-Lexicon, than it can also produce any other L2 Lexicon of finite length in a finite time. fi (iii) For a certain length L2#L1, the L2-Lexicon contains the codes of any other system that is able to produce an L1-Lexicon, of which the complexity is bounded from above by that length L2 * (iv) For a finite length L2#L1, the L2-Lexicon contains any possible combination, therefore a system able to produce an L2-Lexicon is able to find a code for zts own
reproduction, as far as the complexity of the corresponding system is bounded from above by that length L2.
The invention presented here under the name Universal Multiplexer with the accompanying OMNIPLEX protocol is a direct physical equivalent of an unlimited information source. The conjectures referred to information sources apply to the Universal Multiplexer as well, under appropriate conditions of which a detailed description is given immediately. For this we introduce also two important technical definitions. definition 3 o (i) A Universal Multiplexer is considered as being embodied in a larger
device in any one of the following two cases (0 :) if it accepts inputs controlling or affecting in any way the phases or the periods of the individual oscillators.
( ) if it transfers or transmits by any means posszble, all or some codes from the plurality of codes produced during one or more of its Duty Cycles.
# (ii)Kernel-Shell Model A Kernel-Shell model is formed by an arbitrary discrimina- tion between two separate subsystems forming a composite system if these subsystems satisfy the following criteria (a) A Kernel is an unlimited information source preserved for the construction of any
required symbolic sequence, which can then be interpreted as a random piece of code, or as a whole program or as a description of an abstract machine, which is to mean any possible interpretation of these symbols as a sequence of commands understood from the machine in which this source has been embodied. Consistency of the resulting command sequence is not checked for inside the Kernel.
() A Shell is a collection of measuring apparata that perform internal measurements of the Kernel states as well as Filters or Selection Rules that mediate the flow or transference of information from the Kernel to itself or various other Shells and check for the
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consistency of the resulting command sequence, thus forming the necessary Interface for the various devices that the Shell or other Shells may contain.
A Universal Multiplexer is to be considered as a Kernel if embodied in any other device or set of devices in the sense of definition 3 - (i) and 3- (ii)-.
In the simplest example we consider a microcontroller or a set of microcontrollers forming a Shell which then either controls the recording of some or all codes from the plurality of codes produced during one or more Duty Cycles or it controls other devices and peripherals.
Any of these micro controllers requires a pre-specified instruction set loaded in an auxiliary static memory. Any of these instruction sets is considered here as a binary code in machine language. Any of these instruction sets is assumed here to have a length L* < Lax < Lo where is an upper bound for all the lengths of the separate instruction sets and Lo is the number of separate oscillators of the Universal Multiplexer or the maximum capacity of a static RAM memory storing a maximum number of codes for temporary or permanent use. We also reserve a special instruction set which is located in a permanent address of a static ROM memory and which performs a recognition task by direct comparison of all other instruction sets with the plurality of codes produced by the Universal Multiplexer or stored already in the static RAM memory. For proper identification we adjust all instruction set lengths by adding at the end of each code an amount of zeroes equal to Lo-L*. This Recognition task ends after all of the instruction sets of all other microcontrollers including the specially reserved code have been identified in which case their address can be stored with the use of auxiliary oscillators specially reserved for that purpose. Addressing and Retrieval of special codes with auxiliary oscillators is explained in section 3.2. For the purposes of the present exposition, we use the above as a sufficient model for building a Recognition Machine able to mimic any other device of which the function is based on a finite static instruction set.
We will say that the Recognition Machine has assimilated the external behavior presented.
3.2 Quantum Computing In the present subsection we present some more important properties that permit to state an equivalence of a Universal Multiplexer with other computing architectures. Comparison is possible due to theoretical results that permit a direct translation of the set of operations of a Universal Tuning Machine into an equivalent set of operations on the Universal Multiplexer.
Complete treatment of this problem is out of the scope of the present report. We restrict our attention in the addressing problem.
Any read/write operation as well as any addressing operation which should result in retrieval of a specific code is to be replaced here with the measurement of a time interval. By the term measurement we will mean here the adjustment of the phase and the period of an auxiliary oscillator specifically reserved for this purpose. Location of a specific code is then to be done with an external set of comparators which is used to verify that a synchronization function has been zeroed at a specific time instant. The collective state of the outputs of the set of main Lo oscillators of the Universal Multiplexer at this specific time instant is the requested code. Readjustment of the phase and period of any auxiliary oscillator is achieved through a direct measurement of the relative time distance of the previous sequence index and the next one on request.
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In FIG. 4 we show an example of this functionality of a Universal Multiplexer for the addressing or read/write problem.
We now use this fact as a direct proof of a classical analogue of quantum computation for the following reasons.
* It is a well established scientific fact that any classical computation that performs a read or write operation on a static memory dissipates energy and thus cannot be capable of quantum computation.
* It is a well established scientific fact that dissipation can always be considered a result of erasure of data from memory.
'A dynamic memory with a functional protocol as given above is an erasure-free device, so it should in principle be capable of quantum computation.
. Other sources of dissipation can be eliminated by direct use of superconducting mate- rials.
Direct implementation of a photonic dynamic memory using squeezed coherent photon states instead of the oscillators is possible as long as the squeezing parameters are controllable in the exponential range required for the initial set of Lo oscillators. Further extention of the above description is possible using the equivalence between computations and Reorderings as given in definition 1- (vs). In this framework we do not make a distinction between arithmetic-logic operations and main memory as in the classical Von Neumann architecture.
3.3 Prime factorization of large numbers As a consequence of the theory of Universal Lexicons it occurs that a special prime factorization algorithm is possible using a Universal Multiplexer. As any such algorithm is of much importance for security encryption and decryption standards we outline the implementation of such an algorithm in brief here.
Use of highly parallelized circuitry with VLSI design permits us to incorporate a variety of Universal Multiplexers working on a large variety of bases simultaneously. Use of scale invariance and special decomposition theorems permits us to locate each prime factor sequentially either in ascending or in descending order. For this we utilize synchronization functions and multi-base Resonant patterns as predicted by the Universal Lexicon theory.
3.4 Communication Devices As a consequence of the Principle of Interconnectedness, it is possible to establish communication between separate Universal Multiplexers on a minimum information exchange basis. For this we introduce a specialized communication protocol which we will call ZIP LEZ Protocol. Theoretical justification is based on a proof of the existence of Trace signals with the use of which it is possible to build a unique correspondence between classes of different messages.
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We now explain the ZIPLEX Protocol for optimal compression and decompression of messages using Trace signals. In the following we discriminate between two cases which are distinguished with respect to (i) encoding of a message of length L < Lo-1 where Lo is the number of separate oscillators of the Universal Multiplexer in use and, (ii) encoding of a message of length L > Lu - 1 whereas we have to make use of an additional part of the protocol distinguished with respect to (1) Equipartitioning or (2) Variable partitioning. In the following we always assume that a specific message has been formed as a result of a previous computation or any other activity of a Shell as defined in 3- (it')- 3.4. 1 Case (i) * The message arriving at the Universal Multiplexer for transmission is identified with the aid of an auxiliary oscillator under the addressing protocol as explained in section 3.2.
* The period of the auxiliary oscillator is then varied until it reaches the new value Taux + 2L+1 where L is the length of the original message. t The time difference from the last root of a synchronization function as measured from a comparator for the new value of the auxiliary oscillator and the end of the corresponding
Duty Cycle is recorded in units of the clock defining the minimum sampling rate fo.
* The recorded value is transfered at a modulator as a signal to be transmitted with the aid of a carrier by any means of modulation required in the specific application.
* An identical Universal Multiplexer circuit which receives the information in the form of a signal, uses the output of the receiver to adjust the period of an auxiliary oscillator with the aid of which then locates the message using the addressing protocol of section 3.2 and records all outputs but the last one at position Lo.
3.4. 2 Case (ii)
* Mzparzonm An incoming message is pre-stored in a static RAM memory and is fed for identification at the Universal Multiplexer module in equal partitions of length Lo-1. For each partition we apply the procedure of section 3.4. 1.
* Variable Partitioning A combined application of the OMNIPLEX Protocol is required to reduce the amount of basic signals at an amount of the order of dz (--). Identification of exponentially increasing partitions of a message is achieved at each step with the aid of a larger static RAM memory. Separate time difference recordings are summed after each enlarged Duty Cycle which encode effectively the essential differences between equipartitions. These are then expanded at the receiver level according to an arithmetic modulo operation which is effectively performed with the aid of two auxiliary oscillators of which the periods are adjusted to the previously used recording and the next one to be expanded. Their output represents in voltage terms the final result which serves for the adjustment of the period of the auxiliary oscillator used by the addressing protocol of section 3.2 and is repeatedly used until the expiration of each exponentially enlarged Duty Cycle.
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3.5 Other physical applications Some extentions based of the inherent mathematical properties involved in the theoretical description of the Universal Multiplexer are mentioned in brief as they prove the value of this device as a tool for further scientific research, though some of them may lie out of the realm of existing technology.
Direct implementation of a photonic dynamic memory based on an ensemble of squeezed coherent photon states is possible if a certain condition is fulfilled. Due to the well known analogy of the Bogoliubov transform which is here expressed as a function of the alphabet base used and a relativistic velocity boost it is possible to translate the Universal Multiplexer in a system of relativistically moving harmonic potentials in different inertial frames.
It is also possible to establish an equivalence with a vortex of differentially rotating or anisotropic radiation sources undergoing a transverse Doppler effect.
It is also possible to translate such an anisotropy to the effect of proper time corrections with respect to a comoving observer due to vorticity of null geodesic near a gravitational anomaly.

Claims (2)

  1. 4 claims What we claim is: * (1) Array of separate main oscillators characterized in that said oscillators have a char- acteristic position index from 1 to Lo and a specific constant period adjusted for each as twice the period of the previous.
    .
  2. (2) A sampling oscillator or clock having a period half that of the said main oscillator having position index 1 in the said array of main oscillators of claim (1).
    * (3) A set of at least three or more auxiliary voltage controlled oscillators characterized in that their period has to be adjusted according to external signals.
    * (4) A set of RAM memory modules characterized in that temporary storage of the recordings obtained by means of a sampling performed in a rate given by the said sam- pling clock oscillator according to claim (2) over the outputs of the said main oscillators according to claim (1) takes pace.
    * (5) A comparator characterized in that the output of one of the said auxiliary oscillators according to claim (3) is to be compared with the ground and the outputs of each one of the said main oscillators in the said array of oscillators according to claim (1) are to be sampled and their value is to be transferred at one of the said RAM modules according to claim (4) as soon as the comparator gives a positive signal.
GB0111554A 2001-05-11 2001-05-11 Infinite capacity information sources Withdrawn GB2375445A (en)

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1154092A (en) * 1967-05-04 1969-06-04 Marconi Co Ltd Improvements in or relating to Digital-to-Analogue Signal Converters.
GB2166613A (en) * 1984-10-02 1986-05-08 Canon Kk Digital-analog conversion

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1154092A (en) * 1967-05-04 1969-06-04 Marconi Co Ltd Improvements in or relating to Digital-to-Analogue Signal Converters.
GB2166613A (en) * 1984-10-02 1986-05-08 Canon Kk Digital-analog conversion

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