GB2361807A - Wafer processing apparatus having wafer lift pins with slant portions for wafer alignment - Google Patents

Wafer processing apparatus having wafer lift pins with slant portions for wafer alignment Download PDF

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Publication number
GB2361807A
GB2361807A GB0026927A GB0026927A GB2361807A GB 2361807 A GB2361807 A GB 2361807A GB 0026927 A GB0026927 A GB 0026927A GB 0026927 A GB0026927 A GB 0026927A GB 2361807 A GB2361807 A GB 2361807A
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United Kingdom
Prior art keywords
wafer
processing apparatus
lift pins
wafer processing
alignment point
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB0026927A
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GB0026927D0 (en
Inventor
Tsuyoshi Yokogaki
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NEC Corp
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NEC Corp
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Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of GB0026927D0 publication Critical patent/GB0026927D0/en
Publication of GB2361807A publication Critical patent/GB2361807A/en
Withdrawn legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68742Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a lifting arrangement, e.g. lift pins
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6838Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping with gripping and holding devices using a vacuum; Bernoulli devices

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Physical Vapour Deposition (AREA)
  • Chemical Vapour Deposition (AREA)

Abstract

A wafer processing apparatus can align wafers in a predetermined position within a vacuum processing chamber (<B>001'</B>). The vacuum processing chamber (<B>001'</B>) may include a wafer stage (<B>003</B>) having wafer lift pins (<B>005</B>) with slant portions (<B>050</B>) that can extend above, and retract into, a top surface of wafer stage (<B>003</B>). A number of gas blowout holes (<B>004</B>) can also be formed in the top surface of wafer stage (<B>003</B>). Gas blown out of gas blowout holes (<B>003</B>) can cause a wafer to float above the top surface of wafer stage (<B>003</B>).

Description

is 1 2361807 WAFER PROCESSING APPARATUS
TECHNICAL FIELD
The present invention relates generally to a wafer processing apparatus, and more particularly, to a wafer processing apparatus that can position wafers in a processing chamber.
BACKGROUND OF THE INVENTION
The manufacture of semiconductor devices may include processing wafers in controlled environments. Such controlled environments may include types of gas (es), temperature, applied electric field, and pressure, to name but a f ew. Because certain atmospheric gases may have an adverse effect on wafers (e.g., oxidation and/or contamination), many processing steps may involve transferring, storing and/or processing a wafer in a vacuum. In addition, or alternatively, a wafer may be transferred to a chamber that may subsequently be "pumped-down" to low pressure (vacuum) with respect to atmospheric pressure. often, a wafer may be placed upon a stage within a processing chamber. In many cases, a wafer position on a stage can af f ect how the waf er is processed. Consequently, many waf er processing apparatuses can include some sort of mechanism for centering, or otherwise positioning a wafer within a processing chamber.
A conventional wafer processing apparatus will now be described with reference to FIGs. 2, 3A and 3B. FIG. 2 is a top plan view of a wafer processing apparatus. FIG. 3A is a side cross-sectional view of a conventional vacuum processing chamber -2that may be included in the wafer processing apparatus of FIG. 2. FIG. 3B is top plan view of a conventional wafer stage that may be included in the wafer processing apparatus of FIG. 3A.
Referring now to FIG. 2, a water processing apparatus may include a number of vacuum processing chambers, three of which are shown as 001. Vacuum processing chambers 001 may receive wafers and perform one or more processing steps on such wafers. In many cases, a vacuum processing chamber 001 may be at a vacuum. However, it is understood that in some arrangements, a vacuum processing chamber 001 may be at some other pressure. Still further, while a vacuum processing chamber 001 may initially be at a vacuum, it may be subsequently placed at another pressure during processing.
A center chamber 009 may also be included for storing wafers that are to be processed, or have been processed in one or more processing chambers 001.
Vacuum processing chambers 001 and a center chamber 009 may be situated around a transfer chamber 008. A robot 006 may be situated within a transfer chamber 008 that includes an arm 007.
Robot 006 and corresponding arm 007 can transfer wafers between processing chambers 001 and/or a center chamber 009.
Referring now to FIG. 3A, a conventional vacuum processing chamber 001 may include a wafer stage 021 on which a wafer 020 may be positioned. Wafer lift pins 022 can project from the top surface of wafer stage 021. The top surface of wafer stage 021 may also include a guide ring 024. Guide ring 024 may be a contiguous structure around the edge of the top surface of wafer stage 021.
As shown in FIG. 3B, wafer stage 021 may include wafer lift pin holes 023. Wafer lift pin holes 023 may be openings in the top surface of wafer stage 021 that are spaced at even intervals from the center of wafer stage 021. Wafer lift pins 022 may be situated within wafer lift pin holes 023, and can be driven upward from within wafer lift pin holes 023 by a driving arrangement. When driven upward, wafer lift pins 022 can support a wafer 020.
Having described a wafer processing apparatus in FIG. 2, and a conventional vacuum processing chamber 001 in FIGs. 3A and 3B, the operation of the wafer processing apparatus will now be described.
Wafers may be initially loaded into center chamber 009.
The robot 006 may extend arm 007 into center chamber 009 and retrieve wafer 020. The robot 006 and arm 007 may then transfer the wafer 020 to vacuum processing chamber 001.
Within vacuum processing chamber 001, wafer 020 may be situated on wafer lift pins 022 extending above the top surface of wafer stage 021. The arm 007 may then be retracted f rom vacuum processing chamber 001. wafer lift pins 022 are then lowered into corresponding wafer lift pin holes 023, thereby situating wafer 020 on the top surface of the wafer stage 021.
However, while robot 006 and arm 007 may be capable of transferring wafers between center chamber 009 and vacuum processing chamber 001, such a transfer process may not always have the precision to position a wafer in a desired position on wafer stage 021. To assist in aligning a wafer on wafer stage 021, guide ring 024 is situated on wafer stage 021. Guide ring 024 may be situated on the outer circumference of the top surface of wafer stage 021.
A drawback to the above approach can be misalignment of wafer 020. In particular, while a wafer may end up within guide ring 024, a wafer 020 may still end up being misaligned with respect to the center of the wafer stage 021.
Art related to the present invention is disclosed in Japanese Patent Application Laid-Open (Kokai) No. Sho 62-21237.
Kokai No. Sho 62-21237 shows an apparatus with a table having a top surface with a flat portion. The f lat portion has a larger diameter than a wafer. Gas injection holes may be formed in a top surface of the table. The gas injection holes can be situated in the vicinity of the wafer outer circumference. The horizontal position of the wafer can be restricted by gas blowing out of the gas injection holes, thereby laying the wafer in a desired position.
A drawback to an approach such as that shown in Kokai No.
Sho 62-21237 can be that, with gas injection holes situated only in the vicinity of a wafer outer circumference, wafer misalignment may still occur. In addition, while such a gas injection hole arrangement may work for a wafer of one size, it may not work for wafers of another size.
In light of the above discussion, it would be desirable to arrive at a wafer processing apparatus that can align wafers without the drawbacks of conventional approaches and those of -5the related art. It would also be desirable to arrive at a wafer processing apparatus that can accommodate wafers of more than one size.
SUMMARY OF THE INVENTION
According to the present invention, a wafer processing apparatus includes a wafer stage situated within a vacuum processing chamber. The wafer stage includes a number of wafer lift pins that extend above, and retract into, a top surface of the wafer stage. The wafer lift pins include slant portions that are at an angle with respect to the vertical. A number of gas blowout holes are formed in the top surface of the wafer stage, through which holes a gas may be blown.
According to one aspect of the invention, a wafer may be situated on the top surface of the wafer stage, while no gas flows out of gas blowout holes and the wafer lift pins are retracted. A gas may then be blown out of gas blowout holes and waf er lif t pins can be driven upward. If a waf er is of f set f rom a predetermined alignment point (e.g., the center of the wafer stage), slanted portions that first contact the wafer can force the wafer to move opposite to the misalignment direction. opposing slant portions may continue to move a wafer in this fashion until the wafer is aligned with respect to the alignment point.
According to another aspect of the invention, a wafer processing apparatus may contain more than two vacuum processing chambers that each include a wafer stage as described above.
In addition, a center chamber may be included. A transfer chamber can connect a center chamber with vacuum processing chambers. A transferring device within the transfer chamber can transfer wafers between the center chamber and a selected vacuum 5 processing chamber.
According to another aspect of the invention, wafer lift pins may be situated at equal intervals about the center of a wafer stage.
According to another aspect of the invention, a slant portion of a wafer lift pin may have an end that extends outward from an alignment point.
According to another aspect of the invention, a slant portion of a wafer lift pin may extend inward toward an alignment point.
According to another aspect of the invention, the gas may include an inert gas.
BRIEF DESCRIPTION OF THE DRAWINGS
Preferred features of the present invention will now be described, by way of example only, with reference to the accompanying drawings, in which:FIG. 1A is a side cross-sectional view of a vacuum processing chamber according to one embodiment. FIG. 1B is top plan view of a waf er stage that may be included in the vacuum processing chamber of FIG. 1A.
FIG. 2 is a top plan view of a wafer processing apparatus.
FIG. 3A is a side cross-sectional view of a conventional vacuum processing chamber that may be included in the wafer processing apparatus of FIG. 2. FIG. 3B is top plan view of a conventional wafer stage that may be included in the vacuum processing chamber of FIG. 3A.
DETAILED DESCRIPTION OF THE EMBODIMENTS
In one embodiment of the present invention, a wafer processing apparatus may include a chamber arrangement such as that shown in FIG. 2. However, such a wafer processing apparatus may include a vacuum processing chamber 0011 such as that shown in FIG. 1A.
Referring now to FIG. 1A, a vacuum processing chamber 001, according to one embodiment may receive a wafer 002 that can be situated on a wafer stage 003. The wafer stage 003 may include wafer lift pins 005 that can extend above the surface of the wafer stage 003. In the particular example of FIGs. 1A and 1B, wafer lift pins 005 may be situated at equally spaced intervals, equidistant from the center of the wafer stage 003 top surface.
Wafer lift pins 005 may include a slant portion 050 that is arranged at an angle with respect to the vertical.
Referring now to FIG. 1B, wafer stage 003 may further include lift pin holes 010 in which wafer lift pins 005 can be received. In the particular arrangement of FIG. 1B, lift pin holes 010 can be rectangular in shape arranged at equal intervals around an alignment point, which in the example happens to be the center of the wafer stage 003. Further, lift pin holes 010 may extend radially from an alignment point with respect to the long side of the rectangular lift pin holes 010. Wafer lift pins 005 may extend from within lift pin holes 010 above the top surface of wafer stage 003. In addition, wafer lift pins 005 may retract into lift pin holes 010 within 5 the wafer stage 003.
As shown in FIGs. 1A and 1B, a wafer stage 003 may further include gas blowout holes 004 formed in a top surface of wafer stage 003. A gas, such as an inert gas, may be blown out of gas blowout holes 004 as represented by arrows 040. Gas may be supplied to gas blowout holes 004 according to well-known techniques. A gas blowing out of gas blowout holes 004 can cause a wafer 002 to float above a top surface of wafer stage 003.
Having described the general arrangement of a wafer processing apparatus and vacuum processing chamber 001, according to one embodiment, the operation of such an apparatus and chamber will now be described with reference to FIGs. 1A, 1B and 2.
In operation, a wafer processing apparatus may include a center chamber 009 in which wafers may be initially loaded. An arm 007 of a robot 006 can enter a center chamber 009 and grip, or otherwise pick up wafer 002.
Robot 006 and arm 007 can load a selected wafer 002 into vacuum processing chamber 0011. Arm 007 can position wafer 002 over wafer stage 003. wafer lift pins 005 may then be driven above a top surface of wafer stage 003 and lift wafer 002 from above arm 0 0 7. Arm 007 may then be retracted from vacuum -9processing chamber 0011 and returned to transfer chamber 008. It is noted that wafer 002 may be misaligned with respect to wafer stage 003 at this point.
A gas can be blown out of waf er stage 003 through gas blowout holes 004. Such a gas flow can enable wafer 002 to float above wafer stage 003. In one particular arrangement, a gas blown out of gas blowout holes 004 may be an inert gas.
It is noted that as wafer lift pins 005 are driven upward, wafer 002 may be misaligned in one direction so that one or more wafer lift pins 005 may contact a wafer, while the other wafer lift pin(s) 005 can remain separated from the wafer 002. As the wafer lift pins 005 continue to rise, the slant portion 050 of the wafer lift pin(s) 005 that first contact wafer 002 can push the wafer 002 opposite to the misalignment direction. Such a is correction may occur in a "back-and- f orth,' f ashion until a waf er is aligned. In this way, the slant portion 050 of wafer lift pins 005 can contribute to aligning wafer 002.
Next, gas flow out of gas blowout holes 004 may be stopped and wafer lift pins 005 can be lowe:red into lift pin holes 010.
As wafer lift pins 005 retract into wafer stage 003, wafer 002 may be aligned on the stage.
It is noted that in the described embodiment, wafer 002 may float above a stage, and then be aligned by slant portions 050 of wafer lift pins 005. Wafer 002 can then be lowered in such an aligned position onto wafer stage 003. Such an approach may dispense with a guide ring, such as that shown as item 024 in FIGs. 3A and 3B. In this way, the grinding of a wafer against -10a guard ring, which may occur in conventional approaches, can be avoided.
It is also noted that a combination of wafer lift pins 005 with slanted portions 050 and a gas blowing out of gas blowout holes 004 may provide more precise alignment of a wafer than methods that employ only straight wafer lift pins with guide rings, or only a flow of gas from gas injection holes.
A wafer processing apparatus according to the disclosed embodiment may accommodate a range of wafer sizes. In particular, a length and/or angle of slant portions 050 can determine the range of wafer sizes that may be aligned. This is in contrast to conventional approaches that may have one particular guide ring circumference or one particular arrangement of gas injection holes.
of course, while the above particular embodiment has described an apparatus that may align a wafer with respect to the center of a waf er stage, this should not be construed as limiting to the invention. Different alignment arrangements may be achieved by moving the position of the wafer lift pins and/or the position of slanted portion of such wafer lift pins.
It is further noted that the particular type of wafer lift pin illustrated could also vary. As but one of the many possible examples, while wafer lift pin 005 of FIG. 1A may include slant portion 050 having an end that extends outward from an alignment point, an alternate arrangement may include slant portion 050 with ends that bend downward toward an alignment point.
_11 Thus, a wafer processing apparatus has been disclosed that include wafer lift pins with slant portions and gas blowout means that can enable a wafer to be positioned on a wafer stage with a high degree of precision.
While the above description has shown one vacuum processing chamber and a corresponding wafer stage, it may be advantageous to include multiple such chambers and/or wafer stages in a wafer processing apparatus, to thereby allow alignment advantages to multiple or all such chambers.
Thus, while the various particular embodiments set forth herein have been described in detail, the present invention could be subject to various changes, substitutions, and alterations without departing from the scope of the invention.
Accordingly, the present invention is intended to be limited only as defined by the appended claims.
Each feature disclosed in this specification (which term includes the claims) and/or shown in the drawings may be incorporated in the invention independently of other disclosed and/or illustrated features.
The text of the abstract filed herewith is repeated here as part of the specification.
A wafer processing apparatus can align wafers in a pre determined position within a vacuum processing chamber. The vacuum processing chamber may include a wafer stage having wafer lift pins with slant portions that can extend above, and retract into, a top surf ace of the wafer stage. A number of gas blowout holes can also be formed in the top surface of the wafer stage.
-12Gas blown out of gas blowout holes can cause a wafer to float above the top surf ace of the waf er stage.

Claims (25)

  1. -13CLAIMS:
    A wafer processing apparatus, comprising: at least one processing chamber for producing a predetermined environment for processing a wafer; a wafer stage within the at least one processing chamber for receiving a wafer on a surface, the wafer stage including: a plurality of retractable wafer lift means that can extend away from and into the surface, at least one of the wafer lift means including a slant portion that extends at a nonperpendicular angle with respect to the surface; and, a plurality of gas blowout holes that provide a gas flow from the surface.
  2. 2. The wafer processing apparatus of claim 1, wherein the plurality of retractable wafer lift means is a plurality of rectractable wafer lift pins.
  3. 3. The wafer processing apparatus of claim 1 or 2, wherein the wafer processing apparatus includes a plurality of processing chambers.
  4. 4. The wafer processing apparatus of claim 1, 2 or 3, further including a transfer chamber for transferring a wafer from a center chamber to the at least one processing chamber.
  5. -145. The wafer processing apparatus of any one of claims 1 to 4, wherein the wafer processing apparatus includes a wafer stage in each processing chamber.
  6. 6. The wafer processing apparatus of claim 2, wherein the wafer lift pins are arranged at equal spacing intervals around an alignment point.
  7. 7. The wafer processing apparatus of claim 6, wherein the alignment point is the center of the wafer stage surface.
  8. The wafer processing apparatus of claim 1 or 2, wherein the slant portion has an end that extends away from an alignment point.
  9. 9. The wafer processing apparatus of claim 1 or 2, wherein the slant portion has an end that extends toward an alignment point.
  10. 10. A wafer processing apparatus, comprising: a surface that may receive a semiconductor wafer for processing; and, a plurality of wafer lift means that may be driven above the surface from within lift means holes and retracted into the lift means holes below the surface, the wafer lift means having slant portions at a non -perpendicular angle with respect to the surface.
  11. 11. The wafer processing apparatus of claim 10, wherein the plurality of wafer lift means is a plurality of wafer lift pins.
  12. 12. The wafer processing apparatus of claim 11, wherein the slant portions of the wafer lift pins are arranged radially with respect to an alignment point on the surface.
  13. 13. The wafer processing apparatus of claim 11, wherein the slant portions include a distal end that extends away from an alignment point on the surface when the wafer lift pins are driven above the surface.
  14. 14. The wafer processing apparatus of claim 11, wherein the slant portions include a distal end that extends toward an alignment point on the surface when the wafer lift pins are driven above the surface.
  15. 15. The wafer processing apparatus of claim 10, further including a plurality of gas blowout holes formed in the surface that provide a plurality of gas streams flowing out of the surface.
  16. 16. The wafer processing apparatus of claim 10, wherein the lift means holes are rectangular in shape, with long sides oriented in a radial manner with respect to an alignment point in the surface.
  17. 17. A wafer processing apparatus, comprising a plurality of wafer lift pins for aligning a semiconductor wafer over a gas flowing from gas blowout holes, each lift pin including a slant portion that is at a nonperpendicular angle with respect to a gas flow direction out of the gas blowout holes.
  18. 18. The wafer processing apparatus of claim 17, wherein the wafer lift pins retract into a surface.
  19. 19. The wafer processing apparatus of claim 18, wherein the gas blowout holes are formed in the surface and the gas flow direction is essentially perpendicular to the surface.
  20. 20. The wafer processing apparatus of claim 17, wherein the wafer lift pins are circumferentially aligned around an alignment point.
  21. 21. The wafer processing apparatus of claim 17, wherein the wafer lift pins are spaced equidistant from one another with respect to an alignment point.
  22. 22. The wafer processing apparatus of claim 17, wherein the gas blowout holes include at least one central gas blowout hole formed betweenthe wafer lift pins proximate to an alignment point below the center of the semiconductor wafer.
  23. 23. A wafer processing apparatus, comprising:
    -17at least one processing chamber for producing a predetermined environment for processing a waf er; a waf er stage within the at least one processing chamber for receiving a wafer on a surface, the wafer stage including retractable wafer lift means having a slant portion extending at a non-perpendicular angle with respect to the surface whereby an edge of the wafer is supported on said slant portion.
  24. 24. The wafer processing apparatus of claim 24, wherein the wafer lift means is a plurality of wafer lift pins.
  25. 25. A wafer processing apparatus substantially as herein before described with reference to and as shown in Figures 1A to 2 of the accompanying drawings.
GB0026927A 1999-11-05 2000-11-03 Wafer processing apparatus having wafer lift pins with slant portions for wafer alignment Withdrawn GB2361807A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP31601199A JP2001135712A (en) 1999-11-05 1999-11-05 Vacuum-processing device

Publications (2)

Publication Number Publication Date
GB0026927D0 GB0026927D0 (en) 2000-12-20
GB2361807A true GB2361807A (en) 2001-10-31

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KR (1) KR20010051372A (en)
GB (1) GB2361807A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105084000A (en) * 2015-06-23 2015-11-25 武汉华星光电技术有限公司 Glass placing and taking-out method
CN110718496A (en) * 2019-09-20 2020-01-21 深圳市矽电半导体设备有限公司 Wafer center alignment method

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20030083502A (en) * 2002-04-23 2003-10-30 주식회사 디엠에스 Manufacturing method of liquid crystal display device using emitted fluid
JP4502199B2 (en) 2004-10-21 2010-07-14 ルネサスエレクトロニクス株式会社 Etching apparatus and etching method
JP7266015B2 (en) 2020-09-18 2023-04-27 株式会社Screenホールディングス Vacuum processing equipment

Citations (3)

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Publication number Priority date Publication date Assignee Title
EP0452779A2 (en) * 1990-04-20 1991-10-23 Applied Materials, Inc. Physical vapor deposition clamping mechanism
JPH06340333A (en) * 1993-05-31 1994-12-13 Hitachi Ltd Conveying device by gas flow
US5958198A (en) * 1992-10-27 1999-09-28 Applied Materials, Inc. Clamp ring for domed heated pedestal in wafer processing

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0452779A2 (en) * 1990-04-20 1991-10-23 Applied Materials, Inc. Physical vapor deposition clamping mechanism
US5958198A (en) * 1992-10-27 1999-09-28 Applied Materials, Inc. Clamp ring for domed heated pedestal in wafer processing
JPH06340333A (en) * 1993-05-31 1994-12-13 Hitachi Ltd Conveying device by gas flow

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105084000A (en) * 2015-06-23 2015-11-25 武汉华星光电技术有限公司 Glass placing and taking-out method
CN110718496A (en) * 2019-09-20 2020-01-21 深圳市矽电半导体设备有限公司 Wafer center alignment method

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Publication number Publication date
JP2001135712A (en) 2001-05-18
KR20010051372A (en) 2001-06-25
GB0026927D0 (en) 2000-12-20

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