GB2360858B - High-speed maximum a posteriori (MAP) architecture with optimized memory size and power consumption - Google Patents

High-speed maximum a posteriori (MAP) architecture with optimized memory size and power consumption

Info

Publication number
GB2360858B
GB2360858B GB0006691A GB0006691A GB2360858B GB 2360858 B GB2360858 B GB 2360858B GB 0006691 A GB0006691 A GB 0006691A GB 0006691 A GB0006691 A GB 0006691A GB 2360858 B GB2360858 B GB 2360858B
Authority
GB
United Kingdom
Prior art keywords
posteriori
architecture
map
power consumption
memory size
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB0006691A
Other versions
GB0006691D0 (en
GB2360858A (en
Inventor
Alexander Worm
Holger Lamm
Norbert Wehn
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Priority to GB0006691A priority Critical patent/GB2360858B/en
Publication of GB0006691D0 publication Critical patent/GB0006691D0/en
Priority to AU62117/01A priority patent/AU6211701A/en
Priority to PCT/EP2001/003183 priority patent/WO2001071924A2/en
Publication of GB2360858A publication Critical patent/GB2360858A/en
Application granted granted Critical
Publication of GB2360858B publication Critical patent/GB2360858B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/3905—Maximum a posteriori probability [MAP] decoding or approximations thereof based on trellis or lattice decoding, e.g. forward-backward algorithm, log-MAP decoding, max-log-MAP decoding
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
    • H03M13/39—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes
    • H03M13/41—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors
    • H03M13/4107—Sequence estimation, i.e. using statistical methods for the reconstruction of the original codes using the Viterbi algorithm or Viterbi processors implementing add, compare, select [ACS] operations
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65—Purpose and implementation aspects
    • H03M13/6502—Reduction of hardware complexity or efficient processing

Landscapes

  • Physics & Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Error Detection And Correction (AREA)
  • Dc Digital Transmission (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
GB0006691A 2000-03-20 2000-03-20 High-speed maximum a posteriori (MAP) architecture with optimized memory size and power consumption Expired - Fee Related GB2360858B (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
GB0006691A GB2360858B (en) 2000-03-20 2000-03-20 High-speed maximum a posteriori (MAP) architecture with optimized memory size and power consumption
AU62117/01A AU6211701A (en) 2000-03-20 2001-03-20 High-speed "maximum a posteriori" (map) architecture with optimized memory size and power consumption
PCT/EP2001/003183 WO2001071924A2 (en) 2000-03-20 2001-03-20 High-speed 'maximum a posteriori' (map) architecture with optimized memory size and power consumption

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB0006691A GB2360858B (en) 2000-03-20 2000-03-20 High-speed maximum a posteriori (MAP) architecture with optimized memory size and power consumption

Publications (3)

Publication Number Publication Date
GB0006691D0 GB0006691D0 (en) 2000-05-10
GB2360858A GB2360858A (en) 2001-10-03
GB2360858B true GB2360858B (en) 2004-08-18

Family

ID=9888004

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0006691A Expired - Fee Related GB2360858B (en) 2000-03-20 2000-03-20 High-speed maximum a posteriori (MAP) architecture with optimized memory size and power consumption

Country Status (3)

Country Link
AU (1) AU6211701A (en)
GB (1) GB2360858B (en)
WO (1) WO2001071924A2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2836764B1 (en) * 2002-03-04 2004-07-23 Wavecom Sa METHOD FOR PROCESSING A SIGNAL IMPLEMENTING AN APPROACH MAP TYPE ALGORITHM AND CORRESPONDING APPLICATIONS

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1996013105A1 (en) * 1994-10-25 1996-05-02 Philips Electronics N.V. Transmission system with soft output decoding and reduced storage capacity requirement
EP0735696A2 (en) * 1991-04-23 1996-10-02 France Telecom Iterative decoding method, decoding module and decoder therefor
WO1997040583A1 (en) * 1996-04-19 1997-10-30 General Electric Company An optimal soft-output decoder for tail-biting trellis codes
EP0820159A2 (en) * 1996-07-17 1998-01-21 General Electric Company Satellite communications system utilizing parallel concatenated coding
WO1998020617A1 (en) * 1996-11-06 1998-05-14 Qualcomm Incorporated Soft decision output decoder for decoding convolutionally encoded codewords
US6028899A (en) * 1995-10-24 2000-02-22 U.S. Philips Corporation Soft-output decoding transmission system with reduced memory requirement
WO2000038366A1 (en) * 1998-12-18 2000-06-29 Telefonaktiebolaget Lm Ericsson (Publ) Method and system for fast maximum a posteriori decoding

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6192501B1 (en) * 1998-08-20 2001-02-20 General Electric Company High data rate maximum a posteriori decoder for segmented trellis code words

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0735696A2 (en) * 1991-04-23 1996-10-02 France Telecom Iterative decoding method, decoding module and decoder therefor
WO1996013105A1 (en) * 1994-10-25 1996-05-02 Philips Electronics N.V. Transmission system with soft output decoding and reduced storage capacity requirement
US6028899A (en) * 1995-10-24 2000-02-22 U.S. Philips Corporation Soft-output decoding transmission system with reduced memory requirement
WO1997040583A1 (en) * 1996-04-19 1997-10-30 General Electric Company An optimal soft-output decoder for tail-biting trellis codes
EP0820159A2 (en) * 1996-07-17 1998-01-21 General Electric Company Satellite communications system utilizing parallel concatenated coding
WO1998020617A1 (en) * 1996-11-06 1998-05-14 Qualcomm Incorporated Soft decision output decoder for decoding convolutionally encoded codewords
WO2000038366A1 (en) * 1998-12-18 2000-06-29 Telefonaktiebolaget Lm Ericsson (Publ) Method and system for fast maximum a posteriori decoding

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
"VLSI signal processing, proceedings. IEEE workshop on VLSI signal processing, XX, XX", vol. 6, no. VI, 20 October 1993 (1993-10-20), pages 141-149, DAWID H ET AL, "Map channel decoding: Algorithm and VLSI architecture" *

Also Published As

Publication number Publication date
GB0006691D0 (en) 2000-05-10
AU6211701A (en) 2001-10-03
WO2001071924A2 (en) 2001-09-27
GB2360858A (en) 2001-10-03
WO2001071924A3 (en) 2002-01-31

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20110320