GB2356276A

GB2356276A - Security mechanism for an integrated circuit packing box

Info

Publication number: GB2356276A
Application number: GB0022116A
Authority: GB
Inventors: Tzu Hou Chien
Original assignee: Geneticware Co Ltd
Current assignee: Geneticware Co Ltd
Priority date: 1999-09-13
Filing date: 2000-09-08
Publication date: 2001-05-16
Anticipated expiration: 2020-09-08
Also published as: FR2800495B1; GB2356276B; GB0022116D0; CN1246730A; FR2800495A1; DE10045025A1

Abstract

A security mechanism for an IC packing box 10,20 includes a plurality of detecting circuit boards 41,42 in the packing box. These circuit boards are arranged by pairs. One circuit board 41 has etched vertical wiring Vn and the other circuit board 42 has etched horizontal wiring Hn. The vertical wiring and the horizontal wiring are connected through zero-ohm conductors to form a crossing security net. The security net has a plug 48 to connect with a socket slot of an IC circuit board 30. At least one detecting lead of the IC can send random signals to the circuit boards, 41,42 to detect tampering or interference with the packing box by evaluating current flow of the electric loop defined by the net. If tampering is detected, the IC reacts by locking its internal program code.

Description

2356276 SECURITY MECHANISM FOR AN IC PAC11CING BOX BACKGROUND OF THE

INVENTION

(1) Field of the Invention

Tile invention relates to a security mechanism for an IC packing box, and more particularly to a shielding mechanism of a box in which can provicFe protection fi-orn foreign invasion so as to ensure the safety of IC's located thereinside.

(2) Description of tile Prior Art

Oil design of electronics and circuiting, full-scale programs oisol'tware are Usually coded into a Unique IC (integrated CirCLIi0 W 10 i g a singlechip control element. Generally, tile p rograins or software are organized by a programmable code or a machine code for tile reason that the code is hard to read and then the IC can be protected frorn piracy. To achieve the piotection purpose, a simple and less-cost method is to C0IIStrLICt a packing box to shield tile 1C. By providing a sealed packing box, tile IC inside can then be protected froin possible or intended piracy on the built-in programmable code. Thus, the design of the IC can be safely kept.

Nevertheless, the packing box is Usually constructed as a simple box. So, any conventional method, Such as drilling and knocking, can be used to break in the box without damaging the IC and UILIS make the programmable code inevitably accessible to unexpected people. Obviously, the simple packing box is not qualified in view of security. Therefore, for avoiding any damage fi-onl foreign party, security protection upon the packing box is necessary.

SUMMARY OF'ri[E INVENTION

Accordingly, it is an object of the present invention to provide a security mechanism for an IC packing box, ill Which a Plurality of detecting circuit boards are provided. 'File detecting circuit boards are arranged by pairs, and each pair of detecting boards Further includes an upper circuit board with etched vertical wiring and a lower circuit board with etched horizontal wiring. Zero-ollrn resistors are used to interconnect the etched T vertical wiring and the etched horizontal wiring for forming a crossing security net. The security mechanism also provides a plug for connecting with a socket slot of an IC Cil-CUit board located inside the packing box. 'File IC generates a random signal for the security net through one detecting lead of tile IC. By evaluating tile electric loop status of the detecting boards, the completeness ofthe packing box can then be determined.

It is yet another object of the present invention to provide a security mechanism for an IC packing box., in which an all-time security function can be provided to the packing box, even at the down time of the packing box, by SiMply Supplying electricity to the IC tor continUOUSly generating detecting signals to avoid any possible invasion.

It is a further object of the present invention to provide a security mechanism for an IC packing box, which tile IC can autornatically lock the built-in programmable code at the moment of detecting an invasion, for avoiding any unexpected piracy.

It is one more object of the present invention to provide a security mechanism for an IC packing box, in which the detecting circuit board can be used to form a more intense security net. The i ntense security net can include at least a pair of detecting wiring for providing more accurate detecting coverage even at tile very corner of the packing box.

BRIEF'DESCRIPTION oil-ruE DRAWINGS

Tile present invention will now be specified with reilerence to its preferred embodiments illustrated in the drawings, in which FIG. I is a cross-sectional view of a packing material and an engaged IC circuit board in accordance with the present invention; FIG.2 is a schematic view of a first embodiment of detecting circuit boards in accordance with the present invention; FIG.3 is a cross-sectional view of the first embodiment of FIG.2; FIGA is a schematic view of a second embodiment of detecting circuit boards in accordance with tile present invention; and FIG.5 is a bottom view ofan IC circuit board in accordance with the present invention.

DESCRIPTION OF THE PREFERRED EMBODIMENT

The invention disclosed licrein is directed to a Security mechanism For an IC packing box. In the 6ollowing description, nurnerous details are set forth in order to provide a thorough understanding of tile present invention. It will be appreciated by one skilled in the art that variations of these specific details are possible while still achieving the results of the present invention. In other instances, well-known components are not described in detail in order not to unnecessarily obscure tile present invention.

Referring now to FIG. 1, a cross-sectional view of a packing material and an IC circuit board according to the present invention is shown. The packing material for sealing an IC element 31 oil the IC circuit board 30 includes an upper case 10 and a lower case 20, to be assembled onto an upper and a lower surfaces of tile IC circuit board 30, respectively. Tile packing material is integrated via screws 12 to be anchored inside screw holes I I and 2 1, respectively, oil the upper and the lower cases 10 and 20.

Ref'erring now to FIG.2 an(] FIG.3, a first embodiment of the detecting Circuit board in accordance with the present invention is shown. The present invention includes a Plurality of detecting circuit boards 40 located at the facing sides of the upper case 10 and the lower case 20, in which tile detecting circuit boards 40 are arranged by pairs. The LIJ)pCr Circuit board 41 has etched vertical wiring, and the lower circuit board 42 has etched horizontal wiring (i.e. to cross with the vertical wiring of the upper circuit board 41. Drill holes on both the upper circuit board 41 and the lower circuit board 42 are provided to receive zero-ohm resistors 43 for electrically connecting tile vertical wiring with the horizontal wiring, so as to form a crossing security net. For exaniple shown in FIG.2 and FIG.3, the upper circuit board 41 can has a plurality of equal-spaced etched vertical lines (V,, V,, V, and the lower circuit board 42 can has a plurality of' eqUal-spaced etchcd horizontal lines (I 111 1-121 11 3' - - -) - " 'lle zero-ohrn resistors 43 located close to both lateral sides of the circuit boards 41 and 42 are used to integrate the vertical lines (i.e. vertical wiring) and horizontal lines (i.e. horizontal wiring) for forming an electricconnected crossing security net.

In order to provide Security coverage over entire area of the packing rnateriall) aforesaid two layers of detecting circuit boards 41 and 42 need to be upgraded to a security mechanism with more pairs of layering detecting circuit boards. Following exaniple with four layers of detecting circuit boards is shown in FIGA to elucidate tile upgraded security rnechanisrn of the present invention.

As shown, a first detecting circuit board 44 can have an odd number of horizontal lines (H,, HP F15, f4,,__.), a second detecting circuit board 45 can have an. odd number of vertical lines (V,, V P V51 V71...), a third detecting Circuit board 46 can have an even nuniber of horizontal lines (142, HP HP H81 ---), and a fourth detecting circuit board 47 can have an even number of vertical lines (V2, VP V61 Vs,___). By overlapping the first, the second, the third, and the f'OUrth detecting Circuit boards 44, 45, 46, and 47, a more complicated Crossing Security net can be formed. Similarly, drill holes can be provided to tile intersection points of.' tile vertical and horizontal lines for receiving interconnected zero-olirn resistors 43. By such ail arrangement, tile line spacing in each layer can be extended, so that coverage of the security net can be enlargcd as wcll. That is, almost entire Lipper and lower cases 10 and 20 can be protected by the security net.

Further, to prevent an invader fi-orn directly removing the screws 12, each screw 12 can also be arranged preferably to an intersection point 34 (FIG.5) of the vertical wiring and the horizontal wiring and be deemed as another resistor in the net. By Such ail arrangement, any removing of tile screws 12 can be detected as Nvell. However, tile position of the screw 12 can also be determined at a relevant location other than an intersection point of tile vertical wiring and the horizontal wiring.

Referring now to FIG.5, a bottoni view of the IC circuit board is shown. At the common connection of the detecting circuit board 40, a plug 48 can be formed to integrate the wiring 9 as shown in FIG.22). On the IC circuit board 30, a respective socket slot 32 can be formed to electrically connect with tile PlUg 48, for Forming a complete electric loop integrating the detecting circuit board 40 and the IC circuit board 30. The IC element 31 is software-control led, and has at least a detecting lead for output a randorn signal. The signal of the lead can flow through the layering detecting circuit boards 40, via tile plug 48 and the socket slot 32. In tile case that the signal cannot complete the electric loop and flow back to the IC element 3 1) it thus indicates that sornewhere in the detecting circuit boards 40 is open. That is, an unexpected invasion is introduced to the packing material/box. 'rhen, the IC element 3 1. will react to lock the internal programmable code, so that no piracy oil the code can be proceeded and the code can be safe in the cut-rent invasion.

In the present invention, the detecting lead can be a specific lead on the IC, or a relevant lead of the IC suitable to meet the synchronic application.

Further, in order to provide protection during tile down time of tile IC element 3 1, the IC Circuit board 30 can include a battery 33 for alltime energizing tile IC element 3 1 to generate tile detecting signal for flowing through the detecting circuit boards 40.

While the present invention has been particularly shown and described with reference to preferred embodiments, it will be understood by those skilled in the art that various changes in form and detail may be without departing fi-orn tile spirit and scope ofthe present invention.

Claims

I claim:

1. A security mechanism I-or ail IC packing box, comprising:

at least a pair of layering detecting circuit boards, each pair further including a first detecting circuit board with etched vertical wiring, a second detecting circuit board with etched horizontal wiring, resistors interconnecting the etched vertical wiring with the etched horizontal wiring for forn-ling ail electric loop, and a plug common to tile first and the second detecting circuit boards; and ail IC circuit board, having thereon an IC elernent and a socket engageable with the Plug, tile IC element further having at least a lead connected with the socket for sending signals to examine ifthe electric loop is normal.

2. 'File security rnechanisrn for ail IC packing box according to clairn 1, wherein said IC circuit board further has shielding packing material at both sides thereof.

3. The security mechanism Ior ail IC packing box according to claim 2, wherein said packing material includes ail Upper case and a lower case.

4. The security rnechanisni for an IC packing box according to claim 1, wherein said layering detecting circuit boards are fori-ned by a Ch-CUit board having thereon the etched vertical wiring at one side and the etched horizontal wiring at another side.

5. The security mechanism for an IC packing box according to claim 1, wherein said layering detecting circuit boards include a first circuit board with an odd-number etched vertical wiring, a second circuit board with ail odd-nurnber etched horizontal wiring, a third circuit board with ail even-nurnber etched vertical wiring, and a fourth circuit board with:; n even-nurnber etched horizontal wiring.

6. The security mechanism for ail IC packing box according to clairn 1, wherein said IC circuit board flurther has a battery i1or supplying alltime electricity to the IC elcment.

7. The security mechanism Im- ail IC packing box according to claim 1, wherein said resistors are zero-ollm resistors.

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