GB2353403B - Method for manufacturing a semiconductor device - Google Patents

Method for manufacturing a semiconductor device

Info

Publication number
GB2353403B
GB2353403B GB0006371A GB0006371A GB2353403B GB 2353403 B GB2353403 B GB 2353403B GB 0006371 A GB0006371 A GB 0006371A GB 0006371 A GB0006371 A GB 0006371A GB 2353403 B GB2353403 B GB 2353403B
Authority
GB
United Kingdom
Prior art keywords
manufacturing
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB0006371A
Other versions
GB2353403A (en
GB0006371D0 (en
Inventor
Shuji Fujiwara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of GB0006371D0 publication Critical patent/GB0006371D0/en
Publication of GB2353403A publication Critical patent/GB2353403A/en
Application granted granted Critical
Publication of GB2353403B publication Critical patent/GB2353403B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • H01L28/60Electrodes
    • H01L28/82Electrodes with an enlarged surface, e.g. formed by texturisation
    • H01L28/84Electrodes with an enlarged surface, e.g. formed by texturisation being a rough surface, e.g. using hemispherical grains
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/02Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03Making the capacitor or connections thereto
    • H10B12/033Making the capacitor or connections thereto the capacitor extending over the transistor
    • H10B12/0335Making a connection between the transistor and the capacitor, e.g. plug

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
GB0006371A 1999-03-16 2000-03-16 Method for manufacturing a semiconductor device Expired - Fee Related GB2353403B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP07072499A JP3233217B2 (en) 1999-03-16 1999-03-16 Method for manufacturing semiconductor device

Publications (3)

Publication Number Publication Date
GB0006371D0 GB0006371D0 (en) 2000-05-03
GB2353403A GB2353403A (en) 2001-02-21
GB2353403B true GB2353403B (en) 2001-07-18

Family

ID=13439793

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0006371A Expired - Fee Related GB2353403B (en) 1999-03-16 2000-03-16 Method for manufacturing a semiconductor device

Country Status (3)

Country Link
JP (1) JP3233217B2 (en)
KR (1) KR100335328B1 (en)
GB (1) GB2353403B (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0287031A2 (en) * 1987-04-14 1988-10-19 Kabushiki Kaisha Toshiba High breakdown voltage insulating film provided between polysilicon layers
US5208479A (en) * 1992-05-15 1993-05-04 Micron Technology, Inc. Method of increasing capacitance of polycrystalline silicon devices by surface roughening and polycrystalline silicon devices
US5877052A (en) * 1998-06-11 1999-03-02 Vanguard International Semiconductor Corporation Resolution of hemispherical grained silicon peeling and row-disturb problems for dynamic random access memory, stacked capacitor structures

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0287031A2 (en) * 1987-04-14 1988-10-19 Kabushiki Kaisha Toshiba High breakdown voltage insulating film provided between polysilicon layers
US5208479A (en) * 1992-05-15 1993-05-04 Micron Technology, Inc. Method of increasing capacitance of polycrystalline silicon devices by surface roughening and polycrystalline silicon devices
US5877052A (en) * 1998-06-11 1999-03-02 Vanguard International Semiconductor Corporation Resolution of hemispherical grained silicon peeling and row-disturb problems for dynamic random access memory, stacked capacitor structures

Also Published As

Publication number Publication date
GB2353403A (en) 2001-02-21
KR100335328B1 (en) 2002-05-06
KR20000071396A (en) 2000-11-25
JP2000269456A (en) 2000-09-29
JP3233217B2 (en) 2001-11-26
GB0006371D0 (en) 2000-05-03

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Legal Events

Date Code Title Description
732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20070316