GB2345346A - Method of testing a radio circuit involving the calculation of the bit error rate - Google Patents

Method of testing a radio circuit involving the calculation of the bit error rate Download PDF

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Publication number
GB2345346A
GB2345346A GB9930868A GB9930868A GB2345346A GB 2345346 A GB2345346 A GB 2345346A GB 9930868 A GB9930868 A GB 9930868A GB 9930868 A GB9930868 A GB 9930868A GB 2345346 A GB2345346 A GB 2345346A
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GB
United Kingdom
Prior art keywords
asic
circuit
testing
radio
error rate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB9930868A
Other versions
GB9930868D0 (en
Inventor
Wan-Ho Kim
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of GB9930868D0 publication Critical patent/GB9930868D0/en
Publication of GB2345346A publication Critical patent/GB2345346A/en
Withdrawn legal-status Critical Current

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Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/31708Analysis of signal quality
    • G01R31/3171BER [Bit Error Rate] test
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04MTELEPHONIC COMMUNICATION
    • H04M3/00Automatic or semi-automatic exchanges
    • H04M3/22Arrangements for supervision, monitoring or testing
    • H04M3/26Arrangements for supervision, monitoring or testing with means for applying test signals or for measuring
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B17/00Monitoring; Testing
    • H04B17/20Monitoring; Testing of receivers
    • H04B17/29Performance testing

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Electromagnetism (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Nonlinear Science (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Monitoring And Testing Of Transmission In General (AREA)
  • Transceivers (AREA)

Abstract

A method suitable for testing a circuit of a radio system comprises checking for a test command and generating a test signal in response to the detection of a test command. The test signal is applied to the input port of the circuit and the signal resulting at the output port of the circuit is received. The applied and received signals are used to calculate the bit error rate associated with the circuit. The bit error rate is then compared to a reference value to determine if the circuit is faulty. The circuit tested is an application specific integrated circuit (ASIC). The said reference value may be zero and the failure state of the circuit may be displayed.

Description

METHOD FOR TESTING APPLICATION SPECIFIC INTEGRATED CIRCUIT IN EXCHANGE SYSTEM FOR RADIO INTERFACE BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an exchange system, and more particularly, to a method for testing an application specific integrated circuit (ASIC) located within a radio transmitter and receiver of a radio interfacing apparatus in an exchange system for a radio interface.
2. Description of the Related Art In generat, a radio interfacing apparatus 50, as shown in FIG. 1, is required for connecting to and operating an exchange network by radio. In FIG. 10, reference numerals 10 and 40 denote a node exchange and a node controller, respectively. The radio interfacing apparatus 50 lets the radio interface performed between a packet communication unit (PCU) 20 and a small exchange 60 and among mobile radio base stations 30. A subscriber in the small exchange 60 can communicate with other subscribers within a communication range of the mobile radio base stations 30 through relay by the radio interfacing apparatus 50.
The most important portion in the radio interfacing apparatus 50 is an application specific integrated circuit (ASIC) located within an electronic counter-counter measures (ECCM) transmitter/receiver. Since the performance of the ASIC is related to the reliability of the radio interfacing apparatus 50, it is necessary to test the performance of the ASIC whenever necessary.
SUMMARY OF THE INVENTION According to the invention there is provided a method for testing an application specific integrated circuit (ASIC) located within a radio transmitter and receiver in an exchange system for a radio interface, comprising the steps of checking whether a test command for testing whether the ASIC is poor or not is input, generating response data for measuring a bit error rate (BER) in response to the received test command and outputting the response data to the input port of the ASIC, receiving the response data through the output port of the ASIC and calculating the BER, and determining whether the ASIC is poor by comparing the calculated BER with a designated reference value.
It is an advantage of the present invention to provide a method for providing reliability of a radio interfacing apparatus by testing whether an application specific integrated circuit (ASIC) located within a radio transmitter and receiver is normal or not.
Preferably the method inclues the step of displaying the failure state of the ASIC to the outside when the calculated BER is no less than the reference value.
BRIEF DESCRIPTION OF THE DRAWING (S) The above object and advantages of the present invention will become more apparent by describing in detail a preferred, non-limiting embodiment thereof with reference to the attached drawings in which: FIG. 1 is a diagram showing the junction operation of a general radio interfacing apparatus; FIG. 2 is a block diagram of a radio interfacing apparatus to which the present invention is applied ; and FIG. 3 is a flowchart for describing a method for testing an application specific integrated circuit (ASIC) according to a preferred embodiment of the present invention.
DESCRIPTION OF THE PREFERRED EMBODIMENT FIG. 2 is a block diagram of a radio interfacing apparatus 50 to which the present invention is applied. The radio interfacing apparatus 50 includes a tuner 102, a demodulator 104, an electronic counter-counter measures (ECCM) receiver 106, a link connector 108, a clock generator 110, a main controller 112, an order wire unit 114, a power supply 116, an ECCM transmitter 118, a modulator 120, and a power amplifier 122.
Referring to FIG. 2, the main controller 112 which is a module for general control of the radio interfacing apparatus 50 includes a central processing unit (CPU), a memory, and a peripheral logic circuit. The memory includes a ROM for storing a control program shown in FIG. 3 and a RAM for temporarily storing data generated during a control operation. The main functions of the main controller 112 are operating a system and controlling a front panel according to an accumulation program controlling method, setting radio data, and performing a self-diagnostic test.
The tuner 102 detects only a signal of a specific frequency band among radio signals received through an antenna and outputs the detected signal. The demodulator 104 converts the level of a signal output from the tuner 102 into a level where demodulation can be performed and outputs a base band signal generated by filtering an out-of-band signal to the ECCM receiver 106. The ECCM receiver 106 processes a spread band signal and a base band signal among receivers of a band spread spectrum communication system of a direct sequence (DS) method.
The link connector 108 performs wire matching and transmission for radio connection among wired devices. The clock generator 110 generates a system clock of 1,024 KHz and provides the generated system clock signal.
The order wire unit 114 allows operators to smoothly communicate with each other by calling the operator of an equipment connected on an adjacent or identical circuit connected to the radio interfacing apparatus 50 or receiving a call of another party. The power supply 116 converts the power source supplie through a power source supply cable into a power source which can be used by apparatuses and supplies the converted power.
The ECCM transmitter 118 processes the spread band signal and the base band signal among the transmitters of the band spread communication system of the DS method. The modulator 120 modulates the base band signal output from the ECCM transmitter 118, converts the modulated base band signal into a carrier frequency, and outputs the carrier frequency to the power amplifier 122.
The power amplifier 122 reduces signal phase distortion caused by an intermodulation from the signal output from the modulator 120 and linearly amplifies the signal to a level where communication can be performed.
FIG. 3 is a flowchart for describing a method for testing an application specific integrated circuit (ASIC) according to a preferred embodiment of the present invention.
Hereinafter, the method for testing the ASIC located within the ECCM receiver and transmitter 106 and 118 will be described with reference to FIGS. 2 and 3.
First, a system designer forms a menu for testing the ASIC located within the ECCM receiver and transmitter 106 and 118. A data pattern for testing the performance of the ASIC can be used as the menu. Namely, it is possible to test the performance of the ASIC using the output signal of the ASIC which responds to the data pattern applied to the ASIC.
To be specific, referring to FIG. 3, the main controller 112 checks whether a test command is input through the front panel in step 200. The process proceeds to step 210 when it is determined that the test command is input. The main controller 112 checks the state of the ECCM receiver 106 in the step 210.
When it is determined that the state of the ECCM receiver 106 is normal, the main controller 112 generates response data for measuring a bit error rate (BER) and records the generated response data in a predetermined I/O (step 230).
Then, the main controller 112 reads the predetermined l/O in order to measure the BER (step 240). After a certain time, it is checked whether the measured BER has a value of NON as a reference value (step 250).
When it is determined that the value of the measured BER is NON, the main controller 112 determines that the performance of the ASIC located within the ECCM receiver and transmitter 106 and 118 is normal (step 260). Here, it is possible to set the step 250 to be continuously performed at intervals of a constant time.
When it is determined that the value of the measured BER is not NON, the main controller 112 determines that the performance of the ASIC is poor (step 270). The ASIC determined to be poor can be transmitted to the operator through a monitoring process of the operator. Therefore, the operator can easily check the state of the radio interfacing apparatus using the result of test of the ASIC located within the ECCM transmitter and receiver.
As mentioned above, according to the method of testing the ASIC in the exchange system for the radio interface of the present invention, it is possible to easily check whether the ASIC which is the core parts of the ECCM transmitter and receiver included in the radio interfacing apparatus is poor or not and to thus prevent errors of the radio interfacing apparatus, caused by defects of the ASIC.

Claims (3)

  1. CLHIMSCLAIMS 1. A method for testing an application specific integrated circuit (ASIC) located within a radio transmitter and receiver in an exchange system for a radio interface, comprising the steps of: checking whether a test command for testing whether the ASIC is poor or not is input; generating response data for measuring a bit error rate (BER) in response to the received test command and outputting the response data to the input port of the ASIC ; receiving the response data through the output port of the ASIC and calculating the BER; and determining whether the ASIC is poor by comparing the calculated BER with a designated reference value.
  2. 2. The method of claim 1, further comprising the step of displaying the failure state of the ASIC to the outside when the calculated BER is no less than the reference value.
  3. 3. A method generally as herein described, with reference to and/or as illustrated in the accompanying drawings.
GB9930868A 1998-12-30 1999-12-24 Method of testing a radio circuit involving the calculation of the bit error rate Withdrawn GB2345346A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019980060972A KR20000044473A (en) 1998-12-30 1998-12-30 Method for testing application specific integrated circuit of exchange system for wireless linkage

Publications (2)

Publication Number Publication Date
GB9930868D0 GB9930868D0 (en) 2000-02-23
GB2345346A true GB2345346A (en) 2000-07-05

Family

ID=19567728

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9930868A Withdrawn GB2345346A (en) 1998-12-30 1999-12-24 Method of testing a radio circuit involving the calculation of the bit error rate

Country Status (2)

Country Link
KR (1) KR20000044473A (en)
GB (1) GB2345346A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2233864A (en) * 1989-06-01 1991-01-16 Mitsubishi Electric Corp Communication circuit fault detector
JPH08307926A (en) * 1995-05-08 1996-11-22 Fujitsu Ltd Bit error rate measuring instrument in digital mobile communication system
US5726991A (en) * 1993-06-07 1998-03-10 At&T Global Information Solutions Company Integral bit error rate test system for serial data communication links

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2233864A (en) * 1989-06-01 1991-01-16 Mitsubishi Electric Corp Communication circuit fault detector
US5726991A (en) * 1993-06-07 1998-03-10 At&T Global Information Solutions Company Integral bit error rate test system for serial data communication links
JPH08307926A (en) * 1995-05-08 1996-11-22 Fujitsu Ltd Bit error rate measuring instrument in digital mobile communication system

Also Published As

Publication number Publication date
KR20000044473A (en) 2000-07-15
GB9930868D0 (en) 2000-02-23

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732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)