GB2342776A - Refractory metal oxide resistors for integrated circuits - Google Patents
Refractory metal oxide resistors for integrated circuits Download PDFInfo
- Publication number
- GB2342776A GB2342776A GB9822667A GB9822667A GB2342776A GB 2342776 A GB2342776 A GB 2342776A GB 9822667 A GB9822667 A GB 9822667A GB 9822667 A GB9822667 A GB 9822667A GB 2342776 A GB2342776 A GB 2342776A
- Authority
- GB
- United Kingdom
- Prior art keywords
- metal oxide
- refractory metal
- layer
- hydrogen
- laver
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 229910044991 metal oxide Inorganic materials 0.000 title claims abstract description 51
- 150000004706 metal oxides Chemical class 0.000 title claims abstract description 51
- 239000003870 refractory metal Substances 0.000 title claims abstract description 46
- 238000000034 method Methods 0.000 claims abstract description 82
- 239000001257 hydrogen Substances 0.000 claims abstract description 40
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 40
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims abstract description 39
- 230000008569 process Effects 0.000 claims abstract description 38
- 238000011282 treatment Methods 0.000 claims abstract description 29
- 241000206607 Porphyra umbilicalis Species 0.000 claims description 43
- 239000000758 substrate Substances 0.000 claims description 21
- 238000004519 manufacturing process Methods 0.000 claims description 11
- 239000004065 semiconductor Substances 0.000 claims description 9
- 238000009832 plasma treatment Methods 0.000 claims description 8
- 238000007669 thermal treatment Methods 0.000 claims description 8
- 230000004888 barrier function Effects 0.000 claims description 6
- 238000009792 diffusion process Methods 0.000 claims description 6
- 229920002120 photoresistant polymer Polymers 0.000 claims description 6
- 229910002113 barium titanate Inorganic materials 0.000 claims description 2
- 229910052760 oxygen Inorganic materials 0.000 claims description 2
- 101100518964 Sphingobium sp. (strain YBL2) parT gene Proteins 0.000 claims 1
- 238000006243 chemical reaction Methods 0.000 abstract description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 10
- 229920005591 polysilicon Polymers 0.000 description 10
- 238000002955 isolation Methods 0.000 description 4
- 239000000306 component Substances 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 230000001419 dependent effect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000007787 solid Substances 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- -1 hydrogen ions Chemical class 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 150000002500 ions Chemical group 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/20—Resistors
- H01L28/24—Resistors with an active material comprising a refractory, transition or noble metal, metal compound or metal alloy, e.g. silicides, oxides, nitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/0802—Resistors only
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Semiconductor Integrated Circuits (AREA)
- Manufacture And Refinement Of Metals (AREA)
Abstract
The resistors are formed from refractory metal oxides 101. To provide only one specific resistive characteristic, one stage of hydrogen treatment is performed on a selected part of the refractory metal oxide layer 101 where the resistor is to be formed 101a. Through the hydrogen treatment, the selected part of the refractory metal oxide layer is converted into a semi-conductive oxide or a conductive oxide to serve as the desired resistor. Moreover, when forming a plurality of resistors with various resistive characteristics, a number of stages of hydrogen treatment are performed successively on selected portions of the refractory metal oxide layer where the resistors to be formed in the integrated circuit are defined. These various stages of hydrogen treatment are performed respectively based on different sets of process parameters such that the conversion of the selected portions of the refractory metal oxide layer into conductive oxides can be controlled to the desired degrees so as to form the resistors with various resistive characteristics.
Description
2342776 METHOD OF- FABRICATING RESISTORS rNINTEGRATED CIRCUITS
BACKGROU.",,D OF THE INVENTION 5 1. Field of the Invention:
This invention relates to a semiconductor fabrication method. and more particularlv. to a method of fabricating resistors in integrated circuits.
2. Description of Related Art:
Resistors are the most often used components in all kinds of electrical and elec- tronic circuits, including integrated circuits such as memory and logic devices. Conven-rated circuits are made from liahtly-doped polysilicon lavers tionall-, resistors in inte I that are shaped into specific lengths and cross-sectional areas to provide the desired re sistance values. Another conventional method of forming resistors in intearated circuits is to perform a thermal annealina process on a joined structure of a hicrh-resistance con ductive laver and a low-resistance conductive laver, such as an undoped polysilicon laver and a Kahly-doped polysilicon layer. This method also requires the conductive layers to be shaped into specific lengths and cross-sectionaI areas to provide the desired resistance values.
Patents that disclose methods of fabricating resistors in integrated circuits in clude the U.S. Patent No.5.316.978 entitled "Fabricatinz Resistors for Intezrated Cir culis", the U.S. Patent No.5,465,005 entitled "Polysilicon Resistor Structure Including i Polysilicon Contact". and the U.S. Patent Nio.5,677.228 entitled "Method of Fabricating a Resistor in an Intezrated Circuit", to name just a few.
One draNvback to the above-mentioned methods. however. is that. since polysill con is used to form the resistors. the method requires the use of an etching process to shape the polysilicon layers into specific lengths and cross-sectional areas to provide the desired resistance values. This makes the overall process quite complex and thus labo rious to carry out. Still another dra%,,-back is that the use of polysilicon allokvs only a limited ranze of resistance values for the resultant resistors. This is because the resis tance of a polysilicon-based resistor is largely dependent on the length and cross sectional area of the resistor. A high resistance therefore requires that the polysilicon laver be very long. Since a wafer is very small in size. the feasible range of resistance values for the resultant resistors is limited.
SUMMARY OF THE INVENTION
It is therefore an objective of the invention to provide a method of fabricating re sistors in an integrated circuit without usin2 polysilicon.
It is another objective of the invention to provide a method of fabricating resis tors in an inte2rated circuit. \&-hose fabrication process does not require etching. thus al lowin2 the overall process to be simpler and thus easier than the prior art to carry out.
It is still another objective of the invention to provide a method of fabricating re sistors in an intearated circuit which can form resistors with larze resistance values but without extensive lenaths. This will allow the required wafer area for the layout of the resistors to be less than that required for the prior art.
In accordance with the foregoing- and other objectives of the invention. a new method of fabricating resistors in integrated circuits is provided.
In a first preferred embodiment. the method of the invencion includes the fol lowing process steps: preparing a semiconductor substrate; forming a laver of a refracto ry metal oxide over the substrate.- and performing a hydrogen treatment process on a selected part of the refractory metal oxide laver so as to convert the selected pal-, of the refractory metal oxide layer into a conductive oxide of a specific resistive characteristic to sen-e as the desired resistor.
In a second preferred embodiment, the method of the invention includes the fol lowiniz process steps: preparing a semiconductor substrate; forming a laver of a refracto ry metal oxide over the substrate; and performing a number of stages of hydrogen treat ment successively on a plurality of selected portions of the refractory metal oxide laver where the resistors to be formed in the integrated circuit are defined. The various stazes of hydrogen treatment are performed respectively based on a number of predetermined sets of process parameters so as to convert the selected portions of the refractory metal oxide laver into conductive oxides of various resistive characteristics to serve the de sired resistors.
BRIEF DESCRIPTION OF DR_A1XTN'GS
The invention can be more fully understood by reading the following detailed description of the preferred embodiments, with reference made to the accompanying drawin!Zs, wherein:
4 FIGs. IA, IB, and IC are schematic sectional diagrams used to depict the steps involved in a first preferred embodiment of the method for fabricating a resistor in an intearated circuit: and FIGs. 2A. 2B. 2C. 2D, and 2E are schematic sectional diacrams used to depict 5 the steps involved in a second preferred embodiment of the method for fabricating a pluralltv of resistors of various resistance values in an intearat'-d circuit.
DETAILED DESCRIPTIONOF PR.EFERR.ED EMBODI-NIENTS
Before describing the preferred embodiments of the invention, the fundamental principle utilized by the invention for fabricating resistors in integrated circuits will be briefly described first.
Refractory metal oxides. such as TIO,, Ta.O,, FeO,,, and BaTiO,, are normally insulators with a wide band gap. However. it has been found that these refractory metal oxides can be converted into NN-type conductive oxides after being subjected to hvdro- gen plasma treatment or hydrogen thermal treatment. Through this kind of treatment. hvdroQen can be introduced in ion form into the structural gaps or vacancies arriong the metal atoms in these refractory metal oxides, thereby converting the insulative oxides into either semi- conductive or conductive oxides. The reaction can be formulated as follows:
0, -+ 1/2 0, - 2 e- It has also been found that the conductivity of the semi-conductive or conductive oxides is dependent on the amount of the oxygen in the oxides. Therefore, it can be concluded that the resistance of the hydrogen- treated oxides can be variably controlled to the desired values by adjusting the process pararneters used in the hydrogen plasma treatment or the hydrogen thermal treatment. These process parameters include process time. temperature. and concentration of the hydrogen ions.
Papers that disclose the use of hydrogen treatment to convert refractory metal oxides into conductive oxides include: (1) "SEMICONDUCTOR ELECTRODES FOR PHOTO EL ECTROLYSIS " presented by Fu-Tal Liou. who is also the inventor of this application. at the State Universit, of New York in 19S2 (see particularly page 15 1)- (2) I Y "SOLID ELECTROCHEIMICAL MODIFICATION OF SEMICONDUCTORS" presented by C. Y. Yang in Solid State Communication. Vol. 43. No. 8, pp. 6'_1-636 (see 10 particularly page 633): and (3) "Photoelectrol.vsis at Fe.O.,/TiO. Heterojunction Electrode" presented by Fu-Tai Liou et al. in JOURNAL OF THE ELECTROCHEIMICAL SOCIETY. Vol. 129, No. 21. pp. 342-3745 (see particularly page 3,42) in Febnar.v, 1982.
In accordance with the invention, two preferred embodiments are disclosed in the following. with the first preferred embodiment described in reference to FIGs. IA. 15 1 B, and I C, and the second preferred embodiment described in reference to FIGs. 2A.
2B. 2C. 2D. and 2E.
First Preferred Embodiment FIGs. IA. 113. and IC are schematic sectional diacrrams used to depict the steps involved in the first preferred embodiment of the method of the invention for fabricating a resistor in an inte2rated circuit.
FIG. I A illustrates the First step. in which a semiconductor substrate 100 is pre- pared. The substrate 100 can be afieady formed with various kinds of electronic components (not shown) and isolation structures (not shown), such as MOS transistors and 6 field oxide layers or STI (shallow-trench -isolation) structures. The process steps for forminc, these elements are not within the spirit and scope of the invention, so they are not shown and will not be further described in details in this specification. Broadly speakina. the method of the invention can be used to form a resistor at any location over 5 the substrate 100.
To form a resistor over the substrate 100, the first step is to deposit a laver of a refractory metal oxide 10 1 over the substrate 100. The refractory metal oxide is selected from the group consisting of TiO_ Ta.O, , FeO,, and BaTiO3.
Referrin- next to FIG. I B. in the subsequent step.. a mask laver 102, such as a photoresist laver or a diffusion barrier layer, is formed over the refractory metal oxide laver 101. The mask laver 102 is selectivelv removed to form a contact hole 103, therein to expose a selected part of the refractory metal oxide laver 10 1, as the shaded area indicated bv the reference numeral 10 1 a in FIG. I B. Then. with the mask layer 102 serving as a mask. the wafer is sub ected to hydrogen plasma treatment or hydrogen thermal treatment. Throuah this treatment. the unmasked part 10 1 a of the refractory metal oxide laver 101 is converted into a conductive oxide with a specific resistive characteristic (defined in terms of resistance value per unit cross-sectional area).
Referrina further to FIG. I C. in the subsequent step. the entire mask laver 102 is removed. The conductive oxide 10 1 a in the refractory metal oxide laver 10 1 then serves as the desired resistor.
The resistance of the conductive oxide 101 a in the refractory metal oxide laver 1 can be controlled to the desired value simply by forming, the contact hole 103) in the 7 step of FIG. I B with a predetermined size so as to shape the conductive oxide 101 a ac cordingly with a predetermined length to provide the desired resistance value.
Second Preferred Embodiment FIGs. 2A. 2B. 2C. 2D. and 2E are schematic sectional diagrams used to depict the steps involved in the second prefer-red embodiment of the method of the invention for fabricating a plurality of resistors in an integrated circuit. In paricular, Lese resis tors are to be formed with different resistive characteristics.
ReferrinQ to FIG. 2A, in the initial step. a semiconductor substrate _200 is pre pared. The substrate 200 can be already formed with various kinds of electronic compo nents (not shown) and isolation structures (not shown), such as NIOS transistors and field oxide layers or STI (shallow-trench isolation) structures. The process steps for forminLy these elements are not within the spirit and scope of the invention. so they are not shown and will not be further described in details in this specification. Broadly speaking, the method of the invention can be used to form resistors at any locations over the substrate 200.
To form resistors with various resistive characteristics over the substrate 200, the first step is to deposit a laver of a refractory metal oxide 201 over the substrate 200. The refractory metal oxide is selected from the group consisting of TiO_ Ta.O, , FeO, and BaTIO, Referring next to FIG. 2B. in the subsequent step, a first mask laver 202, such as a photoresist laver or a diffusion barrier layer. is formed over the refractory metal oxide laver 201. The first mask layer 202 is selectively removed to form a contact hole 203 therein to expose a first selected part of the refractory metal oxide layer 201, as the 8 shaded area indicated by the reference numeral 201 a in FIG. 2B. Then, with the mask laver 202 servinc, as a mask. the wafer is subjected to a first hydrogen treatment process.
such as hydrogen plasma treatment or h drogen thermal treatment. with a first prede y termined set of process parameters. Through this process. the unmasked part 210 1 a of the refractor-v metal oxide laver 201 is converted into a first conductive oxide with a first resistive characteristic.
Referrinz next to FIG. 2C, in the subsequent step. the entire mask laver 202 is removed.
Referring further to FIG. 2D. in the subsequent step. a second mask laver 204, such as a photoresist laver or a diffusion barrier laver. is formed over the refractory metal oxide laver 201. The second mask laver 204 is selectivelv removed to form a contact hole 205 therein to expose a second selected part of the refractory metal oxide laver 201. as the shaded area indicated by the reference numeral 201b in FIG. 2D. Then, with the mask laver 204 serving as a mask. the wafer is subjected to a second hydrogen treatment process. such as h-ydrogen plasma treatment or hydrogen thermal treatment.
with a second predeter-mined set of process parameters. The second set of process parameters are different from the first set of process parameters used in the first hydro gen treatment process performed in the step of FIG. 2B so as to allow the resultant con ductive oxide to have a different resistive characteristic. Therefore. through the hydro gen treatment process. the unrnasked part 201 b of the refractory metal oxide laver 201 is converted into a second conductive oxide with a second resistive characteristic.
Referrina next to FIG. 2E, in the subsequent step. the second mask laver 204 is entirely removed. This completes the fabrication of two resistors, i.e., 201a, 201b, over 9 the substrate 200 with different resistive characteristics. i.e., with different resistance values per unit cross-sectional area.
The resistance of the 20 Ia. 201 b can be controlled to the desired value simply by forming the contact holes 203, 205 in the mask layers 202, 204 with predetermined sizes so as to shape these resistors with predetermined lengths to provide the desired resistance values.
The second preferred embodiment disclosed above shows that a number of resistors can be formed over the subs-,rate with different resistive characteristics throueh a number of staaes of hvdrocen treatment. These resistors can be controlled to the desired resistance values simply by forming the contact holes in the mask layers with predetermined sizes so as to dimension these resistors with predetermined lengths to provide the desired resistance values. The invention is therefore able to provide resistors of any various resistance values in the intezrated circuit.
In conclusion. the method of the invention has the followin2 advanta.Qes over the pnior art.
(1) First, the method of the invention can be used to form resistors in an integrated circultwith a much xider range of resistance values than the prior art.
(2) Second. the method of the invention can be used to form resistors with different resistance values without having to performing an etching process as in the prior art. The method of the invention is therefore less complex in process steps than the prior art.
(3) Third. the method of the invention allows the resistors to be formed with a larze resistance value without having to extendina them lengthily over the substrate, thus allowinc, the use of a reduced layout area in the wafer to save cost. The inv ntion is therefore more cost-effective to implement than the prior art.
The invention has been described usin-g exemplary preferred embodiments. However, it is to be understood that the scope of the invention is not limited to the dis5 closed embodiments. On the contrary. it is intended to cover various modifications and sim;lar arranaements. The scope of the claims. therefore. should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements.
Claims (1)
- CLAINIS What is claimed is:I A method for fabricating a resistor In an integrated circuit. comprising the szeps of. 5 preparing a semiconduc-,or substrate-. forminQ a laver of a refractor-,. metal oxide over the substrate: and performing a hydrogen treatment process on a selected par-. of the r'-fractory metal oxide laver so as to convert the selected par-, of the refractory metal oxide lavel, into a conductive oxide with a specific resistive characrenstic to ser-,-e as the desired r,-10 sistor. I The method of claim I. wherein the refractory metal oxide is chosen from a a I group that consists of T'O, Ta.O,, Fe,O, and BaTiO., 3. The method of claim 1 or 2, wherein the hydrogen treatment process is chosen from a group that consists of a hydrogen plasma treatment process and a hydrogen thermal treatment.4. The method of claim 1, 2 or 3, further comprising the steps of:formina a mask layer over the refractory metal oxide laver prior to the step of performing the hydrogen treatment process.; and removing the mask laver after the step of performing the hydrogen treatment 20 process..5. The method of claim 4, wherein the mask layer is selectively removed to form a contact hole to expose the selected part of the refractory metal oxide layer.6. The method of claim 4 or 5, wherein the mask layer is a photoresist layer.12 7. The method of claim 4 or 5, wherein the mask layer is a diffusion barrier layer.8. A method for fabricating a Plurality of resistors of various resistance values in an integrated circuit. comprising the steps of preparing a semiconductor substrate; forminQ a layer ofa refractory metal oxide over the substrate.performing a first hydrogen treatment process. based on a first set of process pa ramecers. on a firs-, selected part of the refractory metal oxide layer so as to convert the first selected parT of the refractory metal oxide layer into a firsz conductive oxide vvith a first resistive characteristic to serve as a first resistor; and performing a second hydrogen treatment process based on a second set of proc ess parameters on a second selected part of the refractory metal oxide layer so as to con vert the second selected part of the refractory metal oxide layer into a second conductive oxide with a second resistive characteristic to se-ve as a second resistor.9. The method of claim 8, wherein the refractory metal oxide is chosen from a group that consists of TIO, Ta.O,. Fe,O,, and BaTiO3.10. The method of claim 8 or 9, wherein the hydrogen treatment process is chosen from a group that consists of a hydrogen plasma treatment process and a hydrogen thermal treatment.11. The method of claim 8, 9 or 10, further comprising the steps of:forming a first mask layer over the refractory metal oxide layer prior to the step of performing the first hydrogen treatment process.. and removinEz the first mask laver after the step of performing the first hydrogen treatment process..13 12. The method of claim 11, wherein the first mask layer is selectively removed to form a contact hole that exposes the first selected part of the- refractory metal oxide layer where the first resistor is to be formed.13. The method Of claim 11 or 12, wherein the first mask Irlyer is a photoresist layer.14. The method of claim 11 or 12, wherein the first mask layer is a diffusion barrier layer.15. The method of claim 11, 12 13 or 14, further comprising the steps of:forrnin2 a second mask layer over the refractory metal oxide layer prior to the 10 step of performing the second hydrogen treatment procless.: and removing the second mask layer after the step of performing the second hydrogen treatment process, 16. The method of claim 15, wherein the second mask layer is selectively removed to form a contact hole to expose the second selected part of the refractory metal oxide layer where the second resistor is to be formed.17. The method of claim 15 or 16, wherein the second mask layer is a photoresist layer. 18. The method of claim 15 or 16, wherein the second mask layer is a diffusion barrier layer. 20 19. A method for fabricatinc, a plurality of resistors of various resistance values in an incezrated circuit comprising the steps of. preparing a semiconductor substrate; forming a layer of a refractory metal oxide over the substrate; and 14 performing a number of stages of hydrogen treatment successively on a pluralitV of selected portions of the refractory metal oxide laver where the resistors to be formed in the integrated circuit are defined. wherein the various stages-of hydrogen treatment are performed respectively based on a number of predetermined sets of process parameters so as to convert the selected portions of the refractory metal oxide laver into conductive oxides with various resistive characteris-,ics to serve as the desired resiszors.20. The method of claim 19, wherein the refractory metal oxide is chosen from a group that consists of TiOz, TazO.5. Fe,01. and BaT'03' 21. The method of claim 19 or 20, wherein the hydrogen treatment process is chosen from a group that consists of a hydrogen plasma treatment process and a hydrogen thermal treatment.22. A method of fabricating a resister in an integrated circuit, substantially as hereinbefore described with reference to and/or substantially as illustrated in any one of or any combination of the accompanying drawings.Iyl
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB9822667A GB2342776B (en) | 1998-07-06 | 1998-10-16 | Method of fabricating resistors in integrated circuits |
| JP10304329A JP2000031389A (en) | 1998-07-06 | 1998-10-26 | Manufacture of resistor for integrated circuit |
| FR9813430A FR2780810B1 (en) | 1998-07-06 | 1998-10-27 | METHOD FOR MANUFACTURING RESISTORS IN INTEGRATED CIRCUITS |
| DE19849746A DE19849746A1 (en) | 1998-07-06 | 1998-10-28 | Resistors are produced in ICs e.g. memory and logic circuits |
| NL1010430A NL1010430C2 (en) | 1998-07-06 | 1998-10-29 | Method for fabricating resistors in integrated circuits. |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW087110877A TW409419B (en) | 1998-07-06 | 1998-07-06 | Manufacture method of integrated circuit resistor |
| GB9822667A GB2342776B (en) | 1998-07-06 | 1998-10-16 | Method of fabricating resistors in integrated circuits |
| NL1010430A NL1010430C2 (en) | 1998-07-06 | 1998-10-29 | Method for fabricating resistors in integrated circuits. |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| GB9822667D0 GB9822667D0 (en) | 1998-12-09 |
| GB2342776A true GB2342776A (en) | 2000-04-19 |
| GB2342776B GB2342776B (en) | 2000-12-20 |
Family
ID=27269519
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB9822667A Expired - Fee Related GB2342776B (en) | 1998-07-06 | 1998-10-16 | Method of fabricating resistors in integrated circuits |
Country Status (5)
| Country | Link |
|---|---|
| JP (1) | JP2000031389A (en) |
| DE (1) | DE19849746A1 (en) |
| FR (1) | FR2780810B1 (en) |
| GB (1) | GB2342776B (en) |
| NL (1) | NL1010430C2 (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4039698A (en) * | 1976-01-23 | 1977-08-02 | Bell Telephone Laboratories, Incorporated | Method for making patterned platinum metallization |
| JPS59117255A (en) * | 1982-12-24 | 1984-07-06 | Toshiba Corp | Trimming method of resistor body |
| EP0463174A1 (en) * | 1989-12-26 | 1992-01-02 | Sony Corporation | Method of manufacturing semiconductor device |
| EP0641144A1 (en) * | 1993-08-09 | 1995-03-01 | Matsushita Electric Industrial Co., Ltd. | Metal oxide film resistor and method for producing the same |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3488767A (en) * | 1965-05-17 | 1970-01-06 | Air Reduction | Film resistor |
| DE1960886A1 (en) * | 1969-12-04 | 1971-06-09 | Siemens Ag | Metal oxide film resistor on insulated - substrate |
| DE3138960A1 (en) * | 1981-09-30 | 1983-04-14 | Siemens AG, 1000 Berlin und 8000 München | METHOD FOR PRODUCING ELECTRICALLY CONDUCTING LAYERS |
| EP0105639B1 (en) * | 1982-09-08 | 1988-01-07 | Kabushiki Kaisha Toshiba | Production of resistor from insulating material by local heating |
| US4785157A (en) * | 1986-01-09 | 1988-11-15 | Mitsubishi Denki Kabushiki Kaisha | Method for controlling electric resistance of a compound-type resistors |
| JPS6374033A (en) * | 1986-09-18 | 1988-04-04 | Canon Inc | Formation of pattern |
| JP3232937B2 (en) * | 1995-02-16 | 2001-11-26 | 松下電器産業株式会社 | Method for manufacturing semiconductor device |
-
1998
- 1998-10-16 GB GB9822667A patent/GB2342776B/en not_active Expired - Fee Related
- 1998-10-26 JP JP10304329A patent/JP2000031389A/en active Pending
- 1998-10-27 FR FR9813430A patent/FR2780810B1/en not_active Expired - Fee Related
- 1998-10-28 DE DE19849746A patent/DE19849746A1/en not_active Withdrawn
- 1998-10-29 NL NL1010430A patent/NL1010430C2/en not_active IP Right Cessation
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4039698A (en) * | 1976-01-23 | 1977-08-02 | Bell Telephone Laboratories, Incorporated | Method for making patterned platinum metallization |
| JPS59117255A (en) * | 1982-12-24 | 1984-07-06 | Toshiba Corp | Trimming method of resistor body |
| EP0463174A1 (en) * | 1989-12-26 | 1992-01-02 | Sony Corporation | Method of manufacturing semiconductor device |
| EP0641144A1 (en) * | 1993-08-09 | 1995-03-01 | Matsushita Electric Industrial Co., Ltd. | Metal oxide film resistor and method for producing the same |
Also Published As
| Publication number | Publication date |
|---|---|
| FR2780810B1 (en) | 2001-05-25 |
| FR2780810A1 (en) | 2000-01-07 |
| GB2342776B (en) | 2000-12-20 |
| NL1010430C2 (en) | 2000-05-04 |
| DE19849746A1 (en) | 2000-01-13 |
| GB9822667D0 (en) | 1998-12-09 |
| JP2000031389A (en) | 2000-01-28 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| SE439214B (en) | PROCEDURE FOR THE PREPARATION OF AN ELECTRICALLY CONDUCTIVE SAMPLES, INCLUDING A LAYER OF TITANE OR DENTAL SILICID, ON A LAYER OF POLYCRYSTALLINE SILICONE | |
| US20070080404A1 (en) | Semiconductor device | |
| US5622884A (en) | Method for manufacturing a semiconductor memory cell and a polysilicon load resistor of the semiconductor memory cell | |
| JP2000150671A (en) | Fabrication of load resistor | |
| US6667523B2 (en) | Highly linear integrated resistive contact | |
| EP0697714A1 (en) | Method for forming gate electrode of semiconductor device | |
| JP2642523B2 (en) | Method of manufacturing semiconductor integrated circuit device having charge-coupled device | |
| EP0461750A2 (en) | Interconnect for integrated circuits | |
| US5705418A (en) | Process for fabricating reduced-thickness high-resistance load resistors in four-transistor SRAM devices | |
| US6211030B1 (en) | Method for fabricating resistors in integrated circuits | |
| JP2006237425A (en) | Manufacturing method of semiconductor device | |
| GB2342776A (en) | Refractory metal oxide resistors for integrated circuits | |
| KR19980070150A (en) | Noise-Isolated Investment Resistor | |
| KR100877261B1 (en) | Mim capacitor manufacturing method of semiconductor device | |
| JPS58215055A (en) | Semiconductor integrated circuit device | |
| KR20000027906A (en) | Method for manufacturing resistor in integrated circuits | |
| US10957644B2 (en) | Integrated structures with conductive regions having at least one element from group 2 of the periodic table | |
| US7125797B2 (en) | Contact structure of semiconductor device and method of forming the same | |
| US6670254B1 (en) | Method of manufacturing semiconductor device with formation of a heavily doped region by implantation through an insulation layer | |
| US5851871A (en) | Process for manufacturing integrated capacitors in MOS technology | |
| KR100267808B1 (en) | Method for forming multilayer wiring of semiconductor device using superconductor material | |
| UA57865C2 (en) | Method for producing a semiconductor element with wiring extending partly in a substrate, and a semiconductor element produced by using the method | |
| KR100328264B1 (en) | manufacturing method of semiconductor devices | |
| JP2005150178A (en) | Manufacturing method for semiconductor device | |
| KR100218267B1 (en) | Manufacturing method of semiconductor devices with resistor layer with high and low resistivity |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 20031016 |