GB2341722A - Semiconductor device - Google Patents

Semiconductor device Download PDF

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GB2341722A
GB2341722A GB9820192A GB9820192A GB2341722A GB 2341722 A GB2341722 A GB 2341722A GB 9820192 A GB9820192 A GB 9820192A GB 9820192 A GB9820192 A GB 9820192A GB 2341722 A GB2341722 A GB 2341722A
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semiconductor device
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GB2341722B (en
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Andrew James Shields
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Toshiba Europe Ltd
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Priority to US09/396,438 priority patent/US6720589B1/en
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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y20/00Nanooptics, e.g. quantum optics or photonic crystals
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/015Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on semiconductor elements having potential barriers, e.g. having a PN or PIN junction
    • G02F1/017Structures with periodic or quasi periodic potential variation, e.g. superlattices, quantum wells
    • G02F1/01708Structures with periodic or quasi periodic potential variation, e.g. superlattices, quantum wells in an optical wavequide structure
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/122Single quantum well structures
    • H01L29/125Quantum wire structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/122Single quantum well structures
    • H01L29/127Quantum box structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7782Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET
    • H01L29/7783Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET using III-V semiconductor material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/80Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
    • H01L29/802Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with heterojunction gate, e.g. transistors with semiconductor layer acting as gate insulating layer, MIS-like transistors
    • H01L29/803Programmable transistors, e.g. with charge-trapping quantum well
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0352Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2216/00Indexing scheme relating to G11C16/00 and subgroups, for features not directly covered by these groups
    • G11C2216/02Structural aspects of erasable programmable read-only memories
    • G11C2216/08Nonvolatile memory wherein data storage is accomplished by storing relatively few electrons in the storage layer, i.e. single electron memory
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/788Field effect transistors with field effect produced by an insulated gate with floating gate

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  • Condensed Matter Physics & Semiconductors (AREA)
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Abstract

The device comprises a quantum well layer (81) and a quantum dot layer (85) which are separated by a tunnel barrier (83), means for applying an electric field (73, 91) and means for measuring a current characteristic (93, 95) of the quantum well layer (81). A semiconductor device which can be configured to work as high density optical memory, an amplifying photo-transistor, an electro-optic modulator, an optical switch or a high-speed (greater than >100 GHz) field effect transistor.

Description

k -) 2341722 1 Semiconductor Device
The present invention relates to the field of semiconductor devices, more specifically, the present invention relates to so-called low dimensional semiconductor devices.
The electrons and holes in an ideal bulk semiconductor have a continuous spectrum of energy states. Confinement of the carriers in one or more dimensions modifies this energy spectrum by a quantisation of the kvector along the confinement direction(s). In a quantum dot, the motion of the carriers is restricted in all three spatial dimensions. Consequently, the energy spectrum of the dots consists of a series of discrete levels. As the size of the quantum dot reduces, the energy spacing between these discrete levels increases. The maximum number of electrons which can occupy each electron level is two, corresponding to the up and down spin states. Similarly, each hole level has an occupancy of two. Optical transitions occur between the discrete electron and discrete hole levels.
A quantum dot can be used to store charge to develop a memory structure for example, Imamura et al. Jpn. J. Appl. Phys. Vol. 34 (1995) L1445-1, 1447. Here, the device has a plurality of InAs quantum dot of different sizes. Upon illumination, an electron-hole pair is excited in the quantum dot. Due to the biasing of the structure, the electron is swept vertically down through the structure into an ohmic metal contact. The hole is trapped in the quantum dot. Due to the movement of electrons, a photocurrent flows. Only a finite number of holes can be stored in a dot. If this finite number is reached, no further holes can be stored in the dots and hence no photocurrent due to dissociated electrons can flow. Thus, stored charge can by detected by a lack of photocurrent.
The carrier trapping properties of quantum dots is also illustrated in Yusa et al Appl. Phys. Lett. 70 (1997) 345. Here, a plurality of quantum dots are used to show trapping 2 effects which occur when a two dimensional electron gas (2DEG) is illuminated. NO device applications are exemplified in this paper.
The present invention provides a semiconductor device comprising first and second active layers separated by a first barrier layer, means for applying electricfield normal to the first and second active layers and detecting means for detecting a change in a characteristic of the first active layer, wherein the first active layer is a quantum well layer capable of supporting a two dimensional carrier gas and the second active layer comprises a plurality of quantum dots.
The detecting means can either measure a change in the transport characteristics of the first active layer or the optical characteristics of the layer. For example, a change in the optical characteristics due to a change in the carrier concentration or electric field across the layer could be detected. Changing the carrier density in the first active layer alters its absorption or emission spectrum. A change in the electric field across the first active layer will cause a change in the energy or intensity of its absorption or emission spectrum. Changes in the carrier concentration, mobility or field across the layer also manifest themselves in the transport characteristics of the layer.
The device of the present invention can be configured to operate in a number of different ways. First, a possible mode of operation as a high density read/write optical memory device will be discussed. The applicant does not wish to be bound by a particular theory or explanation. However, it is believed that the device can operate via two different mechanisms which both involve carriers being stored in the quantum dots. In the first mechanism, the carriers in the quantum well have an opposing polarity to the carriers which are stored in the dots. In the second mechanism, the carriers in the quantum well and the carriers stored in the dots are of the same type.
The first mechanism will be explained using holes as the stored carrier, however, it will be apparent to a person skilled in the art either electrons or holes can be stored in the 3 quantum dots depending on the layer thickness and composition, doping polarities and applied biases.
A quantum dot in the second active layer is illuminated with a beam of radiation with an energy close to that of the band-gap of the quantum dot. The structure is biased so that it is energetically favourable for the electron to tunnel through the barrier to a 2DEG in the quantum well layer, leaving behind a hole stored in the quantum dot. This effects a change in the conductivity of the 2DEG.
Without wishing to be bound by any particular theory or explanation, the applicant believes that the change in conductivity during a write operation is predominantly due to the positive charge stored in the barrier which alters the band bending and hence persistently alters the conductivity of the 2DEG. Thus, depending on the actual configuration of the device, the conductivity of the 2DEG can either increase or decrease during a write operation. It is also believed that where the stored carriers are electrons, the negative charge stored in the barrier during the write operation will change the conductivity of the quantum well layer. In the case where the stored charges are electrons, the quantum well will support a two dimensional hole gas.
For a read operation, the device is again illuminated with light energy of near the quantum dot band gap, but now with a weaker intensity. If two holes have already been stored in the dot during the write operation, another hole cannot be stored. Hence, there will be no further change in the conductivity of the 2DEG. If no holes are trapped in the dot, a change in the conductivity of the 2DEG will be detected.
1 For both read and write modes of the first mechanism, the conduction band edge of the 2DEG lies below the first confined conduction band level of the quantum dot. Thus, electrons transfer from the dot to the 2DEG, as the 2DEG is energetically more favourable. To reset the device, the bias across the device is changed so that the energy of an electron in the 2DEG lies above that of the conduction band level of electrons in the dot. Thus, electrons are transferred to the quantum dots which can then combine 4 with the holes. This resets the device as the electron-hole pairs relax back to the ground state.
In the second mechanism, the carriers stored in the dots are of the same type as the carriers stored in the well. In the situation where the carriers in the quantum well are electrons, the stored carriers in the quantum dots are electrons. Carriers are preferably provided to the dots via a doped barrier situated on an opposing side of the second active layer to the first active layer. This layer may also be a modulation doped barrier layer, with an undoped spacer layer adjacent the second active layer.
The applicant does not wish to be bound by any theory or explanation. However, it is believed that the dots contain excess electrons prior to illumination. The charged dots act as scattering centres for the electrons in the 2DEG, which consequently has a relatively low mobility. After illumination, the number of excess electrons in the quantum dots is reduced and the number of electrons in the 2DEG increases. A decrease in negative charge of the dots results in an increase in the 2DEG conductivity, Also, the increase in the carrier concentration of the 2DEG causes an increase in the conductivity of the 2DEG.
The inverse structure may also be realised where excess holes populate the quantum dots prior to illumination and the quantum well supports a two dimensional hole gas.
This second mechanism also lends itself to a selectively addressable memory structure.
To produce a memory structure with a good retention time, it is preferable if there is a large confining potential for the trapped carriers. This is equally applicable to devices which are believed to operate by either the first or the second mechanism. The confining potential is largely dependent on the characteristics of the first barrier layer. For the avoidance of doubt as used hereinafter, a barrier layer is a layer with a larger band-gap than that of the active layers.
I To produce a large confining potential, it is advantageous to maximise the carrier potential discontinuity between the quantum dot and the barrier layer. The 'size' of the confining potential is dependent on both the potential height of the barrier layer and the width of the barrier layer itself A large barrier is taken to mean a barrier which has a large carrier potential discontinuity with respect to the quantum dot layer and/or a barrier which is relatively wide.
For example, if the holes are stored in InAs quantum dots, a large trapping potential can be created by choosing AlAs as the barrier material both above and below the dots.
The electric field normal to the layers can be varied to modulate the band structure of the device.
More preferably, the first and second active layer are coupled layers. For the memory structure, the layer are preferably weakly coupled. The coupling between the layers needs to be sufficiently strong to allow tunnelling of some carriers from the second active layer to the first active layer. However, the coupling must also be sufficiently weak to suppress the tunnelling of carriers from the first active layer back to the second active layer.
The quantum well can be thought of as a sheet of charge located within the first active layer. The position of the quantum well within the first active layer, with respect to the adjacent layers of the first active layer is dependent on the band structure. In order to achieve sufficiently weak coupling between the quantum well and the plurality of dots, it is preferable if the separation between the quantum well and the dots is between 10 nm and 500 nm.
For example, if the plurality of quantum dots are InAs (or AlInAs) and the first active layer is InGaAs (or GaAs), the tunnel barrier layer could be AlAs or Al,,Gaj,As (or GaAs) with a width of between 10 nm and 500 nm. More preferably between 10 nm and 200 nm.
6 To detect the presence of charge in the first active layer, it is preferable if at least two ohmic contacts are provided to the first active layer. A current or a voltage will be measured between these two contacts. For an accurate reading, it is more preferable if a four- terminal voltage measurement is used.
Preferably, the device is configured so that electrons are supplied to the 2DEG. This is preferably done by means of a doped second barrier layer which is provided adjacent the f irst active layer. More preferably, this doped barrier layer is a modulation doped barrier comprising a doped barrier layer and an undoped spacer which lies adjacent the first active layer.
Devices according to a first aspect of the present invention either with or without a doped barrier layer overlying the layer of quantum dots, can also be used where the stored carriers provided to the 2DEG are holes, However, electron trapping is less efficient- Therefore, preferably holes are trapped in the quantum dots.
The field normal to the active layers can be provided by providing a front-gate overlying the structure. More preferably, a back-gate is also provided. It is preferable if the front-gate is transparent to radiation with an energy close to that of the quantum dot band-gap.
1.
The means for applying electric fields may also comprise a p-type terminal and n-type terminal located on opposite sides of the first and second active layers. In other words, the structure is sandwiched between doped p and n-type layers.
The energy spectrum of the quantum dots is dependent on its size, shape and local environment. Hence, different quantum dots possess different ground state energies and different optical transition energies. The device may comprise quantum dots of 41- different sizes which require radiation of different frequencies to excite an electron-hole pair.
7 A convenient method of forming a layer of quantum dots is by using the StranskiKrastanow growth mode wherein a first layer is growing on a substrate with a different lattice constant to the first layer. The first layer proceeds by three dimensional island growth and small quantum dots can be produced typically less than 50 nm. A preferable material system for producing this device uses the growth of InAs, InGaAs or InAlAs quantum dots with GaAs or (AlGa)As barriers.
The device may be formed such that the 2DEG layer is grown before the quantum dot layer. This growth order has been found to produce the best quality layers. However, the ordering may be reversed i.e. the 2DEG layer formed overlying the dot layer. Other lattice mismatched systems can be used such as InGaN or AlGaN, This material has a shorter wavelength and may therefore allow a greater storage density. Another possible system for producing the dots uses strained SIGe Heterostructures.
The device of the first aspect of the present invention could also be used as a holographic type of optical memory device. Here, the optical beam is split into a signal beam and a reference beam. The signal beam is passed through a spatial light modulator in order to encode the information to be stored. The signal and reference beams are focused onto the surface of the sample where they produce an interference pattern. This creates a spatial variation in the carrier occupancy of the dots which acts to store information in the dots. The information can be recalled by illuminating the C same area of the sample by the reference beam. The stored variation in the dot occupancy acts to diffract the reference beam and thereby to recover the signal beam which is detected by a suitable means, such as a charge coupled device array.
The structure may be provided with upper and lower cladding layers to channel light in ZD a direction parallel to the plane of the first active layer. The structure may also be provided with guide means to confine light to a region of the first act ive layer, for ID example, a strip type waveguide could be used.
8 The device may also be illuminated in the plane of the active layers instead of or in addition to illuminating generally perpendicular to the layers.
In a second aspect, the present invention provides a method of operating the device of the first aspect of the present invention, the method comprising the steps of.. applying a field across the active layers sufficient to allow carriers of a predetermined polarity to tunnel from the second active layer to the first active layer under illumination; selectively illuminating one or more of the plurality of quantum dots with a beam of radiation to excite at least one electron-hole pair such that at least one carrier can tunnel from the second active layer to the first active layer; and detecting a change in the transport characteristics in the first active layer.
It has been mentioned above that the device of the present invention is suitable for operation as a high density optical memory structure.
The device can be adapted to be an amplifying photo -trans i stor. The change in the conductivity of the 2DEG can be used to detect the absorption of light. After the photon is absorbed, the photoexcited electron and hole are spatially separated into the well and dot layers creating a detectable change in the conductivity of the 2DEG. The mobility of carriers in the first active layer can be modulated by changing the electric field across the first active layer. The mobility can be optimised such that when a carrier tunnels from a dot to the first active layer, a larger rise in conductivity of the device is seen than if the vertical photo-current was measured directly.
A high speed MODFET can also be realised using this structure. Here, the total carrier density in both the well and the dot is maintained constant. When the device is biased so that all the electrons are in the well, the source-drain conductivity is high. However, when the device is biased so that some of the electrons are transferred to the dots, these electrons are trapped and cannot contribute to the conductivity of the device. Therefore, 9 the conductivity is reduced. The electrons tapped in the dots also contribute to scattering of the carriers in the 2DEG, further reducing the mobility of the 2DEG.
The switching speed of this device is limited by the tunnelling time between the dots and the well. For fast switching response a smaller barrier should be used, the can be either a thin barrier or a barrier with a relatively small band-gap for a barrier layer. Typically, for example, the barrier could be between 0.5 nm to 5 nm of AlGaAs.
The MODFET can potentially be switched with frequencies of about 100 GHz to 10 THz. A barrier layer is required otherwise a large separation between the first and second active layers is required to allow resonance of the electron levels at achievable electric fields.
Thus in a third aspect, the present invention provides a method of operating the device of the first aspect of the present invention, the method comprising the steps of: measuring the resistivity of the first active layer via the ohmic contacts; and changing the resistivity of the first active layer by transferring carriers between the first and second active layers by altering the field across the active layers.
The absorption of incident radiation is dependent on the population of the quantum dots. Therefore, this device can be configured to work as an optical switch or an electro-optical modulator. When the dots have excess carriers, optical absorption is suppressed increasing the optical transparency of the device. In a zero dimensional system there is a large energy separation between the ground and excited states. Therefore, just adding two electrons or holes to the quantum dot completely suppresses absorption of radiation with an energy close to that of the quantum dot band gap.
Thus in a fourth aspect, the present invention provides a method of operating the semiconductor device of the first aspect of the present invention, the method comprising the steps of: shining a beam of radiation incident parallel to the plane of the layers, and modulating the electric field parallel to the first and second layers to modulate the absorption of the said beam.
The optical modulator will be practically realised by incorporating the quantum well structure into a waveguide for channelling the light along the plane of the layers. Preferably, upper and lower cladding layers are provided, wherein the first active layer overlies the lower cladding layer and the upper cladding layer overlies the second active layer. Again, this device can be operated at a very high frequencies (> 100 GHz).
It may also be preferable to provide guide means for confining light to a predetermined region of the first active layer. For example, a strip-type waveguide layer may be provided overlying the structure.
For the MODFET or optical modulator structures, it is preferable if the f irst and second active layers are more strongly coupled to allow tunnelling in both directions between the first and second layers. The smaller separation between the dot layer and the 2DEG allows more effective coupling of the dots to the 2DEG and hence, faster and more efficient tunnelling.
The present invention will now be described a way of example and with reference to the accompanying figures in which-, Figure I shows a selectively addressable optical memory in accordance with a first embodiment of the present invention; Figure 2 is a plot showing the contribution of and individual quantum dot to the absorption of the ensemble; Figure 3 shows a band structure of the embodiment of Figure 1, in a "write mode", Figure 4 shows a band structure of a device of Figure 1, in a "read mode"; 1 Figure 5 shows a band structure of the device of Figure 1, with the conduction band edge of the 2DEG below the first conduction band level of the quantum dot; Figure 6 shows a band diagram of the device of Figure 1,where the conduction band edge of the 2DEG is located higher than the first confined conduction band level of the quantum dot.
Figures 7a to 7f show variations on the layer structure of the device of Figure 1 Figure 8 shows a memory structure and a high speed MODFET in accordance with the present invention; Figure 9 shows a layer structure of the device band structure of Figure 8; Figure 10 shows results from a memory device in accordance with an embodiment of the present invention, Figure 11 shows a heterojunction bi-polar transistor in accordance with a third embodiment of the present invention; Figure 12 shows a band structure of the device of Figure 11 Figure 13 shows an optical modulator in accordance with the present invention; and Figure 14 shows in detail, the guided region of Figure 13.
12 Figure I shows an outline structure of a selectively addressable optical memory structure. A first active layer which is a 2DEG layer 3 is provided overlying a substrate or buffer layer 1. A barrier layer 5 is provided overlying the 2DEG layer 3). The barrier layer 5 has a larger band gap than the 2DEG layer 3. A second active layer comprising a plurality of quantum dots 7 overlies the barrier layer 5. An upper undoped barrier layer 8, is provided overlying the quantum dot layer 7. For simplicity, front and back gates or other means of applying an electric field across the device are not shown in this diagram. Two ohmic contacts 9 and I I are provided to the 2DEG layer 3. A current I can be measured between the two ohmic contacts.
For a "write" operation, a laser beam 13 is scanned across the sample. The laser beam 13 has an energy close to the quantum dot band gap, i.e. it is capable of exciting an electron-hole pair in a predetermined dot. If the laser beam illuminates such a dot, an electron 10 tunnels from the dot layer 7 through the tunnel barrier 5 to the 2DEG layer 3. This causes a change in the conductivity of the 2DEG.
The laser can be focused on an area of the device so as to excite all the dots in that area. Alternatively, the wavelength of the laser can be used to write to different dots within the laser spot size. The enlarged portion of Figure I shows part of the layer of dots 7 in detail. The dots are inhomogeneously broadened at each position. Thus, the plurality of dots comprise dots with different transitions energies. Dots with different transition energies can be individually addressed by changing the laser wavelength.
Figure 2 shows a graph of the absorption of the dot layer against laser wavelength. The dots have a plurality of different transition energies.
A possible mechanism to explain the operation of the device will be described with reference to the band structure in Figure 3. A field is applied across the device such that, in the write operation, the conduction band edge 21 of the 2DEG 23 lies below the first conduction band confined energy state 25 of the quantum dot 27. Also, the conduction band edge 29 of the 2DEG 23 lies below the first confined conduction band state 31 of the quantum dot 27. Upon illumination, an electron hole pair is excited in the quantum dot 27. The electron transfers to the quantum well at first excited energy state 25 and the hole is trapped in the first confined valence band state 3 1. The electron trapped in the first confined energy state 25 tunnels through the barrier 33 into the 2DEG 23. The hole in the first confined valence band state of 3 1 is trapped here as it is not energetically viable for it to transfer to the 2DEG 23.
The "read" operation is shown in Figure 4. The biasing of the structure remains the same as for Figure 3. Here, the device is illuminated but an electron/hole pair cannot be separated as there is no free energy level to accommodate the electron hole pair. Therefore, an electron is not transferred to the 2DEG 23 and no change in the conductivity of the quantum well is observed by illuminating a dot which already contains holes.
Figure 5 and 6 shows how the excess charges in the quantum dot can be erased. In Figure.5, the conduction band edge 21 of the 2DEG 23 is at a lower energy than the first confined conduction band level of the quantum dot 27. Therefore, electrons trapped in the first confined conduction band level 25 tunnel to the energetically more favourable 2DEG.
Figure 6 shows the situation where the field normal to the active layers is adjusted so that confined level 25 of the quantum dot 27 is below the conduction band edge of the 2DEG 23. This results in electrons from the 2DEG 23 tunnelling through the tunnel barrier 33 into the vacant state 25. A dot located in the first confined valance band level 31 can then recombine with the electron in level 25. Once the holes trapped in level 33 1 have combined with electrons, the biasing can be returned to the levels shown in Figure 5 so that the excess electrons tunnel through barrier 33 back into the 2DEG 23.
14 The possible device operation described in relation to figures 3 to 6 has assumed that an undoped barrier layer overlies the dot layer 27. If barrier layer is doped, the observed external operation of the device is similar to that described above, i.e. a change in the conductivity of the 2DEG 23 is observed in response to a write operation. The applicant does not wish to be bound by a particular theory or explanation. However, it is believed that if an n-doped barrier layer is provided overlying the quantum dots 27, the quantum dots are populated with electrons prior to illumination. These occupied dots 27 act as scattering centres for transport in the 2DEG 23. When the dots 27 are illuminated, the number of excess electrons in the quantum dots 27 are reduced and the number of electrons in the 2DEG 23 is increased. The increase in the carrier concentration of the 2DEG 23 causes the conductivity of the 2DEG 23 to increase. Also, the decrease in the negative change of the dots 27 results in an increase in the =1 conductivity of the 2DEG 23.
Figure 7 shows typical layer structures which may be used to fabricate the device of Figure 1. There are many methods for producing quantum dots. For example, they can be produced by photolithographic techniques, electron lithography methods, etc. A preferable method is to use the Stranski-Krastanow growth mode. When a first layer is grown on top of a substrate which has a different lattice constant from the first layer, the first layer proceeds by island growth. In other words, 3D islands are formed over the top of the substrate, which when capped with a barrier material produce a plurality of quantum dots. In Figure 7a, a doped barrier layer 41 of AlGaAs is formed on a substrate or buffer layer 43. An undoped spacer layer is then formed on an upper surface of the doped barrier 41. This undoped spacer layer 45 and the doped barrier layer 41 together form a modulation doped barrier layer. A 2DEG layer 47 of GaAs is formed overlying the undoped spacer layer 45. An undoped AlGaAs layer 49 is formed overlying the GaAs 2DEG layer 47. A doped layer 51 is then epitaxially growth on an upper surface of the barrier layer 49. This layer is InAlAs which has a substantially different lattice constant from AlGaAs. Thus, a plurality of quantum dots are formed. The structure is then finished with a barrier layer of AlGaAs 5-3 3.
W -- A schematic band structure for Figure 7a is shown on the right of the diagram, carriers can tunnel from the 2DEG layer 51 through the tunnel barrier 49, to the 2DEG layer 47 and vice versa.
Figure 7b shows a similar structure to that of Figure 7a. For comparison, the layers are numbered as Figure 7a. Here, an AlAs (or AlGaAs) tunnel barrier layer 49 is present between the dot layer 51 and the 2DEG layer 47. The schematic band structure shows that the tunnel barrier 49 is higher in this case than the structure in Figure 7a. The AlGaAs tunnel barrier layer 49 has a different Al content to layer 49 in Figure 7a or layer 41 and 53 in Figure 7b.
Figure 7c shows a variation on the structure of 7a. The barrier layers 41, 49 and 53 and the space layer 45 are GaAs and the 2DEG layer 47 is InGaAs.The dot layer 51 is formed from either InAlAs or InAs.
Figure 7d shows a slight modification of the structure in Figure 7c. Here, the tunnel barrier 49 is either AlAs or AlGaAs. This provides a larger tunnel barrier 49 as can be seen by comparing the band structures of Figure 7c and 7d.
Figure 7e again shows a slight modification on the structure as shown in Figure 7c. Here, the doped barrier layer 41 and undoped spacer layer 45 are both AlGaAs. These layers have a larger band gap than GaAs. Therefore, it can be seen in the band structure of Figure 7e that the conduction bandedge is higher for these layers.
Figure 7f shows a further modification on the structure shown in Figure 7e. Here, the tunnel barrier 49 is also AlGaAs. The band structure shows a larger tunnel barrier 49 than that shown for the structure of Figure 7e.
Figure 8 shows a second embodiment of the present invention. Here, the field normal to the active layers is modulated by a front-gate and a backgate. Essentially, the structure is a field effect transistor. A p + back- gate 77 is formed on an upper surface of
16 a buffer layer or substrate 71. An undoped barrier layer 75 is formed overlying an upper surface of the back-gate 73. A modulation doped barrier layer 77 is formed overlying an upper surface of the undoped barrier layer 75. The modulation doped Z barrier layer has a doped barrier layer 79 and an undoped spacer layer 81. A quantum well layer is formed on the upper surface of the spacer layer 8 1. A tunnel barrier layer 85 is then formed on the upper surface of the quantum well layer 83. The dot layer 87 is then formed on an upper surface of the tunnel barrier layer 85. A capping layer 89 is then formed overlying the dot layer. Then an n+ front-gate 91 is formed on the upper surface of the capping layer 89.
Two ohmic contacts 93 and 95 which form a source and drain respectively are made to both the quantum well layer 83 and the dot layer 87. A backgate contact 97 is made to the back-gate 73 and a front-gate contact 99 is made to the front-gate 91. A bias can be applied between the front- gate 91 and the back-gate 73 so as to modulate the electric field normal to the quantum well layer 83 and the dot layer 87.
Figure 9 shows the band structure of the device of Figure 8. For simplicity, the layers in the band structure have retained the same reference numerals as for Figure 8. For the bias condition shown, the conduction band edge 101 of the quantum well layer 83 lies below that of the first excited state 103 of the quantum well layer 87 and the Fermi level of the system (Ef). Therefore, electrons in the quantum well form a 2DEG.
Decreasing the voltage on the front-gate 91 causes the potential separation 105 to decrease. This pulls down the conduction band edge and hence, under appropriate biasing conditions, the first excited energy level 103 of the quantum dot 87 can be pulled below the conduction band edge 101 of the quantum well level 83. Similarly, decreasing the backgate energy separation 107 can have a similar effect.
Increasing the back-gate energy separation (and/or decreasing the frontgate energy separation 105) causes the separation between the conduction band edge 10 1 of the 17 quantum well level and the first confined energy state 103 of the quantum dot layer to increase.
Looking at the valence band edge 109, the first confined valence band state 111 lies above the valence band level in the quantum well. Therefore, it is not enerp etically favourable for the hole trapped in the valence band state 111 to transfer to the quantum well layer.
The type of device shown in Figure 8 can operate as the optical memory structure described in Figures 1 to 7 or it can function as a high speed MODFET. The source and drain ohmic contacts are connected to both the first and second active layers. Carriers stored in the second active layer 85 contribute relatively little to the sourcedrain current. Therefore, the resistance of the device can be modulated by transferring carriers between the first 81 and second 85 active layers. This can be done by applying appropriate biases to the front and back-gates 73, 91.
In the optical memory device the tunnel barrier 83 needs to allow tunnelling from the second active layer 85 to the first active layer 81 as the device is illuminated. However, the barrier needs to be large enough to prevent tunnelling back from the first active layer 81 to the second active layer 85 during the charge storage operation. In the MODFET device, the switching speed is determined by the time it takes the carriers to tunnel between the first and second 81, 85 active layers. This can be improved if the layers are strongly coupled Therefore, although the device of Figure 8 can be used for both devices, in practice, a larger tunnel barrier will be used for the optical memory device.
Figure 10 shows some preliminary results from a device with the following layer structure. The layers are listed in order of growth with the growth temperature in brackets. The layers were formed by MBE:
18 500 nrn undoped GaAs (590'C) 250 nm undoped AlO.33GaO.67As (590'C) nrn doped (Si IXIO18 CM-3) AlO.33GaO.67As (490'C) nm undoped AlO.33GaO.67As (490'C) nm undoped AlO.33GaO.67As (590'C) nm undoped GaAs (590'C) nm undoped A10.33Gao.64s. (590'C) 2 nrn undoped GaAs (590'C) 1.7 monolayers undoped InAs (520'C) nm undoped AlO.33GaO.67As (520'C) nm undoped AlO.33GaO.6,7As (590-C) nm doped (Si IXIO18 CM-3) AlO.33GaO.67As (590'C) nm undoped GaAs (590'C) The substrate temperature is lowered during the growth of the InAs layer to facilitate the formation of quantum dots via the Stranskii-Krastanow growth mode. The substrate temperature must be 530'C or less so that the indium does not segregate above the growth surface. For this structure, 1. 7 monolayers of InAs were deposited. However, a higher dot density can be achieved by depositing slightly more InAs (e.g. 1.7 to 3 monolayers). Increasing the number of dots increases the storage capacity of the memory. It is important that the layer grown immediately after the quantum dots is also grown at a lower temperature (520'C) to prevent indiurn segregation destroying the dots. The applicant has found that the growth temperature can be raised again after 10 nm of growth. 2nm of GaAs is grown before the InAs layer to smooth the growth surface. The lower Si doped barrier layer and its overlayer were also grown at a lower substrate temperature to prevent the Si impurities segregating and thus being incorporated into subsequently grown layers.
19 The wafers were etched into mesas measuring about I mm x I mm using standard photolithographic techniques. NiGeAu Ohmic contacts to the electron gas were deposited and annealed. A semitransparent layer was evaporated over the central portion of the mesa to act as a Schottky front contact.
Figure 10, plots experimental data collected on this structure at a sample temperature of 100K. The sample was illuminated with a range of wavelengths to store information in a large number of dots simultaneously. The Figure plots the four terminal resistance (R) between two ohmic contacts as a function of the bias (Vg) applied between the Schottky gate and one of the ohmic contacts. The device is initially in its high resistance states with the gate maintained at OV (Vg = OV). This can be regarded as the It off' state. After illumination by a polychromatic red light, the resistance undergoes a dramatic decrease. The resistance does not change after further illumination. The low resistance state of the device (the "on" state) is long lived and the structure is therefore suitable as a non-volatile memory. The dramatic change in resistance is triggered by very low light levels, illustrating the alternative use of the device as a sensitive phototransistor.
The memory can be reset by setting the gate bias to forward bias for a few seconds so that a current flows through the gate of about I pA. Upon returning the gate bias to Vg= OV, the device is once again in the high resistance state. This is illustrated in Figure 10, which plots the change in resistance of the device (initially in the low resistance state) when the gate bias is swept from Vg=OV to +0.8V and then back to OV.
For the memory to have a long retention time, it is important that there is a large potential barrier to prevent the escape of stored carriers in the dots. The retention time can be increases by replacing the A10.33Gao. 67As layer below and above the dot layer by AlAs. The retention time can further be increased by growing a thicker barrier between the quantum well layers and the quantum dot layer. For example, the barrier could be about 50 nm thick.
In the above device, the barrier next to the dot is a remotely doped barrier layer. Thus, in this device, carriers of the same sign are confined in the dots as in the wells. In order to trap the opposite type of carrier in the dots, the dopants should be removed from the upper doped barrier layer.
Figure I I shows a heterojunction bipolar transistor structure. The simplified structure shown in Figure I I has a semi-insulating substrate or buffer 120 with an emitter layer 122 formed on its upper surface, A base 124 comprising a plurality of layers (which will be described with reference to Figure 12) formed on an upper surface of the emitter layer 122. A lightly doped p-type collector 126 and a heavily doped p+ collector 128 are formed on an upper surface of the base 124.
Two ohmic contacts 130 and 132 corresponding to a source and drain are provided to the base. A collector contact 134 is made to the P+ collector 128 and an emitter contact 136 is made to the emitter layer 122.
The structure of the device is shown in more detail in Figure 12. The collector layers 126 and 128 are p-type, the base layer 124 is n-type and the emitter layer is p-type. The base section 124 comprises an undoped section 138, an n+ barrier region 140, a quantum well layer 142 which is separated from a quantum dot layer 144 via a barrier layer 146. The field across the base can be modulated by appropriate biases across the emitter and collector. Thus, the relative separations of the conduction band edge 142 of the 2DEG and the first excited confined energy level of the quantum dot 144 can be modulated.
Figure 13 shows an optical modulator in accordance with a third embodiment of the present invention. The optical modulator has a guided region through this light can propagate through. The light can propagate parallel to the plane of the layers of the guided region 150. The guided region 150 is sandwiched between upper 152 and lower 154 cladding layers. The cladding layers 152, 154 serve to confine the transmitted light in the guided region 150.
21 The upper cladding layer 152 is provided with a ridge 156 to form a strip waveguide. This structures confines the transmitted light to the part of the guided region 150, under the ridge 156.
A front Schottky gate 158 Is provided on the upper surface of the ridge 156. A backgate 160 is provided on the lower surface of the lower cladding layer 154. An ohmic contact 162 is provided to the back-gate 160. A second ohmic contact 164 is provided to the guided region 150.
Figure l4shows the layers of the guided region 150. A first active layer 172 or quantum well layer is formed on an upper surface of a modulation doped barrier layer 166. The modulation doped barrier layer has a doped barrier layer 168 which is separated from the quantum well layer 172 by an undoped spacer layer 170.
The quantum well layer 172 is separated from a layer of quantum dots 176 by tunnel barrier layer 174. An upper barrier layer 178 is formed overlying the quantum dot layer 176.
The above structure can function as an optical modulator or as the memory device described previously with reference to figures I to 7. A beam Pi, is incident on the structure. Absorption of the beam by a quantum at the band-gap of the quantum dot is completely suppressed if the dot already has two carriers.
22

Claims (26)

CLAIMS:
1. A semiconductor device comprising first and second active layers separated by a first barrier layer, means for applying an electric field normal to the first and second active layers and detecting means for detecting a change in a characteristic of the first active layer, wherein the first active layer is a quantum well layer capable of supporting a two dimensional carrier gas and the second active layer comprises a plurality of C) quantum dots.
2. A semiconductor device according to claim 1, wherein the means for detecting a change in the characteristic of the first active layer comprises means for detecting a transport characteristic of the carriers in the first active layer.
3- A semiconductor device according to either of claims I or 2, wherein the 1.
separation between the first and second active layers is thin enough to allow coupling between the layers.
4. A semiconductor device according to any preceding claim, wherein the means for measuring the transport characteristic of the first active layer comprises at least two ohmic contacts provided to the first active layer.
5. A semiconductor device according to any preceding claim, wherein carriers are provided to the quantum well layer.
6. A semiconductor device according to claim 5, wherein the carriers are provided to the quantum well by means of a doped second barrier layer provided adjacent the quantum well layer.
7. A semiconductor device according to claim 6, wherein the second barrier layer 1.
is a modulation doped barrier layer comprises a doped layer and a spacer layer, the spacer layer being provided adjacent the quantum well layer.
23
8 A semiconductor device according to any of claims 5 to 7, wherein the carriers are electrons.
9 A semiconductor device according to any preceding claim, wherein the device further comprises a third barrier layer provided on an opposing side of the second active layer to the first active layer.
10. A semiconductor device according to claim 9, wherein the third barrier layer is a doped barrier layer.
11. A semiconductor device according to claim 10, wherein the barrier is n-doped.
12. A semiconductor device according to any preceding claim, wherein the means for applying a field normal to the active layers comprises a front gate provided overlying the second active layer.
13. A semiconductor device according to claim 12, wherein the front-gate is transparent to radiation of a predetermined frequency.
14. A semiconductor device according to any preceding claim, wherein the means for applying a field normal to the active layers further comprises a back-gate located underneath the first active layer.
15. A semiconductor device according to any of claims 1 to 11, wherein the means for applying a field normal to thefirst and second active layers comprises a p-type terminal on one side of the active layers and an n-type terminal located on the opposite side of the first and second active layer.
16. A semiconductor device according to any preceding claim, wherein the second active layer comprises quantum dots with a distribution of optical transition energies.
24
17. A semiconductor device according to any preceding claim, wherein the quantum dots are made from InAs.
18. A semiconductor device according to any preceding claim, wherein the first barrier layers is AlAs or AlGaAs.
19. A semiconductor device according to any preceding claim, wherein a beam of radiation is incident on an upper surface of the device.
20. A semiconductor device according to any preceding claim, wherein a beam of radiation is incident on the device parallel to the plane of the layers.
21. A semiconductor device according to any preceding claim, wherein the device further comprises upper and lower cladding layers, wherein the first active layer overlies the lower cladding layer and the upper cladding layer overlies the second active layer.
22. A semiconductor device according to any preceding claim, wherein the device further comprises guide means for confining light in a predetermined region of the first active layer.
23. A method of operating a semiconductor device according to any of claims I to C 18, the method comprising the steps of:
shining a beam of radiation incident parallel to the plane of the layers, and -D modulating the electric field across the first and second layers to modulate the absorption of the said beam.
24. A method of operating a device according to any of claims 4 to 18, the method comprising the steps ofmeasuring the resistivity of the first active layer via the ohmic contacts; and modulating the resistivity of the first active layer by transferring carriers between thefirst and second active layers by modulating the field across the active layers.
25. A method of operating a semiconductor device according to any of claims 1 to 18, the method comprising the steps of: applying a field across the active layers such that carriers of a predetermined polarity can tunnel from the second active layer to the first active layer, illuminating one or more of the plurality of quantum dots with a beam of radiation to excite at least one electron-hole pair such that at least one carrier can tunnel from the second active layer to the first active layer; and detecting a change in the transport characteristics in the first active layer.
26. A semiconductor device as substantially hereinbefore described with reference to any of the accompanying figures.
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