GB2325989A

GB2325989A - A power meter

Info

Publication number: GB2325989A
Application number: GB9711832A
Authority: GB
Inventors: Christopher Brian David Turl
Original assignee: Wiltron Measurements Ltd
Current assignee: Wiltron Measurements Ltd
Priority date: 1997-06-06
Filing date: 1997-06-06
Publication date: 1998-12-09
Anticipated expiration: 2017-06-06
Also published as: GB9711832D0; GB2325989B

Abstract

A power meter comprises means for receiving a sensor signal 16 which has an amplitude which is a function of the power level of the signal to be monitored and means 49 for graphically displaying the amplitude of the said sensor signal. The signal to be monitored may be a microwave or radio frequency signal with a modulated carrier which may be Time Domain Multiple Access (TDMA). The signal to be monitored may be monitored at one or more predetermined sampling points which may be varied from one cycle to another. The sensor system may include a diode 12, a smoothing circuit 13 and a plurality of separate amplifiers and switch means 31 to select an appropriate output signal for processing. The display 49 may be a numeric display with cursor control provided on a liquid crystal display. A digital signal processor 37 may be used to process the signal.

Description

The present invention relates to a power meter, such as a portable battery operated power meter which can be used in the field to test the power spectrum of an RF transmitter, such as a cellular phone transmitter.

Power meters to measure the power of an RF transmitter are known. So far as is known, all of the power meters require mains power for operation and none are battery operated. This severely limits their operation in the field. For example when it is desired to test the power spectrum of an RF transmitter for a cellular phone network. it is useful for the operator to be able to travel to the transmitter and to use local battery power in testing operation of the transmitter.

The power output of a cellular phone transmitter normally comprises a cyclic signal in which the signal is divided, in respect of time, into a plurality of time slots (typically. eight in number) and at any one time. the various time slots may be operating at considerably different power levels. For example if one time slot is communicating with a mobile phone which is close to the transmitter then it may be operating at a low power level, and if the adjacent time slot is communicating with a mobile phone at a great distance then the power level may be higher. The relative power levels of two adjacent time slots may be as high, for example, as 10,000:1.

Present power meters are of two types. There is the more economical type (costing up to, say, S5000) which provides a simple numeric measure of the power output of the transmitter. This can be presented in various ways - e.g. the average power over a long period of time (averaging, modulated average); an instantaneous reading at point in time (a peak power measurement); the average of the power between points in time (e.g. power in a BURST of power). It is not possible to see the varying power levels across a cyclic signal with respect to time. More advanced and more expensive power meters (costing, say, $10,000 upwards) can provide an indication of the general spectrum of the transmitter but even these tend to be inaccurate particularly where there are considerable step changes in the amplitude of the power level across the spectrum (eg between time slots).

According to a first aspect, the invention comprises a system comprising a power meter for measuring power levels in a first cyclic signal (which may be a microwave/radio frequency signal which has a modulated carrier and may be Time Domain Multiple Access, TDMA), said power meter comprising: means for receiving from a sensor (which may include a diode and a smoothing/amplification circuit) a second cyclic signal in which, for equivalent points, the amplitude is a function of the power level in said first cyclic signal: means for selecting at least one predetermined sampling point in the second cyclic signal: means for measuring the amplitude of the second cyclic signal at said predetermined sampling point(s), and means for graphically displaying the measured amplitude(s) of said second cyclic signal at said predetermined sampling point(s), said amplitude(s) being a function of the power level in said first cyclic signal at point(s) corresponding to said at least one predetermined sampling point.

Preferably there are provided more than one predetermined sampling point per cycle and means is provided to move the predetermined sampling points in successive cycles whereby a partial or complete set of measured amplitudes for the second cyclic signal may be graphically displayed. The means for graphically displaying the signal may comprise a CPU (central processing unit) and a display means which may be an LCD (liquid crystal display).

In a preferred arrangement, we use a DSP (digital signal processor) to control the system and an LCD which reduces the power consumption required and thereby allows battery operation which enhances portability and convenience of the system.

Means may also be provided to provide a numeric display of a selected part of the graphically displayed signal and the selection may be made by moving a cursor to the relevant point of the graphically displayed signal.

This therefore allows simple and accurate operation. Using the graphically displayed signal allows one to easily identify the signal form in the field and the use of the cursor then allows one to select a particular part of the spectrum of the signal and use the numeric display to provide a numerically accurate value (typically to t 1 %) for the signal at that point.

Means may also be provided to provide two cursors on the graphical display, the two cursors being moveable so as to select an area of the graphical display, the numerical value of the average of the signal between them may be measured and displayed on the numeric display. This allows further analysis of the signal.

The means for receiving may include a plurality of separate amplifying means each arranged to simultaneously receive the signal from the sensor and to simultaneously provide a respective output signal amplified by a respective amplification, and means, which may comprise a DSP and a switch, to choose the appropriate output signal to provide a modified second signal. Typically, several different amplifying means may be used in building up a graph of a signal, particularly when the signal amplitude varies logarithmically over a range of typically 40-50db.

This enables accurate reproduction of a signal waveform which varies considerably over a single cycle and in particular allows accurate measurement of the value of the signal adjacent a step change of value.

Means, such as a DSP, may be provided to predict the change of amplification which is needed. Thus, in a case where the predetermined sampling point is slightly displaced in successive cycles, the DSP will be able to predict the particular range of amplification required for the relevant sampling point in advance by knowledge of the "shape" of the signal based on previous cycles and will be able to select the relevant amplifying means in advance. The DSP may be keep track of which amplifying means may be needed based on previous experience of each particular time/sample in a signal. This reduces glitches due to changing ranges after the event and waiting for amplifiers to settle.

The sensor may also include a signal chopper and variable gain means which may be selectively activated under the control of means such as a DSP. A DSP may control a switch to chop the sensor signal and may synchronise signal sampling with signal chopping to avoid inaccuracy/glitches caused by sampling at chopping points.

The means for selecting may comprise a DSP, which controls an ADC (analog to digital convertor) and a comparator.

The means for selecting comprises means for determining a known (eg, start) point in each cycle, and timing means, such as a DSP, for providing a trigger signal at a predetermined sampling time after said known point to provide said predetermined sampling point.

Means may be provided such as a DSP to change the predetermined time with respect to the known point to move said sampling point.

In the above paragraphs, the various DSPs referred to are preferably the same DSP.

The use of DSP allows a display that is accurate, without the expense and power consumption of complex timing generator hardware. and very fast ADCs.

According to a second aspect, the invention comprises a system comprising a power meter for measuring power levels in a first cyclic signal (which may be a microwave/radio frequency signal which has a modulated carrier and may be TDMA), said power meter comprising: means for receiving from a sensor a second cyclic signal in which, for equivalent points, the amplitude is a function of the power level in said first cyclic signal; said means for receiving including a plurality of separate amplifying means each arranged to simultaneously receive the signal from the sensor and to simultaneously provide a respective output signal amplified by a respective amplification, means to choose an appropriate output signal for processing, means for graphically displaying said second cyclic signal the amplitude of said displayed second cyclic signal being a function of the power levels in said first cyclic signal.

According to a third aspect, the invention comprises a system comprising a power meter for measuring power levels in a first cyclic signal (which may be a microwave/radio frequency signal which has a modulated carrier and may be TDMA), said power meter comprising: means for receiving from a sensor a second cyclic signal in which, for equivalent points, the amplitude is a function of the power level in said first cyclic signal; a digital signal processor for processing said second cyclic signal: and, means for graphically displaying said second cyclic signal, the amplitude of the displayed signal being a function of the power levels in said first cyclic signal.

We will describe a preferred arrangement in which we provide a relatively economical power meter which will provide all, or substantially all of the features of the more expensive power meters and which is also more accurate, quicker and easier to use, as well as being portable and battery powered.

A power meter comprising a preferred embodiment of the invention will now be described by way of example and with reference to the accompany drawings in which: - Figure 1 is a (simplified) graph of a graphical display of the power levels in a cyclic signal, such as might be displayed by apparatus of the invention (logarithm power v time), Figure 2 is a schematic diagram showing the components of the power meter according to the preferred embodiment to the invention.

The power meter comprising the preferred embodiment of the present invention is intended to measure the power output of a cellular telephone transmitter. As explained above, a cellular telephone transmitter transmits a cyclic signal in which each cycle is divided into successive time slots (typically eight, A-H), the same time slot in successive cycles providing a channel for communication with a single cellular telephone. The information is carried by modulating the RF signal but at the same time the overall power or amplitude of the microwave or radio frequency signal is modulated so as to vary the power output in that particular time slot depending upon the power requirements for communication with the relevant cellular telephone. Thus if the telephone is close to the transmittr the power output can be minimized but if the telephone is at a distance from the transmitter the power output would be greater.

The effect of this is that the power output of the transmitter will change discontinuously between successive time slots in each cycle (over. for example, several orders of magnitude). It is desirable to measure the power output of the transmitter, both the overall power output, the power output in each time slot, and also to be able to measure the relationship between a control signal for that particular time slot, and the power output of the time slot. (in other words, to calibrate the transmitter in respect of a relevant time slot).

In a preferred arrangement the power meter is taken to the site of the transmitter and is connected to the transmitter and it is desirable then to use the power meter to analyse the output signal (first cyclic signal) of the transmitter.

As is well known, the power output from the transmitter (which comprises a first cyclic signal) is passed to the input 11 of a sensor 10, see Figure 2, the sensor including a diode 12 which thereby produces an output signal which is the positive (or negative) part of the envelope of the transmitter signal and also includes smoothing means 13 so that the RF frequency is effectively removed leaving a signal in which the signal value relates to the outline of the envelope of one half of the first cyclic signal from the transmitter.

In order to analyse operation of the transmitter, it is useful to be able to measure accurately the power levels in the time slots, A-H individually. as well as their combined power levels and also to measure the individual power levels as a variable test signal is applied to the transmitter so as to calibrate the transmitter.

A power meter for carrying out this analysis will now be described with reference to Figure 2 which shows a schematic of the power meter.

Referring to Figure 2 there is disclosed the sensor 10 already referred to above, which receives the first cyclic signal from the transmitter and produces a second cyclic signal at the output 16. The output 16 is connected via an optional amplifier 17 to the input 18 of the power meter. Input 18 is connected to an amplifier 19. the output of which is connected to the inputs of each of five amplifier systems 20 - 24 arranged in parallel. One or more of these amplifiers may be preceded by a low-pass filter to reduce noise and increase measurement accuracy. The amplifier systems 20 to 24 have respective outputs 26 to 30 (outputs 26, 27 being DC outputs, and outputs 28-30 AC outputs). Each amplifier system amplifies the input signal to a respective range of values (purely as an example, we have chosen 102, 103, 104, 105, 106).

In practice, however, the ranges may not be so simple. Thus amplifier system 20 amplifies to a Range '1' which has a gain of approximately 5 and allows one to read signals in the range +20 dBm to approximately -8dBm, (however this is after correction of the sensor's linearity/response). For a linear signal, we cover approximately +7dBm to -lOdBm - we cover a dynamic range of approximately 15dB in each amplifier system before running out of resolution on the ADC.

Range '2' (amplifier system 31) has a gain of approximately 60. Ranges '3' & '4' (amplifier systems 22, 23) have similar gains to '1' '2' but operate in the AC mode of operation and rely on a gain of approximately 310 (25dB) being switched in the sensor itself. This allows some overlap. Range '5' has a further gain of 15dB to reach down to the bottom of the dynamic range. It is heavily filtered to approximately 36Hz.

In use all of the amplifier systems are powered and so at all times there is a series of output signals on the five outputs 26 to 30 which provide five ranges of values of output signal. However. as the sensor may operate in either AC (chopped) or DC (not chopped) modes, only Ranges 1 and 2 or 3, 4, and 5, are simultaneously available.

A switch 31 (which of course may be an electronically controlled switch and may in fact comprise five separate switches controlled digitally) selectively connects one of the outputs 26 to 30 to a node 32. Node 32 is connected to the inputs of a comparator 33 and an analogue-to-digital convertor, ADC 34. A digital output signal from the ADC 34 is passed to an input 36 of a digital signal processor (DSP) 37.

The DSP 37 has an output 45 which controls the switch 31.

The comparator 33 also includes an input 38 for receiving a timing signal from the DSP 37 and provides an output signal at output 39 to input 41 of the DSP 37, which output 39 carries a trigger signal.

Also switchably connected to input 41 of DSP is an external trigger input from a TTL trigger input terminal 42, to allow a signal from an external device to identify a point in the second cyclic signal. The TTL input allows synchronisation to an EXTERNAL pulse and starts data acquisition. It is often used in the PROFILE mode (displaying a past-time profile), but can be used in the ordinary power meter mode to measure for example, pulse tops.

An output 43 of DSP is connected to each of the amplifier systems 20 to 25 to allow nulling of the amplification systems. The DSP also provides a self-calibration function for the power meter by injection of a traceable reference voltage into the amplifier systems which aligns the overlap in measurements taken on adjacent ranges (ie no range-change error).

An output 44 of the DSP is connected to the sensor 10.

An bi-direction connection 46 of the DSP is provided to a CPU 47 to allow the DSP to pass sample signals thereto and receive data and instructions therefrom. The CPU 47 is connected to a key pad 48 for input. a liquid crystal display LCD 49 and it further includes connections: to an auxiliary voltage input 51 which allows a simple external voltage to be displayed to allow one to apply a voltage to tune the amplifier under test. Also, it is possible to apply a voltage which is proportional to frequency (e.g. from a RF source), and this voltage is used to give the power meter frequency information. This, in turn, can be used to apply the frequency sensitive part of the linearity correction; a general purpose instrument bus (GPIB); interface 52 for remote control of output from the meter: a signal output 53 including two channels A and B, which allow users to perform ratio measurements - e.g. change in power before and after RF/microwave amplifiers etc.

They may be sampled simultaneously and may be displayed A-B, B/A etc and; a printer output 54.

The terminal 53 can provide an output signal, the voltage of which is proportional to the displayed reading, or a real-time output from the actual amplifiers or a logic level for PASS/FAIL testing. The CPU is also connected to a memory 56. The system is powered by an intelligent battery 57 which, in addition to power, gives an indication of the power remaining which may be displayed on the LCD 49. A 50 MHz reference oscillator 58 of 0 dBm power output is provided for calibration.

The sensor may include an EEPROM 59 which includes information regarding the sensor and its calibration, for example, a calibration data matrix. This includes a function of frequency/power level/temperature and may be passed to the power meter to enable corrections to be made (the sensor then incorporates a thermistor (not shown) which may be read by ADC 34 to determine the sensor's temperature).

The apparatus of Figure 2 operates as follows. Initially the sensor 10 is connected to the meter.

Once the relevant calibration signal has been passed to the DSP 37 from the EEPROM 59 of the sensor 10, the RF/microwave signal from the transmitter, is passed from the input 11. through the diode 12 which "removes" either the positive or negative of the part of the input signal, and through the smoothing means 13 which removes the RF/microwave frequency, leaving a second cyclic signal which, in the case of a TDMA signal, comprises a cyclic signal having a series of time slots, the amplitude of the signal in each time slot being an indication of the power level in the relevant time slot.

This second cyclic signal is passed via an optional amplifier 17 to the input 18 of the power meter, where it may be amplified by amplifier 19 and is then applied to the inputs of each of the amplifier means 20 to 25.

Thus at all times, all of the amplifier means 20 to 25 process the second cyclic signal to produce output signals on their relevant outputs 26 to 30. Thus by switching between different outputs, the amplitude of the signal may be amplified by, say, 106 if the signal amplitude is very low through to 102 if the signal level is relatively high.

As mentioned above, the DSP 37 will select whichever output 26 to 30 is appropriate to apply to the ADC 34. The ADC 34 samples the amplitude of the relevant signal applied thereto when it receives a TAKE SAMPLE signal from output 35 of DSP.

The timing of the TAKE SAMPLE signal on output 35 is arranged as follows. The comparator 33 detects a particular time (for example. the start of each cycle) in each cycle of the second cyclic signal. This may be done by, for example, detecting when the signal amplitude is zero at the origin of each cycle. The comparator allows the synchronisation start-point to be determined by a real-time signal present at the sensor 10 itself. This is useful as there may not be a suitable sync signal present as a 1TL level in all situations. By programming the DAC driving the comparator, a trigger signal can be generated at various power levels as the user sees fit.

When the comparator detects such a time, it passes a signal along the line to the input 41 of the DSP, and the DSP 37 then accurately times from that point to the desired sampling point and passes the TAKE SAMPLE signal to its output 35 at the relevant time. This causes the ADC 34 to sample the amplitude of the signal at input 32 at that point in time and provide a digital signal relating to the value of the amplitude to the input 36 of the DSP. The trigger signal from the comparator interrupts the DSP and an interrupt service routine then calculates the offset time to the desired sampling point in terms of instruction/clock cycles.

The DSP is used in an unusual way to provide precise timing control over data acquisition from a repetitive cyclic signal which is fast and allows the basic conversion rate to be profiled. This is achieved by precise control of software timing to the order of a single clock cycle. In particular, the DSP can provide known and accurate execution time for instructions, for example, certain instructions having a fixed single DSP clock cycle per instruction4. can provide timing accurate to 30ns.

Without precision to this order, a displayed waveform using traditional CPU techniques to control the timing would not be sufficiently accurate.

Software running on the DSP is used to provide an accurate variable time delay as follows. The time delay is divided into a fixed minimum 'overhead' time delay and a variable additional time delay to achieve the desired total delay. The 'overhead' time delay arises because a certain number of DSP instructions are required to calculate and implement the variable time delay. Other fixed (or even variable) overheads such as that needed to set up for reading and to read the ADC can also be taken into account. The variable time delay is achieved by executing a known number of instructions each of a known fixed number of clock cycles (ie each of a known and constant execution time).

Delays are provided by including instructions within a loop and/or subroutine (e.g.

by using a loop in conjunction with a loop counter incremented or decremented on each pass around the loop, the loop procedure terminating conditionally according to the counter value).

In essence, the TAKE SAMPLE signal may be provided several times per cycle and Figure 1 illustrates this. In Figure 1, there are provided sampling points S11, S12, S13 in a first cycle which are spaced at approximately one third cycle each. The DSP 37 controls these sampling points and shifts them with respect to time in successive cycles by a time dT so that in the second cycle the sampling points are S21, S22, S23.

In the next cycle, the sampling points have further shifted by dT to the positions S31, 532 S33. The number of sampling points in each cycle and the extent to which they are shifted between cycles is a matter of judgement, depending, in part, upon the available hardware (e.g. ADC conversion time and LCD resolution). For example, with an ADC conversion time of 30s (microseconds) and a 200 pixel display width, a 6ms time-slice can be displayed without using this technique. If a 3ms slice is required, however, two passes will be needed; for a lms slice, 6 passes and so on.

A minimum of 6ms will always be needed for 200 conversions. It will be appreciated that with shorter time windows accurate sample timing is important.

It will be understood that by this process, over a succession of cycles, the power profile of the complete cycle will be built up with a degree of fineness which is determined by dT.

The digital sampled signals are passed by the DSP 37 from output 46 to the CPU 47 which builds them up to provide a trace which is then passed to the LCD 49 to produce the graphical output signal shown in Figure l.

It will be understood that as the sampling points move across the cyclic signal, the amplitudes of successive sampling points will vary considerably, in Figure 1, over a relative range of 1: 106. Clearly for the graphical signal to be readable. it is necessary to use a logarithmic scale, and consequently the DSP 37 will control the switch 31 so that at particular sampling points. the relevant range amplifier means 20 to 25 is chosen. It will be understood that as all amplifier means are continuously operating on the input signal and continuously providing an output signal it is not necessary for them to "settle" as they are operational at all times and so, as shown in the example of Figure 2. successive sampling points may have values which vary by a factor of 1,000 or more and remain accurate. In fact, the DSP includes means whereby, from historical data, it is able to predict the amplifier means to be chosen for each successive sampling point. This means that because the wrong amplifier range is only going to be chosen for a single sampling point and corrected on subsequent "passes", by choosing a sufficiently fine time difference dT for a particular sampling point between successive cycles one can obtain a very accurate signal graph even where there are vast differences between successive time slots. It will be understood that although the signal presented at the input of ADC 34 is effectively "normalised" by the choice of range amplifier, the DSP/CPU is able to calculate the absolute signal level using knowledge of which range amplifier has been selected for which signal sample.

In this way, we have provided an economical power meter which will provide the power profile of the input signal.

Referring to Figure 1, it will be seen that there is provided on the display a cursor 66 and a double cursor of 67, 68 although these latter two can be combined. In use, the user can select a particular point across the displayed cyclic signal by means of the single cursor 66 and the display LCD. which also includes a numeric display, will provide, from the memory 56, a numeric output of the power at the selected point.

This is particularly useful as it enables the operator to view the power spectrum and to select a particular point for more detailed analysis. Furthermore, by use of the two cursors 67, 68, the user can select a particular part of the cyclic signal and measure the average power over that part, the average power being displayed as a numeric signal.

The cursors 66 or 67, 68 are controlled by means of the keypad 48.

We have therefore described a power meter which. unlike normal more economical power meters which provide only a digital read out of the power, presents a graphical display of the power. Furthermore, the meter will provide numeric measurements of the power, for example the average power over a long period of time, or an instantaneous reading at a particular point in time with respect to the cycle (for example a peak power measurement), or the average of the power between two points in time (for example, the power in a BURST of power). The use of the graphical display with the cursor allows one to pinpoint any particular part of the cyclic signal for detailed analysis.

All channels in a TDMA signal can be viewed allowing the user to calibrate such a system much faster than hitherto.

The present meter, may operate with wide dynamic range sensors (eg over a range up to 90dB or more) and may also interface with "intelligent sensors' which will allow the identity of the sensor to be displayed on the graphical display.

As already described, all of the front-end signal processing is performed by a digital signal processor and this allows high speed measurements and the graphical profiling of the pulse on the graphical display. It provides for accurate measurement of the power of the pulse at a predetermined point without the expense of complex timing generating hardware and very fast ADCs. The use of the DSP enables the power meter to be both effective and economical.

Software running on the DSP is used in an unusual way to provide precise timing control over data acquisition of a repetitive cyclic signal which is much faster and allows the basic conversion rate to be profiled. This is achieved by precise control of software timing to the order of a single clock cycle. In particular, the DSP can provide known and accurate execution time for instructions, for example. for certain instructions a fixed signal DSP clock cycle per instructions can provide timing accurate to 30ns. Without precision to this order. a displayed waveform using traditional CPU techniques to control the timing would generally not be as accurate.

The meter may CHART the data. A POWER VERSUS TIME mode will provide a real-time display of all readings over a (programmable) period of time. Like a heartrate monitor it provides a moving trace plotting a pre-determined number of the most recent signal samples.

The use of PARALLEL ranges, and very wide ranges at that, reduces the effect of range changing delays. It is not intuitively obvious why this is important, but if one considers

The meter also "looks-ahead" to achieve the range-changing which is needed. This actually allows it to change range before it needs to based on the profile of the signal being measured. This relies on repetitive signals being present. This achieves a wide dynamic range (+20 to approx - 45dB).

With regard to triggering, the apparatus can sample one point (peak mode) after a selected time delay using a programmable delay/"gate" system or a sample can be taken as an average between any two points in the time-domain after a trigger event.

This can allow simultaneous display of PEAK power in a signal or power at any one GATE specified by the user, and also the modulated average. It would also be possible to set it to display one gate on one display channel. and another gate on the other channel.

We also provide separate channels for the two sensors A and B - this allows display of ratios in the time-domain - it would not be possible to profile the difference between two signals if the design was one of multiplexed or switched hardware.

The signal from the sensor 10 reaches the ADC via a DC or AC analogue signal path, depending upon the signal level. Low level signals are 'chopped' to give them an AC frequency component to allow low frequency noise to be filtered out. DC signals as used in this system have their bandwidth wide open around 100kHz or more. This allows the profiling to be accurate. However, as power levels drop (say, below -25 or -30dBm) the residual DC and low frequency components of noise take over in the time-span needed to fully average a signal, e.g. at -40dBm, say, 500mS may be needed to determine a reading to 0.01dB resolution. However, in time, DC drifts due to the amplifiers may contribute more than this 0.01dB hence filtering needs to be introduced to remove the DC component. To achieve this the signal is 'CHOPPED' as early as possible - after the sensing element - to produce an AC signal proportional to the DC signal. This may then be amplified by AC amplifiers which can remove the DC and low frequency component of the noise. However, in this situation, we have lost the high speed response of the system overall. Hence, the PROFILing mode. or GRAPH mode, only works in the DC mode and thus with restricted dynamic range and resolution. The PROFILE mode has a low end of around 45dBm as opposed to approx. -70dBm when using the AC ranges.

The 'AC' bandwidth is around l9kHz, but with effective cut-off of signals below 240Hz due to the way the signal is reconstituted. The DC bandwidth is around l00kHz or more.

In all cases. the bandwidth is high so that repetitive samples on the (slow) ADC can reconstitute a true power average after correction of linearity of the sensor. If the bandwidth was to limit the signal in hardware, then the ADC/DSP has no access to the real response of the sensor and cannot therefore correct the output before applying averaging. For example: Suppose the sensor is known to produce 4 volts for 10mW input, 3 Volts for a 5mW input, and 3.5 Volts for 6mW (non linear). The correction available would allow one to read samples at 3V and 4V, look up the correction to determine that the samples were 5 and 10mW or an average of 7.5mW. However, if the amplifier bandwidth averages the sensor output voltage samples one would get an average voltage of 3.5 which would result in 6mW reading. It is useful to able to apply correction to the true output response of the sensor.

As well as use of a DSP and LCD display a number of other power-reduction techniques have been employed to provide a useful length of battery operation (6 - 7 hours). These include running the analogue components off a low voltage supply (t 5V) and switching off circuit sections, such as the GPIB, when not in use. The LCD back-light automatically switches off after a predetermined interval and the unit has a "sleep" mode entered after a predetermined interval without a user keypress.

The use of a DSP is important as a DSP operation is predictable in time (a CPU is typically not predictable as instructions operate "as fast as they can" depending on a large number of variables.

The invention is not restricted to the details of the foregoing example.

Claims

1. A system comprising a power meter for measuring power levels in a first cyclic signal, said power meter comprising: means for receiving from a sensor a second cyclic signal in which, for equivalent points, the amplitude is a function of the power level in said first cyclic signal: means for selecting at least one predetermined sampling point in the second cyclic signal: means for measuring the amplitude of the second cyclic signal at said predetermined sampling point(s), and means for graphically displaying the measured amplitude(s) of said second cyclic signal at said predetermined sampling point(s), said amplitude(s) being a function of the power level in said first cyclic signal at point(s) corresponding to said at least one predetermined sampling point.

2. The system as claimed in claim 1 in which the first cyclic signal is a microwave/radio frequency signal which has a modulated carrier.

3. The system as claimed in claim 1 or 2 in which the sensor includes a diode and a smoothing circuit.

4. The system as claimed in any of claims 1 to 3 in which there are provided more than one predetermined sampling point per cycle.

5. The system as claimed in claim 4 in which means is provided to move the predetermined sampling points in successive cycles whereby a set of measured amplitudes for the second cyclic signal may be graphically displayed.

6. The system as claimed in any of claims 1 to 5 in which the means for graphically displaying the signal comprises an LCD (liquid crystal display).

7. The system as claimed in any of claims 1 to 6 in which a DSP (digital signal processor) controls the system.

8. The system as claimed in any of claims l to 7 in which means is provided to provide a numeric display of the value of a selected part of the graphically displayed signal.

9. A system as claimed in claim 8 in which the selection is made by moving a cursor to the relevant point of the graphically displayed signal.

10. A system as claimed in claim 8 or 9 in which means is provided to provide two cursors on the graphical display, the two cursors being moveable so as to select an area of the graphical display, the numerical value of which may then be displayed on the numeric display.

11. A system as claimed in any of claims 1 to 10 in which said means for receiving includes a plurality of separate amplifying means each arranged to simultaneously receive the signal from the sensor and to simultaneously provide a respective output signal amplified by a respective amplification and means to choose an appropriate output signal for processing.

12. A system as claimed in claim 11 in which said means to choose the appropriate output signal comprises a DSP and a switch.

13. A system as claimed in any of claims 1 to 12 in which means, is provided to predict the change of amplification which is needed.

14. A system as claimed in Claim 13 in which said prediction means comprises a DSP.

15. The system as claimed in any of claims 1 to 14 in which said sensor includes a signal chopper and variable gain means which may be selectively activated under the control of a DSP.

16. The system as claimed in claim 15 in which said means for selecting comprises a DSP, which controls an ADC (analog to digital convertor) and a comparator.

i7. The system as claimed in claim 15 in which said means for selecting comprises means for determining a known point in each cycle, and timing means for providing a trigger signal at a predetermined sampling time after said known point to provide said predetermined sampling point.

18. The system as claimed in claim 17 in which means is provided to change the predetermined time with respect to the known point to move said sampling point.

19. A system comprising a power meter for measuring power levels in a first cyclic signal said power meter comprising: means for receiving from a sensor a second cyclic signal in which, for equivalent points, the amplitude is a function of the power level in said first cyclic signal; said means for receiving including a plurality of separate amplifying means each arranged to simultaneously receive the signal from the sensor and to simultaneously provide a respective output signal amplified by a respective amplification, means to choose an appropriate output signal for processing, and means for graphically displaying said second cyclic signal, the amplitude of said displayed second cyclic signal being a function of the power levels in said first cyclic signal.

20. A system comprising a power meter for measuring power levels in a first cyclic signal said power meter comprising: means for receiving from a sensor a second cyclic signal in which, for equivalent points, the amplitude is a function of the power level in said first cyclic signal; a digital signal processor for processing said second cyclic signal; and, means for graphically displaying said second cyclic signal. the amplitude of the displayed signal being a function of the power levels in said first cyclic signal.