RU2198410C2 - Multichannel device measuring root-mean-square value of voltage - Google Patents

Abstract

FIELD: measurement technology. SUBSTANCE: proposed multichannel device measuring root-mean-square value of voltage has eight n=8 input buses 1-8, eight voltage repeaters 9-16, low-pass filters 17, 23, amplifier 18,24 with controllable gain factor with control inputs 19, 25, detectors 20, 26, 53 of root-mean-square values, inputs 21, 27, 49, 65 of information register 22, analog multiplexer 28, two counters 29, 30, two differential comparators 31, 32, resistive divider 33 built on resistors 34, 35, analog keys 36, 37, 38, AND gate 39, two OR gates 40, 41, generators 42 of stable periodic pulses, former 43 of short pulses, digital-to-analog converter 44, reference voltage bus 45, capacitors 46, 47, detectors 20, 26 of low-pass filters, bus 48 of device reset to zero, active integrator 52, analog keys 56, 57, 58, 2 x 2 AND-OR 59, gate NOT 60, resistors 61, 62, 63, capacitor 64. EFFECT: enhanced informativity. 1 cl, 6 dwg

Description

 The invention relates to measuring technique and can be used to measure the levels of the prevailing frequencies of vibration, noise, pressure pulsation, in the spectral analysis of signals.

 A device for measuring noise (AS USSR 623160 from 09.11.76, MKI: G 01 K 19/00, author Kononov VA, publ. 09/09/78, BI 33) containing an input bus connected through the first a controlled amplifier made with a control input, a filter unit and a second controlled amplifier made with a control input with a rms detector, the output of which is connected to an indication unit connected to the range switching units, a frequency response specifying unit connected to the output of the rms detector to the inputs of band switching units connected respectively to the control inputs of the first and second controlled amplifiers.

The device has several disadvantages:
a) low information content, because the device is single-channel. Parallel connection of devices for increasing information is excluded due to unacceptable growth in overall dimensions, weight, number of outputs to the display unit. For example, eight-input buses correspond to 24 outputs per display unit;
b) the device does not measure the prevailing, fundamental frequency in the AC circuit, that is, its information content is reduced, because only the rms value of the signal (process) from the input bus is measured;
c) the device has insufficient accuracy and information content due to the lack of a built-in calibration system.

 A device for measuring the fundamental frequency in alternating current circuits (AS USSR 566194, MKI: G 01 R 23/00 from 01/26/07, authors Masandilov L. B., Rozhankovsky Yu.V., published on 07.25.77, BI 27, which contains a series-connected current sensor and a two-channel amplifier-converter, a series-connected division block and a square root extraction block, two low-pass filters, the outputs of which are connected to the inputs of the division block.The amplifier-converter consists of two quadrators connected by inputs through an integrator, and the outputs of the quadrants in Keys to the inputs of low pass filters.

The disadvantages of the known device are:
a) a large error due to the standard integrator, which does not attenuate the influence of modulating low frequencies lying below the unit gain frequency of the integrator. This reduces the information content of the device as a whole;
b) limiting the input range due to the use of quadrators. For example, an input voltage of 10 ÷ 100 mV corresponds to 100 ÷ 10,000 mV at the output of the quadrator (large voltages are unacceptable). The limitation of the range is clearly associated with reduced information content, which also contributes to the absence of controlled amplifiers, the lack of switching of measurement ranges;
c) reduced information content, as the device is single-channel. One input corresponds to one output per indicator;
d) information content is reduced, because the rms value of the signal (process) is not measured;
e) insufficient accuracy due to the lack of a built-in calibrator of amplitude and frequency.

 Closest to the invention in terms of essential features is a multichannel device for measuring the rms voltage value (AS USSR 1623.435, MKI G 01 R 19/04 of 12.28.88, authors Ametov AD, Korotkikh BP, Gutnikov A.I., published on 02.20.95, BI 5, p. 247), containing n input buses, each of which is connected to the input of the corresponding voltage follower. The output of the first voltage follower through a series-connected first amplifier with an adjustable gain is connected to the input of the first RMS detector made with a low-pass filter. The output of this detector is connected to the first input of the information logger. The device also contains a second filter, the output of which through a second amplifier with an adjustable gain is connected to the input of the second RMS detector made with a low-pass filter. The output of this detector is connected to the second input of the information recorder, the voltage reference bus. The device is equipped with an analog multiplexer, two counters, two differential voltage comparators, a resistive divider, three analog switches, an AND element, two OR elements, a periodic pulse generator, a pulse shaper and a digital-to-analog converter. The extreme terminals of the resistive divider are connected between the reference voltage bus and the output of the second analog switch, and the middle terminal is connected to the inverting inputs of the first and second differential voltage comparators, the non-inverting inputs of which are connected respectively to the outputs of the first and second rms value detectors. The first and third analog keys are connected in parallel with the low-pass filters of the first and second rms value detectors, respectively. The input of the second analog key is connected to the common bus, and the control input is connected to the output of the And element and the counting input of the first counter, the inverse output of the last bit of which is connected to the first input of the And element, the second input of which is connected to the output of the first OR element, the control input of the first analog key and through the second element or to the control input of the third analog key. The first and second inputs of the first OR element are connected to the outputs of the first and second differential voltage comparators, the direct outputs of the discharges of the first counter are connected to the control inputs of the first and second amplifiers with an adjustable gain. The second input of the second OR element is connected to the output of the pulse shaper, the input of which is connected to the output of the periodic pulse generator. The control inputs of the analog multiplexer are connected to the outputs of the same name bits of the second counter, the counting input of which is connected to the output of the periodic pulse generator, the installation R-input is combined with the R-input of the first counter and connected to the reset bus to zero of the device. The output of the analog multiplexer is connected to the input of the second filter, the first information input of the analog multiplexer is connected to the output of the second voltage follower, the second information input to the output of the first voltage follower, the third and subsequent information inputs to the outputs of the same voltage followers. The direct outputs of the bits of the first counter and the direct output of the highest level of the second counter are connected to the corresponding digital inputs of the digital-to-analog converter, the analog input of which is connected to the third input of the information recorder.

The disadvantages of the known device is the reduced information content due to:
a) a frequency response without a 6dB / oct slope, without an additional channel for measuring the rms voltage value, which makes it possible to isolate the prevailing, fundamental process frequency by a device in a wide range with an integrated calibrator;
b) insufficient accuracy and the width of the measurement range due to the lack of built-in calibration for previously known frequencies and voltages of the measuring channels containing series-connected, inaccurate cascades.

 The problem to which the invention is directed, is the creation of a multi-channel device for measuring the rms voltage values, with increased information content.

 The technical result, which consists in increasing information content, is achieved by the fact that, in a multichannel device for measuring the rms voltage value, containing n-input buses, each of which is connected to the input of the corresponding voltage, the output of the first voltage follower through a series-connected first filter and amplifier with an adjustable coefficient gain is connected to the input of the first RMS detector made with a low-pass filter, the output of this detector is connected is connected to the first input of the information recorder, the second filter, the output of which through the second amplifier with an adjustable gain is connected to the input of the second detector of the rms voltage value made with a low-pass filter, the output of this detector is connected to the second input of the information recorder, three analog keys, the first and the third of which are connected in parallel to the low-pass filters of the first and second rms value detectors, respectively, a resistive divider, extreme conclusions to They are connected between the reference voltage bus and the output of the second analog switch, and the middle output is connected to the inverting inputs of the first and second differential voltage comparators, the non-inverting inputs of which are connected to the outputs of the first and second rms detectors, the input of the second analog switch is connected to the common bus, and control input - with the output of the AND element and the counting input of the first binary counter, the inverse output of the last bit of which is connected to the first input of the electronic And, the second input of which is connected to the control input of the first analog key and to the first input of the second OR element, the output of which is connected to the control input of the third analog key, the first and second inputs of the first OR are connected to the outputs of the first and second differential voltage comparators, direct outputs the bits of the first binary counter are connected to the corresponding control inputs of the first and second amplifiers with an adjustable gain, the second input of the second OR element is connected to the pulse shaper, the input of which is connected to the first output of the stable periodic pulse generator, the outputs of the bits of the second binary counter are connected to the analog control inputs of the analog multiplexer, the counting input is connected to the first output of the stable periodic pulse generator, and the installation R input is combined with the R input of the first binary counter and connected to the reset bus to zero the device, the output of the analog multiplexer is connected to the input of the second filter, the first information input to the output at the second voltage follower, the second information input is to the output of the first voltage follower, and the third and subsequent information inputs are to the outputs of the voltage followers of the same name, the direct outputs of the bits of the first binary counter and the direct output of the highest bit of the second binary counter are connected to the corresponding digital inputs of the digital-to-analog converter, whose analog output is connected to the third input of the information recorder, an analog integrator, a third rms detector A low-pass filter, fourth, fifth and sixth analog switches, a 2x2I-OR element, a NOT element, three resistors and a capacitor, an information recorder is equipped with a fourth input, and a stable periodic pulse generator is equipped with second and third outputs that are connected to the corresponding the first inputs of the AND elements of the 2x2I-OR element, the second input of the first AND element of which is connected to the first additionally entered high order of the second binary counter, the first and second least significant bits of which are connected to the corresponding additionally entered low-order bits of the digital-analog converter, the second input of the second AND element of the 2x2I-OR element is connected to the output of the NOT element, the input of which is connected to the first additionally entered high-order bit of the second binary counter, the second additionally entered high-order bit of which is connected to the control input of the fourth analog key the input of which is combined with the input of the fifth analog switch and connected through the first resistor to the analog output of the digital-to-analog converter If the cable is connected through the second resistor to the output of the fourth analog key, the control input of the fifth analog key is connected to the output of the 2x2I-OR element, and the output is connected through the third resistor to the common bus and through the capacitor to the last input bus, the sixth analog key is connected in parallel to the low-pass filter of the third rms detector, the control input of the sixth analog key is connected to the output of the second OR element, the output of the second amplifier with an adjustable gain is connected through an analog integrator to the input of the third RMS detector, the output of which is connected to the fourth input information registrar.

 In addition, the analog integrator is made on a band-pass filter, the quality factor and gain of which is not more than one, and the slope is more than 6 dB / oct.

The specified set of features allows to increase the information content, namely, to provide simultaneous measurement of voltages and frequencies of the analyzed signals (processes) on the maximum number of input buses with a minimum number of recorder channels in an extended measurement range due to the following factors:
a) the introduction of an integrator with a slope of 6 dB / oct and an additional channel for measuring the rms voltage value, which allows to select the prevailing, fundamental process frequency by the device in a wide range with the introduction of the built-in calibrator;
b) increased accuracy and width of the measurement range from the introduced built-in calibration according to previously known frequencies and voltages. Calibration is necessary for measuring channels containing inaccurate cascades in series.

 Figure 1 shows the structural diagram of a multi-channel device for measuring the rms voltage; figure 2 - timing diagrams of his work; figure 3 is a structural diagram of an amplifier with adjustable gain; figure 4 is a structural diagram of a rms detector (RMS detector); figure 5 is a structural diagram of an analog integrator; figure 6 - its transfer characteristic.

The multi-channel device (figure 1) contains eight (n = 8) input buses 1 ÷ 8 (seven of which are connected to vibration sensors, and the eighth to a frequency and voltage calibrator, described below), each of which is connected to the input of the corresponding non-inverting repeater 9 -16 voltage. The output of the first follower 9 through the first low-pass filter 17 is connected to the input of the first amplifier 18 with an adjustable gain made with the gain control inputs 19. The output of the amplifier 18 is connected to the input of the first rms value detector 20, the output of which is connected to the first input 21 of the information storage recorder 22. The output of the second low-pass filter 23 is connected to the input of the second amplifier 24, made with the gain control inputs 25. The output of the amplifier 24 is connected to the input of a second similar rms value detector 26, the output of which is connected to the second input 27 of the information recorder 22. The device also contains an analog multiplexer 28, two binary counters 29, 30, two differential voltage comparators 31, 32, a resistive healer 33, made on series-connected resistors 34, 35, the first, second, third analog keys 36, 37, 38, the element And 39, two elements OR 40, 41, multi-channel generator 42, stable periodic pulses (exact frequency meanders), with three channels f ₁ , 2f ₁ , f ₃ (frequency outputs 105, 210, 3.28 Hz, respectively), shaper 43 short pulses on the front, digital-to-analog converter 44. Krain e conclusions resistive divider 33 connected between the bus 45 voltage reference (E ₀₎ and the output switch 37, and the middle part is connected to the inverting inputs of comparators 31, 32, non-inverting inputs of which are connected respectively to the outputs of detectors 20, 26 RMS. The keys 36, 38 are connected in parallel with the capacitors 46, 47 of the low-pass filters of the detectors 20 and 26, respectively. The key input 37 is connected to a common bus, and the control input is connected to the output of the And 39 element and the counting input of the counter 29, the inverse output of the last bit of which is connected to the first input of the And 39 element. The second input of the And 39 element is connected to the output of the OR element 40, the control input key 36 and through the OR element 41 to the control input of the key 38. The inputs of the OR element 40 are connected to the outputs of the comparators 31, 32. The direct outputs of the bits of the counter 29 are connected to the inputs 19, 25. The second input of the OR element 41 is connected to the output of the driver 43, the input of which connected to the first you go f ₃ ~ (3.3 Hz) of the generator 42 multichannel stable periodic pulses. The inputs A ₀ , A ₁ , A _{2 of the} control of the multiplexer 28 are connected to the corresponding outputs 2 ⁰ , 2 ¹ , 2 ² bits of the counter 30 and the digital inputs of the digital-to-analog converter 44 of the same name, the counting C-input of the counter 30 is connected to the output of the generator 42, the installation R- the input is combined with the R-input of the counter 29 and is connected to the reset bus 48 of the device. The output of the multiplexer 28 is connected to the input of the filter 23, the first XI information input to the output of the repeater 10, the second X2 information input to the output of the repeater 9, and the third and subsequent X3 to X8 information inputs are connected to the outputs of the third and subsequent repeaters 11-16. Direct outputs 2 ⁰ , 2 ^{1 of the} counter 29 are connected to the senior digital (code) inputs of the digital-to-analog converter 44, the analog output of which is connected to the third input 49 of the information recorder. The rms value detectors 20, 26 respectively comprise functional converters 50, 51 with low-pass filter capacitors 46, 47 connected to them. The device also contains an analog (active, on an operational amplifier) integrator 52, a third similar rms value detector 53 made on a functional converter 54 with a low-pass filter capacitor 55 connected to it. Fourth, fifth, sixth analog keys 56, 57, 58, 2x2I-OR 59 element, NOT 60 element, resistors 61, 62, 63, isolation capacitor 64, fourth input 65 of information recorder 22. In this case, the second and third f ₁ , 2f _1, respectively, the outputs of the generator 42 of stable periodic pulses are connected to the first corresponding inputs of the elements AND of the element 2x2I-OR, the second input of the first element And which is directly, and the second input of the second element And which is connected through the element NOT 60 to discharge 2 ^{3 of the} second counter 30, discharge 2 ^{4 of} which is connected to the control input of the analog switch 57, the input of the latter is combined with the input of the analog switch 58 and connected through a resistor 62 to the analog output of the digital-to-analog converter Yelaya 44, connected through a resistor 61 to the output of the analog key 57, the control input of the analog key 58 is connected to the output of the 2X2 AND - OR 59 element, and the output of this key 58 is connected through the resistor 63 to the common bus and through the capacitor 64 to the last input bus 8, the analog switch 56 is connected by a channel parallel to the capacitor 55 of the third rms detector 53, the control input of the analog switch 56 is connected to the output of the second OR element 41, the output of the second amplifier 24 with an adjustable coefficient is connected via an active analog an integrator 52 to the input of the detector 53 rms values, the output of which is connected to the fourth input 65 of the data logger 22.

The first and second amplifiers 18, 24 with adjustable gain and control inputs 19, 25 in FIG. 1 are of the same type and are made according to the circuit described in g. "Measuring equipment", 1983, 1, p. 57, article "High-speed, effective values of the microprocessor current transducer". An amplifier (Fig. 3) with an adjustable gain contains an output bus 66, an analog multiplexer 67, a non-inverting amplifier 68 and a resistive divider 69, the input of which is an input 70 of an amplifier with an adjustable gain, the output of which is connected to a common bus, and the taps and input are to the channel inputs of the analog multiplexer 67, the output of which is connected to the input of a non-inverting amplifier, and the inputs A ₀ A ₁ of the channel selection control are the control inputs 19, 25 of the amplifier with an adjustable gain. The code on the control inputs unambiguously determines which tap of the resistive divider is connected to the non-inverting amplifier, and therefore the gain of the amplifier with an adjustable gain.

 The rms detectors 20, 26, 53 of FIG. 1 are of the same type and are made according to the scheme described in g. "Communication Technology, Series Radio Measuring Technology" 5, 1979, p. 54, article "RMS Converter".

The rms detector (Fig. 4) comprises a functional converter 50 and a low-pass filter capacitor 46, the functional converter being made on a shaper 71 of the variable signal module, whose input is input 72 of the rms detector, and the output is connected through a resistor 73 to the inverting input of the operational amplifier 74 to the collector of transistor 75, the base of which is connected to a common bus, and the emitter in series with a diode 76 and a resistor 77, the other output of which is connected to the output for the operational amplifier 74, the combining point of the diode 76 and the resistor 77 is connected to the diode 78 and the emitter of the transistor 79 connected in series, the base of which is connected to the common bus, and the collector to the inverting input of the operational amplifier 80, the resistor 81 in the feedback circuit of the operational amplifier 80, RC low-pass filter capacitor 46, one of which is connected to the output of the operational amplifier, and the other to the emitter of transistor 79. Resistor 77 ensures the stability of the logarithmic amplifier, and the formation of the module The measured voltage is subtracted from the output signal of a half-wave rectifier of an alternating input signal with a ratio of amplitudes of the subtracted signals 2: 1 (see cascade on amplifier A1 and resistor R / 5, s. 409, Fig. 3.77 Handbook of nonlinear circuits, trans. from English, ed. D. Sheingold, M., Mir, 1977). The shaper of the module 71 of the functional Converter 50 makes the operating mode of the logarithmic amplifier independent of the polarity of the input voltage, and by cascading the diode 75 and transistor 76, the squaring operation is performed (2lgx = logx ² ), then the anti-logarithm is calculated and the averaging by the low-pass filter is performed, the time constant and his is R81 • C46. The voltage at the output 82 of the device is equal to the rms value. The time constants of all detectors are equal to each other and equal to 0.12 s, the transmission coefficients of all detectors are equal to each other and equal to unity. The transfer coefficients of all detectors are equal to each other and equal to unity.

 The driver 43 of short pulses along the front of figure 1 is made according to the standard scheme described in the industry standard. Integrated circuits. Series 564. Guidance on the use of OST11.340.907-80 p. 202, drawing 350. The timing diagram of the operation of a single vibrator is given there in the OST.

 Non-inverting voltage followers 9-16 in figure 1 are of the same type, each of them is made according to the scheme, see. Measuring equipment, 1983, 1, article "High-speed effective values of the microprocessor-based AC converter, p.58, Fig. 2. It is an impedance converter. Other versions, including an inverting voltage follower, for example, on a charge amplifier, are possible.

 Filters 17, 23 in FIG. 1 are of the same type. Each of them is made on the 298 FN14 chip of the 298 series according to the low-pass filter circuit shown in σКО 347.002ТУ, 1976.

 The generator 42 periodic pulses, stable, multi-channel can be performed on three independent stable oscillators of pulses with different repetition rates, the outputs of which are channels, its outputs. In addition, the generator 42 of periodic pulses is multi-channel, can be made stabilized in frequency (quartz), the output of which is connected to the input of the frequency divider on the triggers, the outputs of which are channels, the outputs of the generator. In this case, the duty cycle of the pulses is equal to two, and the frequency of the pulses is a multiple of two units, which is required for calibration by octave. A similar circuit is described in the book "Digital Electronics Course", J. Jansen, M., Mir, 1987, p. 103, Fig. 2.27, see A.V.S. A similar circuit is given in the book "750 Practical Electronic Circuits", M., Mir, 1986, p.136.

 The digital-to-analog converter 44 is standard, made on a chip of the type H572 PA1 A σКO.347.182ТУ1.

 Information logger 22 is a four-channel loop oscilloscope or a four-channel digital storage oscilloscope, or a four-channel onboard analog telemetry system with information storage.

 All resistors 34.35.61.62.63 precision type C2-29V ± 0.1% accuracy, they determine the accuracy of calibration and switching thresholds of the device.

 Analog keys - standard microcircuit type 590KN5 or 564 CTZ. In the closed state, the resistance of the keys is equivalent to breaking, in the open, close to zero.

Analog active integrator 52 may be implemented on a resistor connected to an inverting operational amplifier with a capacitor in the negative feedback circuit. See the standard circuit described in the book "Applications of operational amplifiers and linear ICs" L. Falkenberry, M., Mir, 1985, p. 127, Fig. 6.2 (Integrator on an operational amplifier). Its characteristic unnecessarily strongly enhances low (<f ₀ ) low-frequency frequencies, since it passes along the lines a, b, c, see FIG. 6, has a slope of 6 dB / oct both above and below the frequency f ₀ unity gain, where K = 1. This complicates its use in the claimed device, if the spectrum of the analyzed signal contains even a small level of low, non-primary (non-energy-carrying) frequencies below the frequency f ₀ . They are unnecessarily amplified by this integrator and interfere with the allocation of the main energy-carrying frequency lying above the frequency f ₀ .

, а конденсаторы С84=С85, то получится фильтр с коэффициентом усиления К и добротностью, равными единице, характеристика усиления которого от частоты f приведена на фиг.6. Она представляет собой равнобедренный треугольник О в с, рабочая часть интегратора "в с" лежит выше частоты f₀, имеет наклон - 6 дБ/окт. Ее использование предпочтительно в заявленном устройстве. Даже если в спектре анализируемого сигнала присутствуют низкие (0-25 Гц), малого уровня, т.е. неосновные, неэнергонесущие частоты (ниже частоты f₀). Они малы по уровню и дополнительно эффективно подавляются другой ветвью "Oв" (фиг.6), что благоприятствует выделению основной энергонесущей частоты, лежащей выше известной минимальной частоты f₀. Характеристика фиг.6 снята с помощью измерительного генератора и среднеквадратичного вольтметра. Из нее видно, что неизвестная частота 200 Гц равна отношению

уровней среднеквадратичных значений: измеренных на частоте = 100 Гц, где К=1, и на частоте 200 Гц, где K=0,5. То есть для выделения неизвестной частоты достаточно сигнал неизвестного уровня СКЗ и частоты измерить одновременно двумя однотипными среднеквадратичными вольтметрами до и после пропускания через аналоговый интегратор, а результаты поделить и умножить на коэффициент, пропорциональный f₀(частоте единичного усиления), вручную или иным способом. Это зависит от регистратора 22 информации, который может содержать встроенный вычислитель данной формулы.The best analog active integrator is partially described in the book "Applications of operational amplifiers and linear ICs", L. Falkenberry, M., Mir, 1985, p.206, Fig. 8.15. Its circuit is shown in Fig. 5, and the dependence of the gain on frequency - in Fig. 6. The analog integrator 52 contains a resistor 83 in the negative feedback circuit of the inverting operational amplifier, the output of which through series-connected capacitors 84.85 is connected to the inverting input, the combining point of the capacitors through the resistor 86 is connected to a common bus, and through the resistor 87 to its input. If you choose resistors

and the capacitors C84 = C85, then we get a filter with a gain K and a quality factor equal to unity, the gain characteristic of which from frequency f is shown in Fig.6. It is an isosceles triangle O in s, the working part of the integrator "in s" lies above the frequency f ₀ , has a slope of 6 dB / oct. Its use is preferably in the claimed device. Even if the spectrum of the analyzed signal contains low (0-25 Hz), a small level, i.e. minor, non-energy-carrying frequencies (below the frequency f ₀ ). They are small in level and additionally effectively suppressed by the other branch "Ov" (Fig.6), which favors the allocation of the main energy-carrying frequency lying above the known minimum frequency f ₀ . The characteristic of Fig. 6 was taken using a measuring generator and a rms voltmeter. It shows that the unknown frequency of 200 Hz is equal to

levels of rms values: measured at a frequency = 100 Hz, where K = 1, and at a frequency of 200 Hz, where K = 0.5. That is, to isolate the unknown frequency, it is enough to measure the signal of the unknown RMS level and frequency simultaneously with two of the same type of rms voltmeters before and after passing through the analog integrator, and divide and multiply the results by a factor proportional to f ₀ (unit gain frequency), manually or otherwise. It depends on the information logger 22, which may contain an on-board calculator of this formula.

 A multi-channel device for measuring the rms voltage value (figure 1) works as follows.

равно неизвестной частоте при условии, что крутизна спада интегратора известна (-6 дБ/окт). Здесь f₀ - частота, где коэффициент передачи интегратора 52 равен 1. Обеспечить достаточную стабильность отношения напряжений

при эксплуатации устройства в широком диапазоне температур тяжело из-за нестабильности составляющих, обусловленной нестабильностью коэффициента передачи детекторов 26, 53 среднеквадратичные значений, и нестабильности крутизны - 6 дБ/окт интегратора 52. Погрешность коэффициента передачи максимальна в нижней части линейной шкалы напряжений детекторов 26,53 среднеквадратических значений, имеет разброс при настройке или воздействии температуры как в верхней, так и нижней части шкалы напряжений. Для измерения крутизны ~6 дБ/окт интегратора 52 необходимо также знание двух контрольных точек линейной шкалы частот интегратора 52, смещенных на октаву (точно в 2 раза). То есть вводимые элементы калибратора должны выдавать по два известных напряжения и частоты. Это выделит верх шкалы и низ шкалы напряжений детекторов 26,53, причем это надо делать на двух смещенных на октаву частотах, причем при любом коэффициенте усиления усилителей 18,24 с регулируемым коэффициентом (т.к. диапазон сигнала на входных шинах достаточно широк). За опорную во вводимом калибраторе берется частота f₁ чуть выше f₀ интегратора 52 и ее удвоенное значение 2f₁, по ним строится прямая "вс" фиг. 6, затем уточняется значение частоты f₀ и крутизна спада (6 дБ/окт). С учетом однозначной связи напряжения U49 на выходе цифроаналогового преобразователя 44 как с номером датчика, и главное, с коэффициентом усиления усилителей 18,24 (см.U₄₉ на фиг.2), оно может быть использовано как контрольное после точного деления точными резисторами 63, 62, 61 в отношении

и

для получения точек в области нижней и верхней части шкалы напряжений детекторов соответственно.The operation of the multichannel device while measuring frequencies and voltages involves the simultaneous recording in the recorder 22 of the signal (U ₂₇ ) of the detector 26, which did not pass through the integrator 52 and the signal of the detector 53, but passed through the integrator 52 (U ₆₅ , figure 2). Subsequent (manual) calculation of the ratio of these signals

equal to an unknown frequency, provided that the slope of the integrator is known (-6 dB / oct). Here f ₀ is the frequency, where the gear ratio of the integrator 52 is 1. Ensure sufficient stability of the voltage ratio

when operating the device in a wide temperature range, it is difficult due to the instability of the components due to the instability of the transfer coefficient of the detectors 26, 53 rms values and the instability of the slope - 6 dB / oct of the integrator 52. The error of the transmission coefficient is maximum at the bottom of the linear voltage scale of the detectors 26.53 r.m.s.values, has a variation in the setting or exposure to temperature in both the upper and lower parts of the voltage scale. To measure the slope of ~ 6 dB / oct of the integrator 52, it is also necessary to know two control points of the linear frequency scale of the integrator 52, shifted by an octave (exactly 2 times). That is, the input elements of the calibrator should produce two known voltage and frequency. This will highlight the top of the scale and the bottom of the voltage scale of detectors 26.53, and this should be done at two frequencies shifted by an octave, and for any gain of amplifiers 18.24 with an adjustable coefficient (because the signal range on the input buses is wide enough). The reference frequency in the introduced calibrator is taken to be the frequency f ₁ slightly higher than f _{0 of the} integrator 52 and its double value 2f ₁ , and the direct "sun" of FIG. 6, then the value of the frequency f ₀ and the slope of the slope (6 dB / oct) are specified. Given the unambiguous relationship of the voltage U49 at the output of the digital-to-analog converter 44 as with the sensor number, and most importantly, with the amplification factor of the amplifiers 18.24 (see U ₄₉ in figure 2), it can be used as a control after precise division by exact resistors 63, 62, 61 in relation

and

to obtain points in the lower and upper part of the voltage scale of the detectors, respectively.

, фиг.1) через элемент 2х2И-ИЛИ 59 подключает ключом 58 к шине 8 через конденсатор 64 на I цикл опроса входных шин 1-8 частоту f₁(см.2³СТ2, фиг.2), а затем на I цикл опроса входных шин 1-8 частоту 2•f₁. В первом и втором циклах опроса входных шин 1-8 счетчик 30 (выход 2⁴ СТ2, фиг.1) подключает ключом 58 на шину 8 уровень верха шкалы, равный

частотой f₁ и 2f₁ соответственно. В третьем и четвертом циклах опроса входных шин 1-8 счетчик 30 подключает ключами 57, 58 на шину 8 уровень низа шкалы, равный

частотой f₁ и 2f₁ соответственно. Возможен и другой алгоритм, когда два цикла опроса шин 1-8 подается на шину 8 - одна частота, но разные по циклам уровни. Последующие затем два цикла опроса шин 1-8 подаются на шину 8 - другая частота, но разные по циклам уровни. При этом выходы 2³, 2⁴ счетчика 30 меняют местами, выходы f₁, 2f₁ генератора меняют местами. Это отражено в формуле записью выходов счетчика 30 и генератора 42 без дополнительной привязки к разрядам.Taking into account the use of a stable generator of 42 periodic pulses, its additionally introduced outputs f ₁ and 2f _{1 are} used to obtain control frequencies f ₁ and 2f ₁ . Counter 30 (see inverse output

, 1) through a 2x2-AND-OR 59 element, connects with a key 58 to the bus 8 through a capacitor 64 for the I polling cycle of input buses 1-8 the frequency f ₁ (see ^{2 3} CT2, Fig. 2), and then for the I polling cycle input buses 1-8 frequency 2 • f ₁ . In the first and second cycles of polling the input buses 1-8, the counter 30 (output 2 ⁴ CT2, FIG. 1) connects, using key 58, to the bus 8, the level top of the scale, equal to

frequency f ₁ and 2f ₁ respectively. In the third and fourth cycles of polling the input buses 1-8, the counter 30 connects with the keys 57, 58 to the bus 8 the level of the bottom of the scale, equal to

frequency f ₁ and 2f ₁ respectively. Another algorithm is also possible, when two polling cycles of buses 1–8 are fed to bus 8 — one frequency, but levels different in cycles. Subsequent then two cycles of polling tires 1-8 are fed to bus 8 - a different frequency, but different levels of cycles. In this case, the outputs 2 ³ , 2 ^{4 of the} counter 30 are interchanged, the outputs f ₁ , 2f _{1 of the} generator are interchanged. This is reflected in the formula by recording the outputs of the counter 30 and the generator 42 without additional reference to the bits.

It is significant that the digital-to-analog converter 44 may be unstable, because U _{49 is} measured by an accurate information recorder 22. The stability of the resistors 61, 62, 63 and the frequency stability of the generator 42 are important, which does not cause difficulties when stabilizing with precision resistors C2-29V and quartz. The operation of the device is based on the amplification and subsequent measurement of the rms value of the electrical AC signals taken from 7 vibration sensors connected to the buses 1-7 of the device. Two known (control, calibration) voltages of two known (control, calibration) frequencies are supplied to the 8th bus, allowing to calibrate the voltage and frequency channel of the device. The calibrations were obtained by introducing all the executive features, with the exception of the integrator 52 and the additional RMS detector 53, which were used to obtain the “frequency” channel by passing the signal from the amplifier 24 through the integrator 52 and the detector 53 (such as detector 26) before it was fed to an additional input 65 of the registrar 22 information. Thus, using the device, it is possible to measure in an extended range not only the level of vibration, but also its main frequency by seven vibration sensors with the issuance of vibration parameters for only 4 output buses, which provides increased information compared to the prototype. Or, in other words, expanded functionality. To ensure a sufficient measurement range and accuracy, the device is equipped with a built-in calibration on the 8 input bus, which takes 1/8 of the time of the polling cycle, its end. Voltage repeaters 9-16 with an input impedance of the order of 10 ⁷ Ohms are used to coordinate the high-impedance output impedance of a vibration sensor or kalzbrator with an amplification path. The inclusion of filters 17, 23 in the measuring path allows you to select a common frequency band analysis.

напряжение с шины 8. См. моменты t₁₀-t₁₁ диаграммах U₂₇, U₆₅, где отмечено уменьшение вдвое, U₂₇=2U₆₅. Вдвое уменьшилось и напряжение U₆₅ (см. моменты t₁₇-t₁₈ на диаграммах U₂₇, U₆₅) по отношению к U₂₇, соответствующее нижней части шкалы, заданной соответствующим напряжением

с шины 8.All detectors 26, 53, 20 have an equal transmission coefficient and a different time constant of 0.12 s, and the signal to the detector 53 comes from the integrator 52, and directly to the detector 26. This leads to a decrease in the rms voltage at the output of the detector 53 compared to the detector 26, which is reflected in the time diagrams of U ₆₅ and U ₂₇ . The decrease is proportional to the fundamental frequency and is used for subsequent determination of this frequency. The value of the time constant of the detectors is selected from the condition of minimizing the measurement error of the RMS process. The signals from the detectors 20, 26, 53 are recorded on the media of the data logger 22 (paper, tape, etc.). This ensures the automatic selection of the measurement range (i.e., gain, see the large steps on U ₄₉ , Fig. 2, moments t ₈ , t ₁₃ ) and the input bus numbers 1-8 (in each polling cycle, 8 small steps on U ₄₉ , FIG. 2) with an indication of these factors both in the transmission line of the RMS signal itself (see U ₂₁ , U ₂₇ , U _{65 of the} diagram in FIG. 2), and from the output of the digital-to-analog converter 44 (see U ₄₉ on figure 2). In this case, the voltage U ₄₉ , which is automatically changed with the bus number and amplification factor of amplifiers 18.24, is used not only to recognize the input bus number and gain, but also as a calibration voltage on bus 8 at levels providing the top and bottom of the scale, see moments t ₆ -t ₇ and t ₁₀ -t ₁₁ , t ₁₄ -t ₁₅ and t ₁₇ -t _18, respectively, in diagrams U ₂₇ , U _{65 of} FIG. 2. At the same time, on bus 8 during the time 0-t ₇ specified by the output 2 ³ CT2 of the counter 30, there is a frequency f ₁ from the output of the generator 42, close to f _{0 the} unit gain frequency of the integrator 52. The voltages U at time t ₆ -t ₇ are in channels U ₂₇ , U ₆₅ and correspond to the top of the scale. During the time t ₇ -t ₁₁ , dependent on the output 2 ³ CT2 (Fig. 2), a frequency 2f ₁ goes from the output 2f ₁ from the output 2f _{1 of the} generator 42 and corresponds to the top of the scale U,

the voltage from the bus 8. See moments t ₁₀ -t ₁₁ diagrams U ₂₇ , U ₆₅ , where a halving is noted, U ₂₇ = 2U ₆₅ . The voltage U ₆₅ (see moments t ₁₇ -t ₁₈ in the diagrams U ₂₇ , U ₆₅ ) with respect to U ₂₇ , corresponding to the lower part of the scale given by the corresponding voltage, has also halved

from bus 8.

The time for supplying more or less calibration levels to the bus 8 is set by the output (2 ⁴ CT2, FIG. 2) of the counter 30. The levels are followed alternately. The counter 30 synchronizes the operation of the device as a whole, controls the multiplexer 28 and the calibration voltages, the frequencies received from the outputs f ₁ , 2f _{1 of the} generator and elements 2x2I-OR 59, element NOT 60, keys 57, 58 with resistors 61, 62, 63. Capacitor 64 removes the DC component from the calibration signal. Consider the operation of the device in more detail.

.In the initial state, the counters 29, 30 are reset to zero by a single pulse on the zero-setting bus 48, while the code on the counter 30 is 00000, as a result of which the XI channel is opened by the code 000 in multiplexer 28 and the signal from input bus 2 through repeater 10, multiplexer channel 28 XI-X, filter 23, amplifier 24 enters detector 26 directly through integrator 52 and enters detector 53. Zero from discharge 2 ^{4 of} counter 30 has key 57 open, which means resistors 61, 62 are connected in parallel and their resistance is small and equal

.

верха шкалы. Через конденсатор 64 оно подается на шину 8. Так как на счетчике 29 также нулевой код 00, то коэффициент (К_u) усиления управляемых усилителей 18, 24 максимален и равен 2. Сигнал переменного тока с входной шины 1 через повторитель 9, фильтр 17 и усилитель 18 поступает в детектор 20 (см. U₂₁ на фиг.2).Zero from discharge 2 ^{3 of the} counter through the element 60 provides a unit at the input AND of the element 2x2I-OR 59, which allows pulses of frequency f ₁ to pass through it from the output of the generator 42 to the control input of the key 58. It opens and closes, providing 63 s on the resistor frequency f ₁ voltage

top of the scale. Through the capacitor 64, it is supplied to bus 8. Since the counter 29 also has a zero code 00, the gain coefficient (K _u ) of the controlled amplifiers 18, 24 is maximum and equal to 2. The AC signal from the input bus 1 through the repeater 9, filter 17 and the amplifier 18 enters the detector 20 (see U ₂₁ in figure 2).

 There are two extreme cases of signals on the input buses. Figure 2 - on bus 1 (and in detector 20) the maximum current value CK2 of the signal, while the choice of gain is determined by detector 20. In other cases, if on bus 1 (and in detector 20) the small current value of the RMS signal is compared with buses 2-7, the choice of gain is determined by the detector 26.

.At the input 21 of the recorder 22 (see U ₂₁ ) there is a continuous value of the RMS of the processed variable input signal, which ensures the memorization and restoration of the true waveform of U _1cc from input 1, and from it from all inputs 2-7, see dashed lines ( U ₂₇ , U ₂₁ in figure 2). At the inputs 27.65 of the recorder 22 (see U ₂₇ , U _{65 of} FIG. 2) from the series-connected input buses 2-1-3-4-5-6-7-7, the RMS values of the corresponding processed variables in level and the frequency of the input signals from buses 1-7 and the control signal from bus 8. These RMS values are slightly less than the true values due to the long transient termination time at the outputs of the detectors 26.53, but do not affect the result of determining the frequency due to the division operation

.

 Due to the division operation, the non-uniformity of the amplitude-frequency characteristic of the filter 23 common to both detectors 26, 53 does not affect the result of determining the frequency.

Periodic pulse generator 42 switches the binary counter 30 (see signals 2 ⁰ CT2, 2 ¹ CT2, 2 ² CT2, 2 ³ CT2, 2 ⁴ CT2). Proportional to the code of outputs 2 ⁰ CT2, 2 ¹ CT2, 2 ² CT2 connected to the digital-to-analog converter, a step-like sawtooth voltage rises at its analog output (U ₄₉ , Fig. 2), thereby marking the bus number 1-8. The last step in the cycle is also calibration.

On the front of the pulses of the generator 42, short pulses are formed by the shaper 43 (see U ₄₃ ). Through the OR element 41, these pulses briefly open the key 38 for instantaneous discharge of the capacitors 47, 55 low-pass filters of the detectors 26, 53 rms when the multiplexer 28 is connected to the next input bus 1-8, i.e. An accurate measurement of the RMS for the signal from the next bus 1-8 always starts at zero level and does not depend on the level of previous signals at inputs 1-8. In the presence of overloads (see level E ₀ on the diagram U ₂₁ ) at the outputs of the detectors 20 or 26 (the detector 53 always has lower values), the unit comparator 31 or 32 and through open elements OR are triggered to one (overload E ₀ - by a non-inverting input) 40, AND 39 sets the counter 29 to the next state, halving the controlled gain K _{u of the} amplifiers 18, 24. At the same time, the analog keys 37, 36, 38, 56 are opened from the OR element 40 at the V inputs and a quick discharge is performed capacitors 46, 47, 55 to a level of not less than half them at this point RMS voltage, in particular (see U ₂₁ in figure 2) for the capacitor 46 is the level E _0/2 . It is determined by the voltage E _0/2 at the middle point of the resistive divider 33, resistors R _34, R ₃₅ are equal, and the key element 37 is opened and 39. By reducing the level to ₀ ≤E / 2 on both the capacitors 46, 47 and, hence, non-inverting inputs of the comparators, the comparators 31, 32 are returned to the initial state of the logical zero by the output, by zero (through element 40) the keys 36, 38, 56, and then 37 are closed. This ensures not only automatic selection of the measuring range, but also the fast establishment of readings on all detectors 20, 26, 53, corresponding to the same new gain of controlled amplifiers 18, 24.

The growing digital code from the outputs of the counter 29 and bits 2 ⁰ , 2 ¹ , 2 ^{2 of the} counter 30 is fed to the digital, code inputs of the digital-analog converter 44, the voltage at its analog output (see U ₄₉ in figure 2) increases by a large step at each another decrease in the gain (see moments 0, t ₈ , t ₁₃ in the diagrams U ₄₉ , U _{21 of} figure 2), providing recognition of the new gain. The numbers of input buses 1–8 are marked in small steps, and the amplification factors in large ones. The automatically increasing voltage U _49, in contrast to the prototype, was used not only for marking the input bus number and gain, but every eighth step in the cycle is used for calibration, and regardless of the gain, the calibration voltage is held at the specified upper and lower parts of the detector voltage scale, this allows you to use the calibration results in a wider range of unknown levels of RMS voltage and frequency on the input buses 1-7. If necessary, the input bus 8 after the calibration time can be disconnected with an additional key from the capacitor 64 and connected to the eighth piezoelectric transducer (not shown in Fig. 1).

 Increased information content is expressed in the simultaneous measurement of voltages and frequencies of the analyzed processes at the maximum number of input buses with a minimum number of recorder channels and is expressed in the expansion of the measurement range. This was achieved by increasing the accuracy by introducing a number of additional elements that provide rarely repeated calibrations of two points of the scale of the switched measuring channels for two reference frequencies and two voltages given by additional elements and the introduction of an additional integrator with a known, controlled after calibration, decay of ~ 6 dB / oct connected to an additional rms detector.

 Built-in calibrations are carried out directly in the measurement process by feeding them to one of the input buses and are provided in a wide range of operating conditions and in the full range of input signals by using the output of a digital-to-analog converter with a voltage that increases with decreasing gain of controlled amplifiers.

 Performing an analog integrator on a band-pass filter with a quality factor and gain of no more than unity and a slope of more than 6 dB / oct eliminates the creeping of low-signal, low-frequency, non-fundamental frequencies (distorting the measurement result with other standard analog integrators), which also helps to increase information content.

A model of the proposed multichannel device was manufactured and tested. The layout is implemented on standard integrated circuits and discrete elements, while the information content is increased, since:
1. The number of measured parameters is doubled, in addition to the RMS voltage, the main frequency of the processes is measured.

 2. The range of measured RMS voltage is expanded, instead of 500-6000 mV, the prototype with a given accuracy measured 40-6000 mV. This is especially important for a signal weakened by the integrator and helps to expand the range (number) of the allocated fundamental frequencies to 2 kHz instead of 400 Hz.

3. The presence of low-frequency modulating signals of a minor frequency is suppressed by the decay of the band-pass filter at frequencies below f ₀ = 100 Hz.

 The measurement error decreased tenfold. This is also equivalent to increasing information content, as allows you to select exactly the energy component from a larger frequency range.

Claims (2)

 1. A multichannel device for measuring the rms voltage value, containing n input buses, each of which is connected to the input of the corresponding voltage follower, the output of the first voltage follower through a series-connected first filter and amplifier with adjustable gain is connected to the input of the first rms value detector, made with low-pass filter, the output of this detector is connected to the first input of the information recorder, the second filter, the output of which is The second amplifier with an adjustable gain is connected to the input of the second RMS detector made with a low-pass filter, the output of this detector is connected to the second input of the information recorder, three analog keys, the first and third of which are connected in parallel to the low-pass filters of the first and second detectors rms values, a resistive divider, the extreme terminals of which are connected between the voltage reference bus and the output of the second analog switch, the middle output is connected to the inverting inputs of the first and second differential voltage comparators, the non-inverting inputs of which are connected to the outputs of the first and second rms detectors, the input of the second analog key is connected to a common bus, and the control input is connected to the output of the And element and the counting input of the first binary counter the inverse output of the last bit of which is connected to the first input of the AND element, the second input of which is connected to the output of the first OR element, which controls the input at the first analog key and to the first input of the second OR element, the output of which is connected to the control input of the third analog key, the first and second inputs of the first OR element are connected to the outputs of the first and second differential voltage comparators, the direct outputs of the bits of the first binary counter are connected to the corresponding control inputs the first and second amplifiers with adjustable gain, the second input of the second OR element is connected to the output of the pulse shaper, the input of which is connected to the output of the stable periodic pulse generator, the outputs of the bits of the second binary counter are connected to the analog control inputs of the analog multiplexer, the counting input is connected to the first output of the stable periodic pulse generator, and the installation R input is combined with the R input of the first binary counter and connected to the reset bus to device zero, the output of the analog multiplexer is connected to the input of the second filter, the first information input is to the output of the second voltage follower, the second information input one to the output of the first voltage follower, and the third and subsequent information inputs to the outputs of the same voltage followers, the direct outputs of the bits of the first binary counter and the direct output of the highest level of the second binary counter are connected to the corresponding digital inputs of the digital-to-analog converter, the analog output of which is connected to the third input information recorder, characterized in that it introduced an analog integrator, a third rms detector made with a filter the lower frequencies, the fourth, fifth and sixth analog keys, 2x2-OR elements, the NOT element, three resistors and a capacitor, the data logger is equipped with a fourth input, and the stable periodic pulse generator is equipped with second and third outputs that are connected to the corresponding first inputs of the AND elements 2x2 AND-OR, the second input of the first element AND of which is connected to the first additionally entered high order of the second binary counter, the first and second low order of which are connected to the corresponding add After the least significant bits of the digital-to-analog converter are entered, the second input of the second AND element of the 2x2I-OR element is connected to the output of the NOT element, the input of which is connected to the first additionally entered high order of the second binary counter, the second additionally entered high order of which is connected to the control input of the fourth analog key, the input which is combined with the input of the fifth analog switch and connected through the first resistor to the analog output of the digital-to-analog converter connected via volt The second resistor to the output of the fourth analog key, the control input of the fifth analog key is connected to the output of the 2x2I-OR element, and the output is connected through the third resistor to the common bus and through the capacitor to the last input bus, the sixth analog key is connected in parallel with the low-pass filter of the third RMS detector , the control input of the sixth analog key is connected to the output of the second OR element, the output of the second amplifier with an adjustable gain is connected through an analog integrator to the input to the third rms detector, the output of which is connected to the fourth input of the information recorder.  2. The device according to claim 1, characterized in that the analog integrator is made on a band-pass filter, the quality factor and gain of which is not more than one, and the slope is more than 6 dB / oct.

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