GB2319911A - Local oscillator circuit - Google Patents

Local oscillator circuit Download PDF

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Publication number
GB2319911A
GB2319911A GB9722936A GB9722936A GB2319911A GB 2319911 A GB2319911 A GB 2319911A GB 9722936 A GB9722936 A GB 9722936A GB 9722936 A GB9722936 A GB 9722936A GB 2319911 A GB2319911 A GB 2319911A
Authority
GB
United Kingdom
Prior art keywords
frequency
phase
signal
locked loop
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB9722936A
Other versions
GB9722936D0 (en
Inventor
Jeong-Hyun Yune
Sang-Up Lee
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of GB9722936D0 publication Critical patent/GB9722936D0/en
Publication of GB2319911A publication Critical patent/GB2319911A/en
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
    • H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
    • H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
    • H03B5/1203—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device the amplifier being a single transistor
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
    • H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
    • H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
    • H03B5/1231—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device the amplifier comprising one or more bipolar transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
    • H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
    • H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
    • H03B5/1237—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device comprising means for varying the frequency of the generator
    • H03B5/124—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device comprising means for varying the frequency of the generator the means comprising a voltage dependent capacitance
    • H03B5/1243—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device comprising means for varying the frequency of the generator the means comprising a voltage dependent capacitance the means comprising voltage variable capacitance diodes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03J—TUNING RESONANT CIRCUITS; SELECTING RESONANT CIRCUITS
    • H03J5/00—Discontinuous tuning; Selecting predetermined frequencies; Selecting frequency bands with or without continuous tuning in one or more of the bands, e.g. push-button tuning, turret tuner
    • H03J5/02—Discontinuous tuning; Selecting predetermined frequencies; Selecting frequency bands with or without continuous tuning in one or more of the bands, e.g. push-button tuning, turret tuner with variable tuning element having a number of predetermined settings and adjustable to a desired one of these settings
    • H03J5/0245—Discontinuous tuning using an electrical variable impedance element, e.g. a voltage variable reactive diode, in which no corresponding analogue value either exists or is preset, i.e. the tuning information is only available in a digital form
    • H03J5/0272—Discontinuous tuning using an electrical variable impedance element, e.g. a voltage variable reactive diode, in which no corresponding analogue value either exists or is preset, i.e. the tuning information is only available in a digital form the digital values being used to preset a counter or a frequency divider in a phase locked loop, e.g. frequency synthesizer
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B2201/00—Aspects of oscillators relating to varying the frequency of the oscillations
    • H03B2201/02—Varying the frequency of the oscillations by electronic means
    • H03B2201/0208—Varying the frequency of the oscillations by electronic means the means being an element with a variable capacitance, e.g. capacitance diode

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Superheterodyne Receivers (AREA)
  • Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)

Abstract

An improved secondary local oscillator circuit is described, including a secondary oscillator 12 for generating a secondary oscillation frequency and a mixer for mixing the secondary oscillation signal with a radio frequency RF to generate an intermediate frequency signal IF. A reference frequency generator 40 generates a reference frequency and a phase locked loop circuit 50 compares the phase of the reference frequency with the phase of the secondary oscillation frequency. A low pass filter 60 receives the output of the phase locked loop circuit 50 and generates an error voltage representative of the phase difference detected by the phase locked loop circuit 50. A resonator CA-CV is coupled to colpitts oscillator transistor TR to produce an oscillator frequency dependent upon the said error voltage.

Description

SECONDARY LOCAL OSCILLATOR CIRCUIT FOR USE IN RADIO COMMUNICATION SYSTEM Background of the Invention The present invention relates to a secondary local oscillator circuit for use in a radio communication system.
Referring to Fig. 1, a conventional secondary local oscillator includes a crystal oscillator X1, an intermediate frequency processor 10 and a trap circuit 20.
The crystal oscillator X1 generates a local oscillation frequency of 82.705MHz or 82.71MHz by means of mechanical resonance of a crystal having a piezoelectric effect. The intermediate frequency processor 10 includes a mixer 11 and an oscillator 12. The mixer 11 mixes a radio frequency signal input RF with a secondary oscillation frequency from the oscillator 12, to generate an intermediate frequency signal output IF.
The oscillator 12 includes a transistor TR with a base connected to receive the oscillation frequency from the crystal oscillator X1 through an oscillation frequency control capacitor C2 and a capacitor C1 for transferring the secondary oscillation frequency output from the transistor TR to the mixer 11. A resistor R1 controls the secondary oscillation frequency of the transistor TR. The trap circuit 20 is composed of a capacitor C4 and an inductor L1 and removes spurious signals in a particular frequency band. Further, a capacitor C3 is used as a bypass capacitor.
However, such a conventional secondary local oscillator circuit using a crystal oscillator cannot accurately control the oscillation frequency. As the crystal oscillator is very sensitive to vibration and impact, the oscillation frequency output from the secondary local oscillator circuit may drift frequently, which has a detrimental effect on a receiver. Further, it is not possible to generate a secondary local oscillation frequency which remains constant despite variations in temperature. Moreover, if the secondary local oscillation frequency deviates from the desired frequency, demodulation by the receiver will deteriorate, thus lowering the performance of the communication terminal.
Summary of the Invention It is therefore an object of the present invention to provide an improved secondary local oscillator circuit for generating a constant oscillation frequency irrespective of vibration and variations in temperature.
Accordingly, the present invention provides a secondary local oscillator circuit comprising: a secondary oscillator for generating a secondary oscillation frequency; a mixer for mixing the secondary oscillation signal with a radio frequency to generate an intermediate frequency signal; a reference frequency generator for generating a reference frequency; means for comparing the phase of the reference frequency with the phase of the secondary oscillation frequency and providing an error signal representative of the phase difference; and a resonator for providing a output signal tuned to a frequency dependent upon the said error signal and providing the tuned signal to the secondary oscillator.
Preferably, the means for providing an error signal comprises: a phase locked loop for comparing the phase of the reference frequency with the phase of the secondary oscillation frequency; and a low pass filter receiving the output of the phase locked loop and adapted to generate the error voltage representative of the phase difference detected by the phase locked loop.
The phase locked loop may comprise: a first frequency demultiplier for demultiplying the reference frequency; a second frequency demultiplier for demultiplying a signal from the secondary oscillator; a phase comparator for detecting the phase difference between the output of the first frequency demultiplier and the output of the second frequency demultiplier; and a charge pump for charge-pumping the phase difference to provide an output voltage.
Preferably, the signal from the secondary oscillator received by the second frequency demultiplier is the secondary oscillation frequency demultiplied in a prescaler.
Brief Description of the Drawings The present invention will now be described by way of example with reference to the accompanying drawings in which: Fig. 1 is a diagram of a conventional secondary local oscillator circuit; and Fig. 2 is a diagram of a secondary local oscillator circuit according to the present invention.
Detailed Description of the Preferred Embodiment Fig. 2 shows a secondary local oscillator circuit according to the present invention. A reference frequency generator 40 generates a reference frequency fo. A phase locked loop (PLL) 50 corrects frequency deviation based on the reference frequency fo. The phase locked loop 50 is composed of a charge pump 51, a phase comparator 52, a first frequency demultiplier 53, a second frequency demultiplier 54 and a pre-scaler 55.
The first frequency demultiplier 53 demultiplies the reference frequency fo from the reference frequency generator 40. The pre-scaler 55 demultiplies a secondary frequency fed back from the oscillator 12 of the intermediate frequency processor 10 through a capacitor C8 and a resistor R4. The second frequency demultiplier 54 demultiplies again a signal output from the pre-scaler 55.
The phase comparator 52 compares the demultiplied signal output from the first frequency demultiplier 53 with the demultiplied signal output from the second frequency demultiplier 54, to detect a phase difference between the signals.
The charge pump 51 charge-pumps the output signal from the phase comparator 52. For example, the charge pump 51 may be composed of PMOS (P-channel Metal-Oxide-Semiconductor) and NMOS (N-channel Metal-Oxide-Semiconductor) transistors and generate a high impedance output signal when the signals generated from the first and second frequency demultiplier 53 and 54 are in phase (a phase locked status).
A low pass filter 60 is composed of resistors R2 and R3, and capacitors C6 and C7. The low pass filter 60 filters out the high frequency component from the comparison signal output from the phase comparator 52 and determines the synchronization and response characteristics of the phase locked loop 50. Since the stability, phase noise, purity, and lock time of the secondary local oscillation frequency are determined based on the characteristics of the low pass filter 60, the time constant of the low pass filter 60 should be determined such that the secondary oscillator operates optimally. The low pass filter 60 detects a DC error voltage based on the phase difference between the signals generated from the first and second demultipliers 53 and 54.
A resonator 70 is composed of capacitors C4 and C5, an inductor L1, and a varactor diode CV. The resonator 70 constitutes a Colpitts oscillator, together with a transistor TR of the oscillator 12 in the intermediate frequency processor 10. The secondary oscillation frequency can be determined by the following Equation (1): 2Vwt (1) where inductance L has a constant value and capacitance Ct is the sum of Cc and Cv, in which Cc represents the capacitance of the capacitors C4 and C5, and Cv represents the capacitance of the varactor diode CV. It can be understood from Equation (1) that the secondary oscillation frequency can be controlled by applying a reverse bias voltage to the varactor diode CV to vary the capacitance Cv.
The intermediate frequency processor 10 includes a mixer 11 and the oscillator 12. The mixer 11 mixes a radio frequency signal input RF with the secondary oscillation frequency output from the oscillator 12 to generate an intermediate frequencies output IF of nfRF-mflo wherein nfRF represents n-times the radio frequency and mflo represents m-times the local oscillation frequency. Here, 'n' and 'm' are positive numbers (i.e., 1~X). Finally, the intermediate frequency output becomes IfRF - fLol The oscillator 12 includes a capacitor C1 and the transistor TR with a base connected to receive the signal output from the resonator 70 through a capacitor C2. A resistor R1 controls the secondary oscillation frequency of the transistor TR. Further, a capacitor C8 is a coupling capacitor for coupling the secondary oscillation frequency output from the oscillator 12 to the pre-scaler 55.
As can be appreciated from the foregoing description, the secondary local oscillator circuit of the invention includes a phase locked loop to monitor the secondary oscillation frequency output and correct frequency deviation, if it occurs. Therefore, the secondary local oscillator circuit may generate a constant frequency, removing frequency drift. Since the oscillator circuit is stable against impact and temperature variations, a communication terminal such as a PCS (Personal Communication Services) terminal, a CDMA (Code Division Multiple Access) cellular telephone, a cordless telephone, etc. which adopts the oscillator circuit of the invention may have improved system performance.

Claims (5)

CLAIMS:
1. A secondary local oscillator circuit comprising: a secondary oscillator for generating a secondary oscillation frequency; a mixer for mixing the secondary oscillation signal with a radio frequency to generate an intermediate frequency signal; a reference frequency generator for generating a reference frequency; means for comparing the phase of the reference frequency with the phase of the secondary oscillation frequency and providing an error signal representative of the phase difference; and a resonator for providing a output signal tuned to a frequency dependent upon the said error signal and providing the tuned signal to the secondary oscillator.
2. A secondary local oscillator circuit according to claim 1 in which the means for providing an error signal comprises: a phase locked loop for comparing the phase of the reference frequency with the phase of the secondary oscillation frequency; and a low pass filter receiving the output of the phase locked loop and adapted to generate the error voltage representative of the phase difference detected by the phase locked loop.
3. A secondary local oscillator circuit according to claim 2 in which the phase locked loop comprises: a first frequency demultiplier for demultiplying the reference frequency; a second frequency demultiplier for demultiplying a signal from the secondary oscillator; a phase comparator for detecting the phase difference between the output of the first frequency demultiplier and the output of the second frequency demultiplier; and a charge pump for charge-pumping the phase difference to provide an output voltage.
4. A secondary local oscillator circuit according to claim 3 in which the signal from the secondary oscillator received by the second frequency demultiplier is the secondary oscillation frequency demultiplied in a prescaler.
5. A secondary local oscillator circuit substantially as described herein with reference to and/or as illustrated in FIG. 2 of the accompanying drawings.
GB9722936A 1996-11-28 1997-10-31 Local oscillator circuit Withdrawn GB2319911A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960058952A KR100242415B1 (en) 1996-11-28 1996-11-28 Second local osicillator

Publications (2)

Publication Number Publication Date
GB9722936D0 GB9722936D0 (en) 1998-01-07
GB2319911A true GB2319911A (en) 1998-06-03

Family

ID=19484246

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9722936A Withdrawn GB2319911A (en) 1996-11-28 1997-10-31 Local oscillator circuit

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KR (1) KR100242415B1 (en)
CN (1) CN1184381A (en)
BR (1) BR9705012A (en)
GB (1) GB2319911A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008141536A1 (en) * 2007-05-18 2008-11-27 Huawei Technologies Co., Ltd. Receiving circuit and receiving method for receiving intermediate frequency signal

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100565786B1 (en) * 2003-07-14 2006-03-29 삼성전자주식회사 Wideband quadrature generation technique requiring only narrowband components

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2173661A (en) * 1985-03-22 1986-10-15 Victor Company Of Japan Superheterodyne television tuner
EP0237167A2 (en) * 1986-01-31 1987-09-16 RCA Thomson Licensing Corporation Television tuning system with aft provisions
US5004989A (en) * 1988-12-19 1991-04-02 U.S. Philips Corp. Oscillator for controlling a mixer stage in a tuner

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2173661A (en) * 1985-03-22 1986-10-15 Victor Company Of Japan Superheterodyne television tuner
EP0237167A2 (en) * 1986-01-31 1987-09-16 RCA Thomson Licensing Corporation Television tuning system with aft provisions
US5004989A (en) * 1988-12-19 1991-04-02 U.S. Philips Corp. Oscillator for controlling a mixer stage in a tuner

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008141536A1 (en) * 2007-05-18 2008-11-27 Huawei Technologies Co., Ltd. Receiving circuit and receiving method for receiving intermediate frequency signal
US8009076B2 (en) 2007-05-18 2011-08-30 Huawei Technologies Co., Ltd. Intermediate frequency receiving circuit and intermediate frequency receiving method

Also Published As

Publication number Publication date
KR100242415B1 (en) 2000-02-01
KR19980039836A (en) 1998-08-17
CN1184381A (en) 1998-06-10
BR9705012A (en) 1998-12-01
GB9722936D0 (en) 1998-01-07

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WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)