GB2319660A - Gate insulation layers for thin film transistors - Google Patents

Gate insulation layers for thin film transistors Download PDF

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GB2319660A
GB2319660A GB9724618A GB9724618A GB2319660A GB 2319660 A GB2319660 A GB 2319660A GB 9724618 A GB9724618 A GB 9724618A GB 9724618 A GB9724618 A GB 9724618A GB 2319660 A GB2319660 A GB 2319660A
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layer
diamond
forming
carbon
active layer
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GB9724618D0 (en
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Jin Jang
Kyu-Chang Park
Jong Hyun Moon
Suk-Jae Chung
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SK Hynix Inc
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Hyundai Electronics Industries Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H01L29/6675—Amorphous silicon or polysilicon transistors
    • H01L29/66765—Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4908—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT

Abstract

A thin film transistor comprises a gate electrode 11, an active layer 13, and a gate insulating layer 12 comprising a diamond-like carbon layer 12-1, formed between the gate electrode and the active layer. Diamond-like carbon with a good insulating property is used as a gate insulating layer of the TFT, so a production yield of a TFT employing the diamond-like carbon increases. The carbon layer 12-1 is deposited by plasma enhanced C.V.D of a gas such as CH 4 , C 2 H 6 , C 2 H 2 or C 3 H 8 . A silicon nitride layer 12-2 is also deposted on the carbon layer enhanced C.V.D and the active layer of hydrogenated amorphous silicon, amorphous silicon or polysilicon is deposited on the silicon nitride layer.

Description

2319660 GATE INSULATING LAYER RAVING DIAMOND-LIKE CARBON AND THIN FILM
TRANSISTOR EMPLOYING THE SAME AND PROCESS FOR MANUFACTURING GATE INSULATING LAYER AND THIN FILM TRANSISTOR
BACKGROUND OF THE INVENTION
Field of the invention
The present invention relates to a technology of a thin film transistor of a liquid crystal device (LCD), and particularly to a gate insulating layer comprising a diamond-like carbon and a thin film transistor with the same and a process for fabricating the gate insulating layer and the thin film transistor.
Description of the Related Art
Generally, a thin film transistor, serving as switching device, includes a normally staggered type of a thin film transistor and an inverted staggered type of the thin film transistor each having a gate electrode vertically separated from a source electrode and a drain electrode via an active layer, i.e., semiconductor layer and a coplanar type of thin film transistor having a gate electrode, a source electrode and a drain electrode all formed on a surface of a semiconductor layer. The active layer is made of one selected from a group consisting of 1 amorphous silicon, polysilicon, hydrogenated amorphous silicon and chemical semiconductor. Among them, the hydrogenated amorphous silicon a- Si:H is widely used for the thin film transistor(TFT) in view of a good production yield and an easy formation in large scale. A gate insulating layer of thin film transistor with such amorphous silicon layer is double- layered. In the doublelayered gate insulating layer, a pin hole generated at a formation of a lower gate insulating layer is removed during a formation of a upper gate insulating layer. Therefore, the yield of the thin film transistor-liquid crystal display (TFT-LCD) employing the double-layered gate insulating layer increases.
There are used Ta205/SiN, A1203/SiN,, an atmospheric 1-5 pressure chemical vapor deposition (APCVD) Si02/ a plasma enhanced chemical vapor deposition (PECVD) SiN,,, SiON/SiN., for the double-layered gate insulating layer of the TFT. Ta205/SiN, gate insulating layer is sequentially formed by anode oxidization of Ta and PEWD of SiN,. Alternatively, both layers can be made by sputtering, achieving high mobility thereof. Because of insolubility of TaO,, to HF or BHF solution, Ta205/SiN, decreases an insulating defect, thus increasing a production yield of the TFT employing the same. Since it is, however, to difficult to wet etch the Ta205/SiN, a dry etching should be performed in order to form a contact hole in the gate insulating layer.
2 SO as to reduce a RC drive delay of a scan line integrated with a gate electrode in TFT array, metal of a low specific resistance is required for the gate electrode. Therefore, instead of chromium, aluminum was used for the gate electrode and a common electrode of an auxiliary capacitance because the specific resistance of the aluminum is about one tenth of that of the chromium. Anode oxidized aluminum, A1203 and SiN,, serve as the double- layered gate insulating layer. However, the manufacturing process of A1203/SiN, is complicated.
In TFT using APWD Si02/PEWD SiN,,, another doublelayered gate insulating layer, a connection between the APWD system and the PEWD system is difficult during an in-line process even though the productivity is increased due to the high deposition speed of Si02.
As another component of the gate insulating layer there is SiO,Ny which has smaller mechanical stress, larger optical band gap and stronger hydrophobic than SiN,. The reproduction of SiO,,Ny formed using PEWD is not good. Accordingly it is rare to use SiO,Ny as the gate insulating layer for the TFT.
SU ^ RY OF THE INVENTION It is therefore an object of the present invention to .provide a gate insulating layer for reducing the drawbacks above-mentioned to a maximum and a process for 3 manufacturing the same.
It is another object of the present invention to provide a thin film transistor employing such gate insulating layer, thus increasing a production yield of the thin film transistor and a process for manufacturing the same.
To accomplish one object, a gate insulating layer of a transistor with a gate electrode and an active layer comprises a diamond-like carbon layer formed between the gate electrode and the active layer. Further, the gate insulating layer comprises a silicon nitride layer formed between the diamond-like carbon layer and the active layer.
A process for forming the gate insulating layer comprises the steps of forming a diamond-like carbon layer between a gate electrode and an active layer. The process further comprises the step of forming a silicon nitride layer on the diamandlike carbon layer after forming the diamond-like carbon layer and before forming the active layer or on the active layer after forming the active layer and before forming the diamond-like carbon layer.
Here, the diamond-like carbon layer is formed by a plasma enhanced chemical vapor deposition. And the silicon nitride layer is also formed by the plasma enhanced chemical vapor deposition. The diamond-like carbon layer is formed using a gas containing carbon element therein such as CH4, C2H6, C2H2 or C3H8. Also, the diamond-like carbon 4 layer is formed at 25'C through 40CC.
To accomplish another object, a thin film transistor, comprises a gate electrode; an active layer; and a gate insulating layer at least having a diamond-like carbon layer, formed between the gate electrode and the active layer. The active layer is made of one selected from a group consisting of amorphous silicon, polysilicon, hydrogenated amorphous silicon and compound semiconductor. The gate insulating layer further comprises a silicon nitride layer formed between the diamond-like carbon layer and the active layer. In an inverted staggered type TFT, the gate electrode is formed beneath the gate insulating layer(or the diamond-like carbon layer) and a source electrode is formed on a part of the active layer, and a drain electrode separated from the source electrode, is formed on the same plane as the source electrode. In a normally staggered type, the gate electrode is formed on the gate insulating layer (or the diamond- like carbon layer) and a source electrode is formed beneath a part of the active layer, and a drain electrode separated from the source electrode, is formed on the same plane as the source electrode. In a coplanar type, the gate electrode is formed on the gate insulating layer(or diamond-like carbon layer) and a source electrode'is formed on the active layer, and a 25.drain electrode separated from the source electrode, is formed on the same plane as the source electrode.
is A process for manufacturing an inverted staggered type TFT comprises the steps of forming a gate electrode on a substrate; forming a gate insulating layer comprising a diamond-like carbon layer, on the substrate including the gate electrode; forming an active layer on the gate insulating layer; and forming a source electrode on a part of the active layer; and forming a drain electrode separated from the source electrode on the same plane as the source electrode. Here, the active layer is made of one 10 selected from a group consisting of amorphous silicon, polysilicon, hydrogenated amorphous silicon and compound semiconductor. The process further comprises the step of forming a silicon nitride layer on the diamond-like carbon layer before forming the active layer.
A process for forming a normally staggered on a substrate, comprises the steps of forming electrode on a part of the substrate; forming electrode separated from the source electrode, on plane as the source electrode; forming an active type TFT a source a drain the same layer on the substrate including the source electrode and the drain electrode; forming a gate insulating layer comprising a diamond-like carbon layer, on the active layer; and forming a gate electrode on the gate insulating layer. The process further comprises the step of forming a silicon nitride layer on the active layer before forming the diamond-like carbon layer.
6 A process for forming a coplanar type TFT on a substrate, comprises the steps of forming an active layer on the substrate; forming a source electrode on a part of the active layer; forming a drain electrode separated from the source electrode, on the same plane as the source electrode; forming a gate insulating layer between the source electrode and the drain electrode, on another part of the active layer, the gate insulating layer comprising diamond-like carbon layer; and forming a gate electrode on the gate insulating layer. The process further comprises the step of forming a silicon nitride layer on the active layer before forming the diamond-like carbon layer.
Since diamond-like carbon with good insulating property is used as a gate insulating layer, a production yield of a TFT employing the diamond-like carbon increases.
BRIEF DESCRIPTION OF THE DRAWINGS
Fig. 1 is a sectional view of an inversely staggered type thin film transistor employing a gate insulating layer comprising a diamond-like carbon layer and silicon nitride layer in accordance with the present invention.
Fig.2 is a sectional view of a normally staggered type thin film transistor employing a gate insulating layer 25.comprising a diamond-like carbon layer and silicon nitride layer in accordance with the present invention.
7 Fig.3 is a sectional view of a coplanar type thin film transistor employing a gate insulating layer comprising a diamond-like carbon layer and silicon nitride layer in accordance with the present invention.
Fig.4 is a view showing a current to a voltage characteristic of a diamondlike carbon layer used as a gate insulating layer of the TFT.
Fig.5 is a view showing a leakage current characteristic of a diamondlike carbon layer used as a gate insulating layer of the TFT, in response to hydrogen flow used for deposition thereof.
Fig. 6 is a view showing an optical band gap of the diamond-like carbon layer used as the gate insulating layer of the TFT.
Fig.7 is a view showing a voltage characteristic of the silicon TFT with double-layered comprising the diamond-like carbon Fic. 8 is a view showina drain current to a gate hydrogenated amorphous gate insulating layer and silicon nitride. an output feature of hydrogenated amorphous silicon TFT with double-layered gate insulating layer comprising the diamond-like carbon and silicon nitride.
Fig.9 is a view showing an electric field effect mobility 9EF Of the hydrogenated amorphous silicon TFT with .double-layered gate insulating layer having diamond-like carbon and silicon nitride.
8 DESCRIPTION OF THE PREFERRED EMBODIMENT
Herein, embodiments of the invention regarding a thin film transistor including a gate insulating layer and a process of manufacturing thereof will be detail described with reference to the drawings:
Fig.1 is a sectional view of an inverted staggered type of thin film transistor(TFT) according to the present invention. A substrate 10 is prepared. The substrate 10 is of a transparent insulating material such as glass or a silicon substrate having an insulating layer thereon. A gate electrode 11 is disposed on a part of the substrate 10 The gate electrode 11 is made of metal such as chromium or aluminum for tapper etch so as to enhance a step coverage of thin film to be formed at a sequential process. On the substrate including the gate electrode 11 is formed a gate insulating layer 12. The gate insulating layer comprises a diamond like-carbon layer 12-1 and a silicon nitride layer 12-2. On the other hand, only diamond like-carbon layer 12- 1 can play a role of the gate insulating layer by controlling a process condition of forming the diamond-like carbon layer. For example, when a thickness of the diamondlike carbon layer is thicker than that of the diamond-like carbon layer in the double-layered gate insulating layer, the pin hole is greatly removed. An active layer 13 is arranged on the silicon nitride layer 122 of the gate 9 insulating layer 12, by which a characteristic of the TFT is determined. The active layer is made of amorphous silicon, polysilicon, hydrogenated amorphous silicon or compound semiconductor. In this embodiment, the hydrogenated amorphous silicon is employed as a component of the active layer. Among the active layer, the corresponding portion to the gate electrode 11 is a channel region of the TFT. Low resistance contact regions 14a and 14b for a good ohmic contact characteristic are formed on both ends of the active layer. The low resistance contact regions 14a and 14b both are of highly doped amorphous silicon, highly doped hydrogenated amorphous silicon or highly doped hydrogenated micro-crystal silicon(n+ii c-si:H). A source electrode 15a and a drain electrode 15b are formed on the active layer 13 and the low resistance contact layers 14a and 14b.
The process for the TFT in Fig.1 will be described below. Metal of chromium or aluminum is deposited on the substrate 10 to form the gate electrode 11. A first gate insulating layer 12-1 of diamond-like carbon is formed on the substrate 10 including the gate electrode 11 by a plasma enhanced chemical vapor deposition (PECVD) using a gas containing a carbon element such as CH4, C2H6, C2H2 or C3H8. The deposition of diamond-like carbon is carried out in a manner of a self-reducing electric field under 15sccm of CH4 gas, 0 through 30sccm of H2 gas, 20sccm of He gas, 25 through 250C of a substrate temperature, 10OW of RF power and 50OmTorr of a gas pressure.
Here, the selfreducing electric filed will be explained. Generally, the diamond-like carbon is grown on an electrode to which a plus RF power is applied. If a discharge is made after supplying the plus power to the electrode, on the electrode is formed an ion sheath region caused by a mobility difference between an electron and a charged particle. The ion sheath region has a electric field by a plasma, taking minus voltage. Therefore, because of the electric field by the plasma, a particle charged in plus easily moves toward the electrode with acceleration and on the electrode, an ion bumbardment between the plus charged ion and the minus charged ion is generated, thereby forming the hard diamond-like carbon layer. In case of using the diamond-like carbon as an insulating layer, the ion bombardment destroys the insulating characteristic thereof. Therefore, in order to reduce the ion bombardment, the diamond-like carbon is preferably grown on an electrode which is grounded. This is the selfreducing electric field.
After forming the diamond-like carbon layer 12-1, second gate insulating layer 12-2 of silicon nitride deposited on the first gate insulating layer 12-1 25,diamond-like carbon. The silicon nitride is deposited PEWD apparatus under 0.5sccm Of SiH4 gas, 28sccm 11 a is of in of ammonia gas, 100sccm of He gas, 300'c of the substrate temperature, 30W of the RF power, 40OmTorr of the gas pressure. Thereafter, hydrogenated amorphous silicon and a highly doped hydrogenated amorphous silicon are successively deposited on the second gate insulating layer 12-2 and patterned to form the active layer 13 and the low resistance contact layers 14a and 14b. The hydrogenated amorphous silicon for the active layer 13 is deposited in the PEWD apparatus under lsccm Of SiH4 gas, 200'c of the substrate temperature, 1OW of RF power, 20OmTorr of gas pressure. A carrier in the active layer 13 of hydrogenated amorphous silicon moves to the interface between the second gate insulating layer 12-2 of silicon nitride and the active layer 13, to form a channel layer of the TFT.
Accordingly, a threshold voltage of the TFT is affected by the interface condition therebetween. The highly doped hydrogenated amorphous silicon for the lowresistance contact layers 14a and 14b are also deposited in the PEWD apparatus under 0.5sccm Of SiH4 gas, O.Olsccm of PH3 gas, 100sccm of He gas, 200'c of the substrate temperature, 20W of RF power, 20OmTorr of gas pressure. The gas flow is controlled by a mass flow controller during the above deposition.
In case where only the diamond-like carbon layer is used as the gate insulating layer, the channel layer is formed between the diamond-like carbon layer and the active 12 layer by modifying the process condition of the diamond like carbon layer.
Then, metal is deposited over the substrate and patterned, to form a source electrode 15a and a drain electrode 15b which are overlapped with the active layer 13 via the low resistance contact layers 14a and 14b.
Fig. 2 is a view showing a normally staggered type of the TFT using the double-layered gate insulating layer according to the present invention.
A drain electrode 21 and a source electrode 22 separated from the drain electrode 21 are formed on a substrate 20. An active layer 23 is formed on the resultant in which the source and drain electrodes 21 and 22 are formed. The material of the active layer is one selected from a group consisting of amorphous silicon, hydrogenated amorphous silicon, compound semiconductor and ploysilicon, like in Fig.l. A gate insulating layer comprising the silicon nitride layer 24-1 and the diamond like-carbon layer 24-2 is formed on the active layer 23. The first gate insulating layer 24-1 of silicon nitride contacts with the active layer therebeneath. A gate electrode 25 is formed on the second gate insulating layer 24-2 of diamond-like carbon, with overlapping the source electrode and the drain electrode. The second gate insulating layer 24-2 of diamond-like carbon is formed by the PECVD using a gas containing a carbon element such as CH4, C2H6 C2H2 or C3H8.
1 1 j Also, the first gate insulating layer 24-1 of silicon nitride is also formed by the PECVD. The other explanation as to the substrate 20, source electrode/drain electrode 21 and 22, the active layer 23, the gate insulating layer 24-1, 24-2 and the gate electrode 25 is similar to that of Fig.1, which is omitted.
Fig. 3 is a sectional view showing a coplanar type TFT employing the double-layered gate insulating layer according to the present invention.
An active layer 31 is formed on a substrate 30. The material of the active layer is one selected from a group consisting of amorphous silicon, hydrogenated amorphous silicon, compound semiconductor and polysilicion, like in Figs.1 and 2. A drain electrode 32 and a source electrode 33 are formed on a part of the active layer 31. The source electrode 33 is separated from the drain electrode 32. Between the source electrode and the drain electrode, a gate insulating layer 34 comprising the silicon nitride layer 34-1 and the diamond like-carbon layer 34-2 is formed on the active layer 31. The first gate insulating layer 341 of silicon nitride contacts with the active layer 31 therebeneath. A gate electrode 35 is formed on the second gate insulating layer 34-2 of diamond-like carbon, with aligning with the gate insulating layer. The second gate insulating layer 34-2 of diamond-like carbon, is formed by the PEWD using a gas containing a carbon element such as 14 CH4, C2H6, C2H2 or C3H8. Also, the first gate insulating layer 34-1 of silicon nitride is also formed by the PECVD. The other explanation as to the substrate 30, the drain electrode/ the source electrode 32 and 33, the active layer 31, the gate insulating layer 34-1, 34-2 and the gate electrode 35 is similar to that of Fig.1, which is omitted.
Fig. 4 is a view showing current to voltage characteristic of a diamondlike carbon used as a gate insulating layer of the TFT, in which a deposition temperature is 25C and 25CC. The diamond-like carbon is deposited to a thickness of 1500A on a P type silicon wafer with a specific resistance of 10 to 15P. cm. Aluminum is deposited in lmm thickness on the diamond likecarbon by a thermal deposition in a vacuum, forming a MIS(metal insulator semiconductor). Then the characteristic of a current to a voltage of the diamond-like carbon layer is measured using Kithely electrometer 617. In Fig.4, a breakdown voltage of the diamond-like carbon layer is 3W and the current density thereof is 10-10 A/ CM2 at electric field of 1MV/cm. On the other hand, as the deposition temperature increases, the current density of the diamondlike carbon layer decreases and the breakdown voltage thereof increases.
Fig.5 is a view showing a leakage current characteristic of a diamond-like carbon used as a gate insulating layer of the TFT, in response to a hydrogen flow used for a deposition thereof. In Fig.5, when the hydrogen flow is 4sccm or less, the leakage current density of the diamond-like carbon is 10- 9A/& or less, showing a good insulating property. The reason is that the diamond-like 5 carbon layer is more closely fine by a self-heating effect. That is, since the deposition of diamond-like carbon is carried out while increasing the temperature of the substrate on which the diamond- like carbon is formed, a diffusion coefficient of the diamond-like carbon increases.
enhancing the insulating property thereof. However, since very high temperature makes the structure of the diamondlike carbon layer change and thus transforms the diamondlike carbon layer into a different material, a proper temperature is required. In view of Figs 3 and 4, we can easily acknowledge that the insulating characteristic of the diamond like- carbon layer is closely related to the deposition temperature thereof and the hydrogen flow used in the deposition process. One of other advantages of the diamond-like carbon is that the diamond-like carbon can be grown at room temperature, which results from the selfheating effect.
Fig. 6 shows an optical band gap of the diamond-like carbon layer used as the gate insulating layer of the TFT. The diamond-like carbon is deposited on a corning47059 glass and an optical absorption coefficient a of the diamond-like carbon is measured by UV(ultra 16 violet) /VIS (visible) spectrometer. The optical band gap is achieved using the optical absorption coefficient a from the following equation.
( a h 0) 1/2 = B (E-EgoPt) where, B is a constant showing a slope of a graph in Fig. 6, h o is an optical energy of an incident light, a is optical absorption coefficient and E.'Pt is the optical band gap.
Referring to Fig. 6, the optical band gap of the diamond-like carbon is 4.25eV, so the diamond like-carbon can be used as the insulating layer.
Fig. 7 is a view showing a drain current to a gate voltage characteristic of the hydrogenated amorphous silicon TFT with double-layered gate insulating layer comprising the diamond-like carbon and silicon nitride. In Fig. 7, a subthreshold voltage slope of the diamond-like carbon is about 0.36V/dec and ratio of on current to off current is 106 or more.
Fig.8 shows an output feature of hydrogenated amorphous silicon TFT with the double-layered gate insulating layer comprising the diamond-like carbon and the silicon nitride. The diamond- like carbon layer, the silicon nitride layer, the active layer and the low resistance contact layers are 15ooA, 35oo A, 15ooA and 5oo A, respectively. The diamond-like carbon is deposited under 15sccm of CH4 gas, 1scem of H2 gas, 20sccm of He gas, 250 C 17 of the substrate temperature, 10OW of RF power and 50OmTorr of gas pressure. The silicon nitride layer 12-2 is deposited under 0.5sccm of SiH4 gas, 28sccm of ammonia gas, 100sccm of He gas, 300 - C of the substrate temperature, 30W of the RF power and 40OmTorr of the gas pressure. The deposition condition of the active layer 13 is as follows:
a flow rate of SiH4 gas is lsccm, the substrate temperature is 200 - C, the RF power is 1OW and the gas pressure is 20OmTorr. The deposition condition of the low resistance contact layers is as follows: the flow rate of SiH4 gas is 0.5sccm, the flow rate of PH3 gas is 0.01sccm, the flow rate of He gas is 100sccm, the substrate temperature is IC, the RF power is 20W and the gas pressure is 20OmTorr. The ratio of channel width W to channel length L is is 60 A130 A. when the gate voltage is 20V, the drain current is saturated at about 0.7xl 0-6 A at which the drain voltage is about 9V.
Fig. 9 shows an electric field effect mobility PLEF Of the hydrogenated amorphous silicon TFT with double-layered gate insulating layer having the diamond-like carbon and the silicon nitride. The electric field effect mobility 9EF of the hydrogenated amorphous silicon TFT is calculated from the following equation.
I D= [ 9EF (W / L) Ci (VG-VTH) VD 1 1/2 Wherein, ID is a drain current, Cj is a capacitance of the gate insulating layer, VTH is a threshold voltage of 18 TFT and VD is a drain voltage.
The threshold voltage VTH calculated is about 8V, and the electric field effect mobility 9EF is about 0.77cm 2/VS.
In the present embodiment, the diamond-like carbon layer or the diamond-like carbon/silicon nitride layer serves as the gate insulating layer of the TFT. However, the diamond-like carbon layer or the diamond-like carbon/silicon nitride can also used as any insulating layer of the semiconductor device such as an insulating layer between the substrate and a conductor formed on the substrate or between lower conductor and upper conductor. Also, the diamond-like carbon layer or the diamond-like carbon/silicon nitride can be applied to the amorphous silicon TFT, the polysilicon TFT and the compound semiconductor TFT.
The diamond-like carbon layer is used as the gate insulating layer with a good insulating property. Accordingly, the insulating layer of diamondlike carbon greatly contributes to realize the high definition TFTLCD(liquid crystal display) Also, since the diamond-like carbon layer can be formed by PECVD and the silicon nitride layer is formed by PECVD, it is easy to interconnect the diamond-like carbon layer process system to the silicon nitride layer process system. The diamond-like carbon layer can be formed using a gas containing a carbon element such as CH4, C2H6, C2H2 or C3H8. Accordingly, amorphous or 19 polysilicon TFT with the good electrical property is possibly manufactured because the carbon element is less sensitive to the active layer than the oxygen element.
While the present invention has been particularly shown and described with reference to particular embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be effected therein without departing from the spirit and scope of the prevent invention as defined by the appended claims.

Claims (34)

What is claimed is:
1. A gate insulating layer of a transistor with a gate electrode and an active layer, comprising a diamond-like carbon layer formed between said gate electrode and said active layer.
2. A gate insulating layer in claim 1, further comprising a silicon nitride layer formed between said diamond-like carbon layer and said active layer.
3. A thin film transistor, comprising: a gate electrode; an active layer; and a gate insulating layer comprising a diamond-like carbon layer, formed between said gate electrode and said active layer.
layer is of one selectec amornhous silicon A thin film transistor in claim 3, wherein said active from a group consisting of polysilicon, hydrogenated amorphous silicon and compound semiconductor.
5. A thin film transistor in claim 3, wherein said gate.insulating layer further comprises a silicon nitride layer formed between said diamondlike carbon layer and said 21 active layer.
6. A thin film transistor in claim 4, wherein said gate insulating layer further comprises a silicon nitride layer 5 formed between said diamondlike carbon layer and said active layer.
7. A thin film transistor in claim 6, wherein said diamondlike carbon layer, said silicon nitride layer and said 10 active layer of said hydrogenated amorphous silicon are 15ooA, 35n A and 1500 A, respectively in thickness.
8. A thin film transistor in claim 3, wherein said gate electrode is formed beneath said gate insulating layer and is further comprising:
source electrode formed on a part of said active layer; and drain electrode formed separated from said source electrode, on the same plane as said source electrode.
9. A thin film transistor in claim 5, wherein said gate electrode is formed beneath said diamond-like carbon layer and further comprising:
source electrode formed on a part of said active,layer; and drain electrode formed separated from said source 22 electrode, on the same plane as said source electrode.
10. A thin film transistor in claim 3, wherein said gate electrode is formed on said gate insulating layer and further comprising:
source electrode formed beneath a part of said active layer; and drain electrode formed separated from said source electrode, on the same plane as said source electrode.
11. A thin film transistor in claim 5, wherein said gate electrode is formed on said diamond-like carbon layer and further comprising:
source electrode formed beneath a part of said active layer; and drain electrode formed separated from said source electrode, on the same plane as said source electrode.
12. A thin film transistor in claim 3, wherein said gate 20 electrode is formed on said gate insulating layer and further comprising:
source electrode formed on said active layer; and drain electrode formed separated from said source electrode, on the same plane as said source electrode.
13. A thin film transistor in claim 5, wherein said gate 23 electrode is formed on said diamond-like carbon layer and further comprising:
source electrode formed on said active layer; and drain electrode formed separated from said source electrode, on the same plane as said source electrode.
14. A process for forming a gate insulating layer of a transistor with a gate electrode and an active layer, comprising the step of forming a diamond-like carbon layer between said gate electrode and said active layer.
15. A process in claim 14, further comprising the step of forming a silicon nitride layer on said diamond-like carbon layer after forming said diamond-like carbon layer and 15 before forming said active layer.
16. A process in claim 14, further comprising the step of forming a silicon nitride layer on said active layer after forming said active layer and before forming said diamond20 like carbon layer.
17. A process in claim 14, wherein said diamond-like carbon layer is formed by a plasma enhanced chemical vapor deposition.
18. A process in claim 15, wherein both said diamond-like 24 carbon layer and said silicon nitride layer are formed by a plasma enhanced chemical vapor deposition.
19. A process in claim 16, wherein both said diamond-like carbon layer and said silicon nitride layer are formed by a plasma enhanced chemical vapor deposition.
20. A process in claim 17, wherein said diamond-like carbon layer is formed using a gas containing carbon element 10 therein.
21. A process in claim 18, wherein said diamond-like carbon layer is formed using a gas containing carbon element therein.
is
22. A process in claim 20, wherein said gas is one selected from a group consisting of CH4, C2H6, C2H2 and C3H8.
23. A process in claim 21, wherein said gas is one selected from a group consisting of CH4,C2H6, C2H2 and C3He.
24. A process in claim 14, wherein said diamond-like carbon layer is formed at 25'C through 40CC.
25. A process for forming a thin film transistor on a substrate, comprising the steps of:
forming a gate electrode on said substrate; forming a gate insulating layer comprising a diamond like carbon layer, on said substrate including said gate electrode; forming an active layer on said gate insulating layer; and forming a source electrode on a part of said active layer; and forming a drain electrode separated from said source electrode on the same plane as said source electrode.
26. A process in claim 25, wherein said active layer is of one selected from a group consisting of amorphous silicon, polysilicon, hydrogenated amorphous silicon and compound semiconductor.
27. A process in claim 25, further comprising the step of forming a silicon nitride layer on said diamond-like carbon layer before forming said active layer.
28. A process in claim 26, further comprising the step of forming a silicon nitride layer on said diamond-like carbon layer before forming said active layer.
25.'
29. A process for forming a thin film transistor on a substrate, comprising the steps of:
26 f orming substrate; forming a drain electrode separated from said source electrode, on the same plane as said source electrode; forming an active layer on said substrate including said source electrode and said drain electrode; forming a gate insulating layer comprising a diamond like carbon layer, on said active layer; and forming a gate electrode on said gate insulating layer.
a source electrode on a part of said
30. A process in claim 29, wherein said active layer is of one selected from a group consisting of amorphous silicon, polysilicon, hydrogenated amorphous silicon and compound semiconductor.
is
31. A process in claim 29, further comprising the step of forming a silicon nitride layer on said active layer before forming said diamondlike carbon layer.
32. A process for forming a thin film transistor on a substrate, comprising the steps of: forming an active layer on said substrate; forming a source electrode on a part of said active layer; forming a drain electrode separated from said source 27 l electrode, on the same plane as said source electrode; forming a gate insulating layer between said source electrode and said drain electrode, on another part of said active layer, said gate insulating layer comprising diamond-like carbon layer; and forming a gate electrode on layer.
gate insulating
33. A process in claim 32, wherein said active layer is of one selected from a group consisting of amorphous silicon, polysilicon, hydrogenated amorphous silicon and compound semiconductor.
34. A process in claim 32, further comprising the step of forming a silicon nitride layer on said active layer before forming said diamond-like carbon layer.
28
GB9724618A 1996-11-27 1997-11-20 Gate insulating layer having diamond-like carbon and thin film transistor employing the same and process for manufacturing gate insulating layer Expired - Lifetime GB2319660B (en)

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KR100272260B1 (en) 2000-11-15
JPH10294468A (en) 1998-11-04
GB2319660B (en) 2001-10-24
GB9724618D0 (en) 1998-01-21

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