GB2316785A

GB2316785A - Analog multiplier

Info

Publication number: GB2316785A
Application number: GB9718459A
Authority: GB
Inventors: Katsuji Kimura
Original assignee: NEC Corp
Current assignee: NEC Corp
Priority date: 1996-08-30
Filing date: 1997-08-29
Publication date: 1998-03-04
Anticipated expiration: 2017-08-29
Also published as: GB2316785B; JP2956609B2; JPH1074232A; GB9718459D0

Abstract

A bipolar four-quadrant multiplier includes a first differential pair Q 1 , Q 2 connected to a constant current source and having output terminals, a second differential pair Q 3 , Q 4 connected to a constant current source and having output terminals cross-connected to the output terminals of the first differential pair, a third differential pair Q 5 , Q 6 having output terminals, and a pair of constant current sources connected as loads respectively to the output terminals of the third differential pair, for supplying currents to the constant current sources connected to the first differential pair and the second differential pair. The bipolar four-quadrant multiplier is suitable for incorporation in a bipolar semiconductor integrated circuit, has excellent frequency characteristics, and is capable of low-voltage operation.

Description

MULTIPLIER The present invention relates to a multiplier for multiplying two analog signals, and more particularly to a linearized fully four-quadrant multiplier suitable for incorporation in a bipolar semiconductor integrated circuit.

One conventional bipolar folded multiplier is disclosed in Japanese laid-open patent publication No. 5-46792, for example.

Prior to describing the disclosed conventional bipolar folded multiplier, a bipolar transistor model will first be described below.

The relationship between a collector current and a base-to-emitter voltage of a transistor, if it is assumed to be in accord with an exponential law, is expressed by the following equation:

where IS represents a saturated current and VT a thermal voltage indicated by VT = kT/q where q is a unit electron charge, k the Boltzmann's constant, and T absolute temperature.

While the transistor is operating normally with the base-to-emitter voltage VBEi being of about 600 mV, the exponential part exp(VBEi/VT) is substantially of a value equal to the power of 10, and the term "- 1" is negligible. Therefore, the relationship between the collector current and the baseto-emitter voltage is given as follows:

Operation of the conventional bipolar folded multiplier disclosed in Japanese laid-open patent publication No. 5-46792 will be described below with reference to Fig. 1 of the accompanying drawings.

As shown in Fig. 1, the bipolar folded multiplier comprises a pair of npn-type differential transistors Ql, Q2 having emitters connected in common to a constant current source 1o and bases between which a first input signal voltage Vx is applied, a pair of npn-type differential transistors Q3, Q4 having emitters connected in common to a constant current source 1o and bases between which the first input signal voltage Vx is applied, and a pair of pnp-type differential transistors Q5, Q6 having collectors connected respectively to the emitters of the differential transistors Q1, Q2. and the emitters of the differential transistors Q3, Q4 and bases between which a second input signal voltage Vy is applied. The differential transistors Q1, Q3 have respective collectors connected (cross-connected) in common to a power supply Vcc through a load resistor RL, and the differential transistors Q2, Q4 have respective collectors connected (cross-connected) in common to the power supply Vcc through a load resistor RL.

The cross-connected pairs of differential transistors Q1, Q2 and Q3, Q4 produce a differential output current (I expressed by the following equation (3):

where Ic5 1C6 represent collector currents of the respective transistors Q5, Q6. The collector currents Ic5, IC6 are given by the following equations (4), (5), respectively:

The differential output current (I expressed by the equation (3) is expressed by the equation (6) given below, and provides the same transfer function as a Gilbert cell disclosed in US patent No. 3,241,078, for example. Thus, a bipolar four-quadrant analog multiplier is provided.

For analog signal processing, a multiplier is an indispensable function block. Recently, there has been a demand for low-voltage operation multipliers.

The conventional bipolar folded multiplier shown in Fig.

1 has limited frequency characteristics and fails to provide high-frequency characteristics because of the frequency characteristics of the pnp-type transistors that are employed to allow signals to pass through the npn-type transistors.

It is therefore an object of at least the preferred embodiment of the present invention to provide a bipolar multiplier which is capable of low-voltage operation without sacrificing high-frequency characteristics for analog signal processing.

In a first aspect, the present invention provides a multiplier comprising a first differential pair connected to a constant current source and having output terminals, a second differential pair connected to a constant current source and having output terminals cross-connected to the output terminals of the first differential pair, a third differential pair having output terminals, and a pair of constant current sources connected as loads respectively to the output terminals of the third differential pair, for supplying currents to the constant current sources connected to the first differential pair and the second differential pair.

In a second aspect, the present invention provides a bipolar multiplier comprising a first pair of differential transistors of a first conductivity type having respective emitters connected in common to a first constant current source and respective bases between which a first input signal voltage is appliable, a second pair of differential transistors of the first conductivity type having respective emitters connected in common to a second constant current source and respective bases between which the first input signal voltage is appliable, said differential transistors of the first and second pairs having collectors cross-connected through junctions connected through load elements to a power supply, and a third pair of differential transistors of the first conductivity type having respective emitters connected in common to a third constant current source, respective bases between which a third input signal voltage can be applied, and respective collectors connected respectively to fourth and fifth constant current sources for supplying currents to the emitters of the differential transistors of the first and second pairs.

Preferred features of the present invention will now be described, purely by way of example only, with reference to the accompanying drawings, in which: Fig. 1 is a circuit diagram of a conventional four-quadrant multiplier; and Fig. 2 is a circuit diagram of a preferred embodiment of a multiplier.

As shown in Fig. 2, a bipolar multiplier comprises a first pair of npn-type differential transistors Q1, Q2 having emitters connected in common to a first constant current source I, and bases between which a first input signal voltage Vx is applied, and a second pair of npn-type differential transistors Q3, Q4 having emitters connected in common to a second constant current source I, and bases between which the first input signal voltage Vx is applied. The differential transistors Q1, Q2 of the first pair and the differential transistors Q3, Q4 of the second pair have respective collectors cross-connected through load resistors RL to a power supply Vcc. The bipolar multiplier also has a third pair of differential transistors Q5, Q6 having emitters connected in common to a third constant current source lo, bases between which a second input signal voltage Vy is applied, and collectors connected respectively to fourth and fifth constant current sources Io. From the junctions between the collectors of the differential transistors Q5, Q6 and the fourth and fifth constant current sources 1o, currents I1, I2 flow to the common junctions between the emitters of the differential transistors Q1, Q2 of the first pair and the differential transistors Q3, Q4 of the second pair.

The differential transistors Q5, Q6 whose loads are the fourth and fifth constant current sources Io are capable of producing opposite-phase output currents. Since the differential output currents produced by the differential transistors QS, Q6 are supplied to the two constant current sources 1o of the cross-connected first and second pairs of differential transistors Q1, Q2 and Q3, Q4, drive currents for these cross-connected first and second pairs of differential transistors Q1, Q2 and Q3, Q4 are equalized to the output currents from the differential transistors Q5, Q6 of the third pair.

Therefore, the bipolar multiplier is equivalent to a Gilbert cell.

Details of the bipolar multiplier will be described below.

As shown in Fig. 2, the first input signal voltage Vx is applied to the cross-connected pairs of differential transistors Ql, Q2 andQ3, Q4, and the second input signal voltage is applied to the pair of differential transistors Q5, Q6.

A differential output current (I of the cross-connected pairs of differential transistors Q1, Q2 and Q3, Q4, i.e., the difference between a current flowing through the junction between the differential transistors Q1, Q3 and a current flowing through the junction between the differential transistors Q2, Q4, is given by the following equation (7):

The currents I1, I2 are expressed respectively by the following equations (8), (9):

Therefore, the differential output current (I according to the equation (7) is expressed by the following equation (10), providing the same transfer function as a Gilbert cell:

Thus, a bipolar four-quadrant analog multiplier is provided.

Power supplies VLs shown in Fig. 2 are used for level shifting.

As can be seen from Fig. 2, since no pnp-type transistors are used for signal path, the frequency characteristics of the bipolar multiplier are prevented from being degraded. The bipolar multiplier is capable of operating at a low voltage of 1 V, for example, for the reason that currents are folded by the constant current sources.

The preferred embodiment of the present invention offers the following advantages: (1) A four-quadrant multiplier of excellent frequency characteristics is provided because no pnp-type transistors are used for signal passes.

(2) A bipolar multiplier capable of operating at a low voltage of 1 V, for example, is provided for the reason that currents are folded by the constant current sources.

It is to be understood that variations and modifications of the cross-connection devices disclosed herein will be evident to those skilled in the art. It is intended that all such modifications and variations be included within the scope of the appended claims.

Each feature disclosed in this specification (which term includes the claims) and/or shown in the drawings may be incorporated in the invention independently of other disclosed and/or illustrated features.

The text of the abstract filed herewith is repeated here as part of the specification.

A bipolar four-quadrant multiplier includes a first differential pair connected to a constant current source and having output tenninals, a second differential pair connected to a constant current source and having output terminals cross-connected to the output terminals of the first differential pair, a third differential pair having output terminals, and a pair of constant current sources connected as loads respectively to the output terminals of the third differential pair, for supplying currents to the constant current sources connected to the first differential pair and the second differential pair. The bipolar four-quadrant multiplier is suitable for incorporation in a bipolar semiconductor integrated circuit, has excellent frequency characteristics, and is capable of low-voltage operation.

Claims

1. A multiplier comprising: a first differential pair connected to a constant current source and having output terminals; a second differential pair connected to a constant current source and having output terminals cross-connected to the output terminals of said first differential pair; a third differential pair having output terminals; and a pair of constant current sources connected as loads respectively to the output terminals of said third differential pair, for supplying currents to the constant current sources connected to said first differential pair and said second differential pair.

2. A multiplier according to Claim 1, wherein said differential pairs comprise bipolar transistors.

3. A bipolar multiplier comprising; a first pair of differential transistors of a first conductivity type having respective emitters connected in common to a first constant current source and respective bases between which a first input signal voltage is appliable; a second pair of differential transistors of the first conductivity type having respective emitters connected in common to a second constant current source and respective bases between which the first input signal voltage is appliable; said differential transistors of the first and second pairs having collectors cross-connected through junctions connected through load elements to a power supply; and a third pair of differential transistors of the first conductivity type having respective emitters connected in common to a third constant current source, respective bases between which a third input signal voltage can be applied, and respective collectors connected respectively to fourth and fifth constant current sources for supplying currents to the emitters of the differential transistors of the first and second pairs.

4. A bipolar multiplier according to Claim 3, wherein said collectors of the differential transistors of the third pair are connected through respective level shifting power supplies to the emitters of the differential transistors of the first and second pairs.

5. A multiplier or bipolar multiplier substantially as herein described with reference to and as shown in Figure 2 of the accompanying drawings.