GB2313238A - Antenna booster mixer circuit - Google Patents

Description

2313238 ANTENNA BOOSTERMIXER CIRCUIT This invention relates to an antenna

boostermixer circuit incorporated into and used in a video tape recorder, and particularly to an antenna booster-mixer circuit capable of transmitting a signal received by an antenna between antenna input and output terminals even if a power supply for a video tape recorder is turned off.

In the present European television broadcasting system, broadcast signals propagated in respective channels have been broadcast using a UHF band. When it is desired to receive such broadcast signals by providing connections to a video tape recorder, a television antenna is normally connected to an antenna input terminal of the video tape recorder and an antenna output terminal of the video tape recorder is electrically connected to an input terminal of a television receiver so that the broadcast signals are received by the television receiver.

In this case, an antenna booster-mixer circuit has been incorporated into the video tape recorder.

The antenna booster-mixer circuit has at least one booster amplifier for amplifying a signal received by the antenna, an antenna input terminal, an antenna output terminal, etc.

Further, when a television signal is received by the antenna connected to the antenna input terminal and the received television signal is displayed on the television receiver as a received image, the antenna booster-mixer circuit turns on a power supply for the video tape recorder to bring the booster amplifier into an operating state. Next, the booster amplifier, which has been placed in the operating state, amplifies the received television signal and thereafter supplies it to the television receiver through the antenna output terminal. On the other hand, when the television signal is received by the antenna and the received television signal is recorded in the video tape recorder, the antenna booster-mixer circuit turns on the power supply for the video tape recorder to bring the booster amplifier into the operating state. Next, the booster amplifier, which has been brought into the operating state, amplifies the received television signal. Thereafter, the amplified signal is caused to branch to a tuner of the video tape recorder to supply it to the tuner thereof, where a desired image signal or the like is demodulated and extracted from the amplified signal, whereby the resultant image signal is recorded in the video tape recorder. When it is desired to play back the image signal or the like, which has been recorded in the video tape recorder and display the played-back signal on the television receiver as a received image, the playedback signal is applied to a mixer stage through a highfrequency modulator so as to be formed as a signal equivalent to the television signal, followed by supply to the television receiver.

Fig. 7 is a schematic configurational diagram showing the relationship of connection between a known receiving device used to receive a broadcast signal based on the European television broadcasting system, i.e., a video tape recorder and a television receiver. Fig. 8 is a diagram showing an internal configuration of the video tape recorder shown in Fig. 7. In Fig. 8, Fig. 8A is a block configurational diagram showing the relationship of an arrangement or layout and electrical connections between both an antenna booster-mixer circuit and the video tape recorder and the television receiver. Fig. 8B is a circuit diagram illustrating a specific internal configuration of the antenna booster-mixer circuit shown in Fig. 8A.

As shown in Fig. 7 and Figs. 8A and 8B, a video tape recorder (VTR) 41 has an antenna input 3- terminal 53, an antenna output terminal 54, an antenna booster-mixer circuit 42 and a recording playback circuit 43. An antenna 44 is electrically connected to the antenna input terminal 53 and an antenna input terminal 55 of a television receiver 45 is electrically connected to the antenna output terminal 54. Each of the antenna booster-mixer circuits 42 has a first coupling capacitor 56, a first booster amplifier 46, a first inductor 57, a first splitter 47, a second booster amplifier 48, a second inductor 58, a second splitter 49, a second coupling capacitor 59 and a high-frequency (RF) modulator 50. Each of the recording playback circuits 43 has a recording playback unit 51 and a tuner 52.

On the antenna booster-mixer circuit 42 side, each of the first booster amplifiers 46 has an input electrically connected to the antenna input terminal 53 through the first coupling capacitor 56 and an output electrically connected to an input of the first splitter 47. Each of the first splitters 47 has one output electrically connected to an input of the second booster amplifier 48, and the other output electrically connected to an input of the tuner 52 on the recording playback circuit 43 side. Each of the second splitters 49 has one input electrically connected to an output of the second booster amplifier 48, the other input electrically connected to an output of the high-frequency modulator 50, and an output electrically connected to the antenna output terminal 54 through the second coupling capacitor 59. An input of the high-frequency modulator 50 is electrically connected to an output of the recording playback unit 51 on the recording playback circuit 43 side. A power supply of the first booster amplifier 46 is electrically connected to a power terminal 60 through the first inductor 57 and a power supply of the second booster amplifier 48 is electrically connected to the power terminal 60 through the second inductor 58. on the recording playback circuit 41 side, an input of the recording playback unit 51 is electrically connected to an output of the tuner 52.

The antenna booster-mixer circuit 42 constructed as described above is activated as follows:

A power supply of the video tape recorder 41 is first turned on so that the source voltages of the first and second booster amplifiers 46 and 48 are supplied to the power terminal 60. When a received television signal is now received by the television receiver 45 as an image, the signal received by the antenna 44 is supplied via the first coupling capacitor 56 from the antenna input terminal 53 to the first booster amplifier 46 in the antenna booster-mixer circuit 42. Next, the received signal is amplified by the first booster amplifier 46, followed by supply to the first splitter 47 where the signal is split into two. One of the split signals is supplied to the second booster amplifier 48 where it is amplified. Thereafter, the amplified signal is supplied to the second coupling capacitor 59 through the second splitter 49, followed by supply to the antenna input terminal 55 of the television receiver 45 where it is received as an image. When it is desired to record the received signal in the video tape recorder concurrently with the image reception of the received signal by the television receiver 45, or when the received signal is recorded in the video tape recorder 41 irrespective of the image reception of the received signal by the television receiver 45, the tuner 52 in the recording playback circuit 43 effects frequency conversion and demodulation on the other of the signals split by the first splitter 47 so as to be converted into an image signal suitable for recording when the tuner 52 receives the other thereof therein, followed by supply to the recording playback unit 51 where the image signal is recorded. Next, when it is desired to play back the image signal which has already been recorded in the recording playback unit 51 of the recording playback circuit 43 and receive the played-back image signal by the television receiver 45, the high-frequency modulator 50 in the antenna booster-mixer circuit 42 effects modulation and frequency conversion on the played-back signal so as to be converted into a received signal suitable for a television signal when the image signal is played back by the recording playback unit 51. The converted received signal is supplied to the second coupling capacitor 59 through the second splitter 49, followed by supply to the antenna input terminal 55 of the television receiver 45, where it is received as an image.

Thus, the known antenna booster-mixer circuit 42 constructed as described above can perform the three functions of supplying the television received signal to the television receiver 45 where it is received as the image, supplying the television received signal to the video tape recorder 41 where it is recorded, and supplying the signal played back by the video tape recorder 41 to the television receiver 45 where it is received as the image.

The known antenna booster-mixer circuit 42 has a problem in that since the power supplies of the first and second booster amplifiers 46 and 48 are not turned on unless the power supply of each of the first and second booster amplifiers 46 and 48 is commonly used as the power supply of the video tape recorder 41, i.e., the power supply of the video tape recorder 41 is turned on, the received signal cannot be displayed on the television receiver 45 as the image.

This is because although the splitter for splitting the received signal into others is normally incorporated into the video tape recorder 41, since the received signal is greatly attenuated in the splitter and the electric field of the received broadcast signal in the UHF band is not so great, the first and second booster amplifiers 46 and 48 are interposed in the antenna booster-mixer circuit 42 to compensate for the great attenuation of the received signal, thereby improving the quality of the displayed image.

on the other hand, the known antenna boostermixer circuit 42 has a problem in that since it is necessary to hold on the power supply of the video tape recorder 41 even when only the television receiver 45 is activated as described above, unnecessary power is consumed in the video tape recorder 41 and this inconvenience is undesired under any circumstances in terms of energy saving.

With the foregoing in view, it is therefore an object of the present invention to provide an antenna booster-mixer circuit capable of transmitting a received signal without its great attenuation even if a power supply of a video tape recorder is not turned on upon non-use of the video tape recorder, and thereby avoiding unnecessary power consumption. According to an aspect of the present invention, for achieving the above object, there is provided an antenna booster-mixer circuit -ncorporated into a video tape recorder, comprising: an antenna input terminal; an antenna output terminal; at least one booster amplifier electrically connected between the antenna input terminal and the antenna output terminal and using a power supply in common with the video tape recorder; and a signal by-pass circuit electrically connected in parallel with the booster amplifier, and wherein when the power supply of the video tape recorder is turned on, a signal received by an antenna, which has been supplied to the antenna input terminal, is transmitted to the antenna output terminal from the booster amplifier, whereas when the power supply of the video tape recorder is turned off, the received signal supplied to the antenna input terminal is outputted from the antenna output terminal through the signal by-pass circuit. According to the above aspect of the present -9 invention, the antenna booster-mixer circuit includes at least one booster amplifier whose power supply is turned on and off in response to the turning on and off of the power supply for the video tape recorder, and the signal by-pass circuit electrically connected in parallel with the booster amplifier. When the power supply of the video tape recorder is turned on upon recording or playing back the received signal with the video tape recorder, a signal transmission path of the antenna boostermixer circuit is switched to its corresponding booster amplifier. At this time, the received signal supplied to the antenna input terminal is amplified by the booster amplifier and thereafter subjected to desired signal processing so as to be converted into an image signal. The image signal is supplied to a recording playback circuit of the video tape recorder, where it is recorded. Alternatively, after the image signal recorded in the recording playback circuit has been played back, it is subjected to the desired image signal processing so as to be converted into the received signal and the received signal is supplied via the antenna output terminal to a television receiver where it is played back as the image. On other hand, when the power supply of the video tape recorder is turned off when only the reception of the signal is performed, the signal transmission path of the antenna booster-mixer circuit is switched to the signal by-pass circuit. At this time, the received signal supplied to the antenna input terminal is sent directly to the antenna output terminal through the signal by-pass circuit and thereafter supplied via the antenna output terminal to the television receiver where it is reproduced as the received image.

Thus, according to the above aspect of the present invention, the antenna booster-mixer circuit can be obtained which is capable of supplying the received signal to the television receiver through the antenna boostermixer circuit without producing a large transmission loss in the television received signal even if the power supply of the antenna booster-mixer circuit is not turned on when the signal is not recorded or played back by the video tape recorder, i.e., when only the reception of the signal is carried out, and thereby avoiding unnecessary power consumption.

Typical ones of various inventions of the present application have been shown in brief. However, the various inventions of the present application and specific configurations of these inventions will be understood from the following description.

7543GB Embodiments of the invention will now be described, by way of example only, with reference to the accompanying drawings, in which:

Fig. 1 is a block diagram showing the relationship of an arrangement and electrical connections between an antenna booster-mixer circuit of the present invention, a video tape recorder and a television receiver; Fig. 2 is a circuit configurational diagram showing a first embodiment of an antenna booster-mixer circuit according to the present invention; Fig. 3 is a circuit configurational diagram illustrating a second embodiment of an antenna boostermixer circuit according to the present invention; Fig. 4 is a circuit configurational diagram depicting a third embodiment of an antenna booster-mixer circuit according to the present invention; Fig. 5 is a view for describing the states of respective components employed in the first and second embodiments shown in Figs. 1 and 2, the states of which are represented in the form of lists upon reception, recording and reproduction; Fig. 6 is a diagram showing drain voltage/current characteristics corresponding to gate-to-source voltages of N channel FETs respectively employed in first and second selector switches; Fig. 7 is a configurational diagram illustrating the relationship of electrical connections between a video tape recorder, a television receiver and an antenna employed in an European television broadcasting receiver; and Fig. 8 is a circuit configurational diagram showing one example of an antenna booster-mixer circuit in the video tape recorder illustrated in Fig. 7.

Preferred embodiments of the present invention will hereinafter be described in detail with reference to the accompanying drawings.

Fig. 1 is a block diagram showing the relationship of an arrangement or layout and electrical connections between an antenna boostermixer circuit of the present invention, a video tape recorder and a television receiver. Fig. 2 is a circuit configurational diagram illustrating a first embodiment of an antenna booster-mixer circuit according to the present invention.

As shown in Figs. 1 and 2, each of video tape recorders (VTR) 1 comprises an antenna booster-mixer circuit 2, a recording playback or reproducing circuit 3, an antenna input terminal 14 and an antenna output terminal 15. An antenna 4 is electrically connected to the antenna input terminal 14 and an antenna input terminal 18 of a television receiver 5 is electrically connected to the antenna input terminal 15. Each of the antenna booster-mixer circuits 2 shown in Figs. 1 and 2 includes a first coupling capacitor 19, a first selector switch 6, a first buffer resistor 21, a second coupling capacitor 20, a first booster amplifier 7, a first inductor 22, a first splitter 8, a second booster amplifier 9, a second inductor 23, a second splitter 10, a third coupling capacitor 24, a second buffer resistor 25, a second selector switch 11, a fourth coupling capacitor 26, a signal by-pass circuit 12 and a highfrequency (RF) modulator 13. The recording playback circuit 3 has a recording playback unit 16 and a tuner 17. Further, the first selector switch 6 includes a first switching N channel FET 6(1), a first switching diode 6(2) and a first resistor 6(3), and the second selector switch 11 has a second switching N channel FET 11(1), a second switching diode 11(2) and a third resistor 11(3), respectively. The first splitter 8 comprises a first split portion 8(1) and the second splitter 10 comprises a second split portion 10(1). Each of the signal by-pass circuits 12 has a first high resistor 12(1), a second high resistor 12(2), a fifth coupling capacitor 12(3), a sixth coupling capacitor 12(4), a fifth resistor 12(5) and a by-pass diode 12(6).

On the antenna booster-mixer circuit 2 side, the first selector switch 6 has an input which is electrically connected to the antenna input terminal 14 through the first coupling capacitor 19, a first output which is electrically connected to both an input of the first booster amplifier 7 through the second coupling capacitor 20 and a power terminal 27 through the first buffer resistor 21, and a second output which is electrically connected to an input of the signal by-pass circuit 12, respectively. The first booster amplifier 7 has an output which is electrically connected to an input of the first splitter 8, and a power supply which is electrically connected to the power terminal 27 through the first inductor 22, respectively. The first splitter 8 has one output which is electrically connected to an input of the second booster amplifier 9 and the other output which is electrically connected to an input of the tuner 17 on the recording playback circuit 3 side, respectively. The second booster amplifier 9 has an output which is electrically connected to one input of the second splitter 10, and a power supply which is electrically connected to the power terminal 27 through the second inductor 23, respectively. The second splitter 10 has other input electrically connected to an output of the high-frequency modulator 13 and an output electrically connected to an input of the second selector switch 11 through the third coupling capacitor 24. The second selector switch 11 has a first input which is electrically connected to the power terminal 27 through the second buffer resistor 25, a second input which is electrically connected to an output of the signal bypass circuit 12 and an output which is electrically connected to the antenna output terminal 15 through the fourth coupling capacitor 26, respectively. The highfrequency modulator 13 has an input electrically connected to the output of the recording playback unit 16 on the recording playback circuit 3 side.

In the first selector switch 6, the source of the first switching FET 6(1) is electrically connected to the first coupling capacitor 19, the cathode of the first switching diode 6(2) and one end of the first resistor 6(3), the gate thereof is electrically connected to the other end of the first resistor 6(3) and ground, and the drain D thereof is electrically connected to an input of the signal bypass circuit 12. The anode of the first switching diode 6(2) is electrically connected to the second coupling capacitor 20. In the second selector switch 11, the source of the second switching FET 11(1) is electrically connected to the fourth coupling capacitor 26, the cathode of the second switching diode 11(2) and one end of the third resistor 11(3), the gate thereof is electrically connected to the other end of the third resistor 11(3) and ground, and the drain thereof is electrically connected to the output of the signal by-pass circuit 12, respectively. The anode of the second switching diode 11(2) is electrically connected to the third coupling capacitor 24. In the signal by-pass circuit 12, the first high resistor 12(1) has one end which is electrically connected to the input of the signal by-pass circuit 12 and to the anode of the by-pass diode 12(6) through the fifth coupling capacitor 12(3), and the other end which is electrically connected to ground, respectively. The anode of the by-pass diode 12(6) is electrically connected to the power terminal 27 through the fifth resistor 12(5) and to one end of the second high resistor 12(2) through the sixth coupling capacitor 12(4), and the cathode thereof is electrically connected to ground, respectively. The second high resistor 12(2) has one end which is electrically connected to the output of the signal by-pass circuit 12 and the other end which is electrically connected to ground, respectively. In this case, the first switching N channel FET 6(1) employed in the first selector switch 6 and the second switching N channel FET 11(1) employed in the second selector switch 11 respectively have characteristics shown in Fig. 6. Namely, both FETs respectively have a characteristic in which when a drain voltage (VD) is gradually increased, a drain current (ID) increases in proportion to the drain voltage during a period in which the drain voltage (VD) is low. Further, both FETs respectively have a characteristic in which when the drain voltage (VD) becomes greater than the increased point, the value of the drain current (%) becomes constant according to the value of a gate-to- source voltage (VGS), i.e., a characteristic in which when the gate-to- source voltage (VGS) is 0, the constant value of the drain current (%) reaches the maximum and as the value of the gate-to-source voltage (VGS) becomes negative, the constant value of the drain current (%) is sequentially rendered low.

Further, the input of the recording playback unit 16 is electrically connected to the output of the tuner 17 on the recording playback circuit 3 side.

The antenna booster-mixer circuit 2 according to the present embodiment is operated in the following manner under the above-described configuration.

When a receive signal received by the antenna 4 in a state in which a power source or supply for the video tape recorder 1 has been turned off, is first sent to the television receiver 5 through the antenna boostermixer circuit 2 (hereinafter called 99upon reception"), the first and second switching diodes 6(2) and 11(2) of the first and second selector switches 6 and 11 are turned off because the power terminal 27 is not supplied with a source voltage. When the first and second switching diodes 6(2) and 11(2) are turned off, the gate-to-source voltages (VGS) of the first and second switching FETs 6(1) and 11(1) are respectively biased to zero. In the first and second switching diodes 6(2) and 11(2) at this time, the value of the drain current (%) reaches the maximum when the gate-to-source voltage (VGS) is biased to zero as represented by the characteristic of Fig. 6, for example. Namely, the first and second switching FETs 6(1) and 11(1) are turned on so that the first and second selector switches 6 and 11 are switched to the signal by-pass circuit 12. When the signal received by the antenna 4 is now supplied to the antenna input terminal 14 of the antenna booster-mixer circuit 2, the received signal is supplied to the antenna output terminal 15 through the first selector switch 6, the signal bypass circuit 12 and the second selector switch 11 because the first and second selector switches 6 and 11 have already been switched to the signal by-pass circuit 12. Next, the received signal is supplied to the antenna input terminal 18 of the television receiver 5 so that the received signal is reproduced or played back as an image by the television receiver 5. Since no source voltage is supplied to the power terminal 27 and the by-pass diode 12(6) in the signal by-pass circuit 12 is in an off state in this case, the received signal supplied to the input of the signal by-pass circuit 12 is transmitted to the output of the signal bypass circuit 12 in a state of having a small signal loss through the fifth coupling capacitor 12(3) and the sixth coupling capacitor 12(4).

Next, when the recording playback circuit 3 in the video tape recorder 1 is used to record the signal received by the antenna 4 as an image signal (hereinafter called "upon recording"), or when the image signal recorded in the recording playback circuit 3 is played back and the played-back signal is supplied to the television receiver 5 as an imagereceived signal (hereinafter called "upon playback"), the power supply of the video tape recorder 1 is turned on to supply the source voltage to the power terminal 27 of the antenna booster-mixer circuit 2. At this time, a forward bias voltage (positive voltage) is applied across.each of the first and second switching diodes 6(2) and 11(2) of the first and second selector switches 6 and 11 as an anode- tocathode voltage (VAK) owing to the supply of the source voltage to the power terminal 27. Therefore, the first and second switching diodes 6(2) and 11(2) are respectively brought into an on state. As a result, the first and second switching FETs 6(1) and 11(1) are activated in such a manner that as the negative bias value of the gateto-source voltage (VGS) increases, the value of the drain current is considerably reduced as represented by the characteristic shown in Fig. 6, for example. Since the gate-to-source voltage (VGS) varies according to the selection of resistance values of the first buffer resistor 21 and the first resistor 6(3), the resistance values of the first buffer resistor 21 and the first resistor 6(3) are selected so that the gate-to-source voltage (VGS) increases in a possible negative direction. If the selection referred to above is done, then the first and second switching FETs 6(1) and 11(1) are turned off so that the first and second selector switches 6 and 11 are respectively switched to the first and second booster amplifiers 7 and 9.

Since the first and second selector switches 6 and 11 are respectively switched to the first and second booster amplifiers 7 and 9 when the signal received by the antenna 4 is supplied to the antenna input terminal 14 of the antenna booster-mixer circuit 2 upon recording, the received signal is supplied from the first selector switch 6 to the first booster amplifier 7 and the first splitter 8 where the signal is split into two. Thereafter, one received signal split by the first splitter 8 is supplied to the antenna output terminal 15 through the second booster amplifier 9, the second splitter 10 and the second selector switch 11. Next, the signal is supplied to the antenna input terminal 18 of the television receiver 5 where the received signal is played back as a received image. Simultaneously with this, the other received signal split by the first splitter 8 is supplied to the tuner 17 on the recording playback circuit 3 side, where the received signal is subjected to frequency conversion and demodulation so as to be converted into an image signal suitable for recording, after which the image signal is supplied to the recording playback unit 16 where the image signal is recorded.

When the image signal is played back by the recording playback unit 16 in the recording playback circuit 3 upon playback, the image signal is subjected to modulation and frequency conversion in the high-frequency modulator 13 of the antenna booster- mixer circuit 2 so as to be converted into a received signal fit for a television signal. The converted received signal is supplied from the second splitter 10 to the antenna outputterminal 15 through the second selector switch 11, followed by supply to the antenna input terminal 18 of the television receiver 5, after which the received signal is reproduced as a received image by the television receiver 5.

Thus, according to the antenna booster-mixer circuit 2 of the first embodiment, the received signal can be supplied to the television receiver 5 through the signal by-pass circuit 12 without producing a large transmission loss in the received signal even if the power supply of the video tape recorder 1 is in an off state and the power is not supplied to the antenna booster-mixer circuit 2, and unnecessary power consumption is not produced.

According to the antenna booster-mixer circuit 2 of the first embodiment, intermodulation distortion can be improved as compared with a conventional antenna booster-mixer circuit shown in Fig. 8B.

Next, Fig. 3 is a circuit configurational diagram showing a second embodiment of an antenna booster-mixer circuit according to the present invention. In the second embodiment, the circuit configurations of the first and second selector switches 6 and 11 employed in the first embodiment are partially changed.

In Fig. 3, the same elements of structure as those shown in Fig. 2 are identified by like reference numerals and their description will therefore be omitted.

As shown in Fig. 3, a first switching FET 6(1) in a first selector switch 6 is electrically connected to ground through a second resistor 6(4) as an alternative to the direct connection of the gate of the first switching FET 6(1) employed in the first embodiment to ground. Further, a second switching FET 11(1) in a second selector switch 11 is electrically connected to ground through a fourth resistor 11(4) in the same manner as the first switching FET 6(1) as an alternative to the direct connection of the gate of the second switching FET 11(1) employed in the first embodiment to ground.

Since the second embodiment constructed as described above is substantially identical in operation to the already-described first embodiment even upon any of reception, recording and playback, the operation of the second embodiment will not be described in detail.

In this case, the antenna booster-mixer circuit 2 according to the second embodiment can provide a 11 to 22 dB improvement in intermodulation distortion as compared with the conventional antenna boostermixer circuit shown in Fig. 8B as well as the same operation and effects as those obtained in the first embodiment. It is thus found that the degree of improvement in intermodulation distortion becomes great even in the case where the second embodiment is compared with the first embodiment.

Next, Fig. 4 is a diagram showing a circuit configuration of a third embodiment of an antenna booster-mixer circuit 2 according to the present invention. In the third embodiment, the circuit configurations of the portions related to the first and second selector switches 6 and 11 and the signal by-pass circuit 12 employed in the first embodiment are respectively changed.

In Fig. 4, the same elements of structure as those shown in Fig. 2 are identified by like reference numerals and their description will therefore be omitted.

As shown in Fig. 4, a first selector switch 6 comprises a third switching diode 6(5) and a fourth switching diode 6(6). The first selector switch 6 has an input which is electrically connected to an antenna input terminal 14 through a first coupling capacitor 19 and to ground through a ninth resistor 28, a first output which is electrically connected to an input of a first booster amplifier 7, and a second output which is electrically connected to an input of a signal by-pass circuit 12, respectively. A second selector switch 11 comprises a fifth switching diode 11(5) and a sixth switching diode 11(6). The second selector switch 11 has a first input which is electrically connected to an output of a second splitter 10, a second input which is electrically connected to an output of the signal by-pass circuit 12 and an output which is electrically connected to an antenna output terminal 15 through a fourth coupling capacitor 26 and to ground through a tenth resistor 29, respectively. The signal by-pass circuit 12 comprises a seventh coupling capacitor 12(7), a sixth resistor 12(8), second and third bypass diodes 12(9) and 12(10), a seventh resistor 12(11), a smoothing capacitor 12(12) and an eighth resistor 12(13). In the first selector switch 6, the anode of the third switching diode 6(5) is electrically connected to the first booster amplifier 7 and the cathode thereof is electrically connected to the first coupling capacitor 19 and the cathode of the fourth switching diode 6(6), respectively. The anode of the fourth switching diode 6(6) is electrically connected to the input of the signal bypass circuit 12. In the second selector switch 11, the anode of the fifth switching diode 11(5) is electrically connected to the second splitter 10 and the cathode thereof is electrically connected to the fourth coupling capacitor 26 and the cathode of the sixth switching diode 11(6), respectively. The anode of the sixth switching diode 11(6) is electrically connected to the output of the signal by-pass circuit 12. In the signal by-pass circuit 12, the seventh coupling capacitor 12(7) has one and other ends respectively electrically connected to the input and output of the signal by-pass circuit 12. The sixth resistor 12(8) has one end which is electrically connected to one end of the seventh coupling capacitor 12(7) and the other end which is electrically connected to a switching power terminal 30 for supplying a switching voltage, respectively. The anodes of the second and third by-pass diodes 12(9) and 12(10) are respectively electrically connected to one ends of the seventh resistor 12(11) and the smoothing capacitor 12(12) and the cathodes thereof are electrically connected to the other end of the seventh coupling capacitor 12(7), respectively. The other end of the seventh resistor 12(11) is electrically connected to a power terminal 27 and the other end of the smoothing capacitor 12(12) is electrically connected to ground. The eighth resistor 12(13) has one and other ends respectively electrically connected to the input and output of the signal by-pass circuit 12. Incidentally, the switching power terminal 30 is supplied with a switching voltage of positive polarity upon reception. Upon recording and playback, the switching power terminal 30 is supplied with a switching voltage corresponding to a ground potential.

Since the third embodiment constructed as described above is substantially identical in operation to the already-mentioned first embodiment even upon any of reception, recording and playback, the operation of the third embodiment will not be described in detail.

However, when a power supply for a video tape recorder 1 is in an off state, the third switching diode 6(5) in the first selector switch 6 is reversebiased so as to be turned off by the switching voltage of positive polarity at the switching power terminal 30, which is supplied through the sixth resistor 12(8), and the fourth switching diode 6(6) is biased in the forward direction so as to be turned on by the switching voltage. Therefore, the first selector switch 6 is switched to the signal by-pass circuit 12. Since the fifth switching diode 11(5) in the second selector switch 11 is biased in the reverse direction so as to be turned off by a switching voltage of positive polarity at the switching power terminal 30, which is supplied through the sixth resistor 12(8) and the eighth resistor 12(13), and the sixth switching diode 11(6) is biased in the forward direction so as to be turned on by the switching voltage, the second selector switch 11 is also switched to the signal by- pass circuit 12. Further, since the second and third by-pass diodes 12(9) and 12(10) in the signal by-pass circuit 12 are respectively reverse- biased so as to be turned off by the voltage at the power terminal 27, which is supplied through the fifth resistor 12(8) and the seventh resistor 12(13), the received signal supplied to the input of the signal by-pass circuit 12 is transmitted to the output thereof with a less signal loss through the seventh coupling capacitor 12(7).

On the other hand, when the power supply for the video tape recorder 1 is in an on state, the voltage at the switching power terminal 30, which is supplied through the sixth resistor 12(8), is brought to the ground potential, and the third switching diode 6(5) in the first selector switch 6 is biased in the forward direction so as to be turned on by the source voltage at the power terminal 27, which is supplied from the input of the first booster amplifier 7 and the fourth switching diode 6(6) in the first selector switch 6 is biased in the reverse direction so as to be turned off by the source voltage. Therefore, the first selector switch 6 is switched to the first and second booster amplifiers 7 and 9. Since the voltage at the switching power terminal 30, which is supplied through the sixth resistor 12(8) and the eighth resistor 12(13), is brought to the ground potential and the source voltage at the power terminal 27 is supplied from the output of the second booster amplifier 9 through the second splitter 10, the fifth switching diode 11(5) in the second selector switch 11 is biased in the forward direction so as to be turned on and the sixth switching diode 11(6) in the second selector switch 11 is biased in the reverse direction so as to be turned off. As a result, the second selector switch 11 is also switched to the first and second booster amplifiers 7 and 9.

According to the third embodiment as described above, the antenna boostermixer circuit 2 can be obtained in the same manner as the first embodiment, which is capable of supplying the received signal to a television receiver through the signal by-pass circuit 12 without producing a large transmission loss in the received signal even if the power supply for the video tape recorder 1 is in the off state and no power is supplied to the antenna booster-mixer circuit 2 and of preventing unnecessary power consumption from occurring.

Fig. 5 is a view for describing the states of respective components employed in the first through third embodiments, which are represented in the form of lists upon reception, recording and reproduction. Fig. 5A shows the list related to the first and second embodiments and Fig. 5B illustrates the list related to the third embodiment.

In the first and second embodiments as shown in Fig. 5A, the power supply for each of the video tape recorder 1 and the antenna booster-mixer circuit 2 is first turned on upon recording and playback and thereby the first selector switch 6 and the second selector switch 11 are both switched to the first and second booster amplifiers 7 and 9. Upon recording, the part of the received signal is supplied to and recorded in the recording playback circuit 3 of the video tape recorder 1 and the part of the remaining received signal is supplied to the television receiver 5 where it is played back as the received image. Upon playback, all of the signal reproduced by the recording playback circuit 3 is supplied to the television receiver 5 where it is played back as the received image. Further, upon reception, the power supply for each of the video tape recorder 1 and the antenna booster-mixer circuit 2 is not turned on and thereby the first selector switch 6 and the second selector switch 11 are both switched to the signal by-pass circuit 12. Thereafter, all of the received signal is supplied via the signal by-pass circuit 12 to the television receiver 5 where it is played back as the received image.

In the third embodiment as shown in Fig. 5B, the power supply for each of the video tape recorder 1 and the antenna booster-mixer circuit 2 is next turned on upon recording and playback and the switching power terminal 30 is supplied with the switching voltage corresponding to the ground potential, whereby the first selector switch 6 and the second selector switch 11 are both switched to the first and second booster amplifiers 7 and 9. Upon recording, the part of the received signal is supplied to and recoded in the recording playback circuit 3 of the video tape recorder 1 and the part of the remaining received signal is supplied to the television receiver 5 where it is played back as the received image. Upon playback, all of the signal played back by the recording playback circuit 3 is supplied to the television receiver 5 where it is reproduced as the received image. Further, upon reception, the power supply for each of the video tape recorder 1 and the antenna booster-mixer circuit 2 is not turned on and the switching power terminal 30 is supplied with the switching voltage of positive polarity, whereby the first selector switch 6 and the second selector switch 11 are both switched to the signal by-pass circuit 12. Thereafter, all of the received signal is supplied via the signal by-pass circuit 12 to the television receiver 5 where it is played back as the received image.

According to the present invention, as has been described above in detail, an antenna boostermixer circuit can be obtained which is capable of supplying a received signal to a television receiver through a signal bypass circuit of the antenna booster-mixer circuit without producing a large transmission loss in the received signal even if a power supply for a video tape recorder is in an off state and no power is supplied to the antenna booster-mixer circuit and of preventing unnecessary power consumption from occurring.

Further, according to the present invention, intermodulation distortion can be improved as compared with the conventional antenna booster-mixer circuit.

While the present invention has been described with reference to the illustrative embodiments, this description is not intended to be construed in a limiting sense. Various modifications of the illustrative embodi_..-.ents, as well as other embodiments of the invention, will be apparent to those skilled in the art on reference to this description. It is therefore contemplated that the appended claims will cover any such modifications or embodiments as fall within the true scope of the invention.

7543GB

Claims (7)

1. An antenna booster-mixer circuit incorporated into a video tape recorder, comprising: an antenna input terminal; an antenna output terminal; at least one booster amplifier electrically connected between said antenna input terminal and said antenna output terminal and using a power supply in common with said video tape recorder; and a signal bypass circuit electrically connected in parallel with said booster amplifier, and wherein when the power supply for said video tape recorder is turned on, a signal received by an antenna, which has been supplied to said antenna input terminal, is transmitted to said antenna output terminal from said booster amplifier, and when the power supply for said video tape recorder is turned off, the received signal supplied to said antenna input terminal is outputted from said antenna output terminal through said signal by-pass circuit.

2. An antenna booster-mixer circuit as claimed in Claim 1, wherein a mixer stage is electrically connected between said booster amplifier and said antenna output terminal and said mixer stage has one input which is electrically connected to an output of said booster amplifier, another input which is electrically connected to an output of a high-frequency modulator for highfrequency modulating a signal reproduced by said video tape recorder, and an output which is electrically connected to said antenna output terminal, respectively.

3. An antenna booster-mixer circuit as claimed in Claim 1 or Claim 2, wherein a selector switch for performing a switching connection to said booster amplifier or said signal by-pass circuit is electrically connected to at least one of said antenna input and output 7543GB terminals and said selector switch is selectively operated in response to an on or off state of the power supply for said booster amplifier.

4. An antenna booster-mixer circuit as claimed in Claim 3, wherein said selector switch comprises an N channel FET, a bias resistor electrically connected between the gate and source of said FET and a switching diode whose cathode is electrically connected to the source of said FET, said selector switch being activated such that the source of said FET is electrically connected to said antenna input terminal or said antenna output terminal, the anode of said diode is electrically connected to the power supply for said booster amplifier through an input or output of said booster amplifier and a buffer resistor and the drain of said FET is electrically connected to said signal by-pass circuit, respectively, and wherein when the power supply for said booster amplifier is turned on, said diode is turned on and said FET is turned off so that said selector switch is switched to said booster amplifier, whereas when the power supply for said booster amplifier is turned off, said diode is turned off and said FET is turned on so that said selector switch is switched to said signal by-pass circuit.

5. An antenna booster-mixer circuit as claimed in Claim 4, wherein said N channel FET is provided so that the gate thereof is electrically connected to ground through a gate resistor.

6. An antenna booster-mixer circuit as claimed in Claim 3, wherein said selector switch comprises two switching diodes whose cathodes are connected commonly to each other, said selector switch being activated such that the commonly-connected cathodes of said two diodes are electrically connected to said antenna input terminal or said antenna output terminal, the anode of said one diode is electrically connected to the power supply for said 7543GB booster amplifier through the input or output of said booster amplifier and the anode of said other diode is electrically connected to said signal by-pass circuit, respectively, and wherein when the power supply for said booster amplifier is turned on, one of said diodes is turned on and the other diode is turned off so that said selector switch is switched to said booster amplifier, whereas when the power supply for said booster amplifier is turned off, the other diode is turned on so that said selector switch is switched to said signal by-pass circuit.

7. An antenna booster-mixer circuit substantially as hereinbefore described with reference to, and as illustrated by, the accompanying drawings.