GB2308356A - Processing complex semiconductors - Google Patents

Abstract

A method and charge composition for obtaining Hg 1-x Cd x Te (x 0.2) single crystals and wafers with predetermined properties includes heating a vessel with a charge consisting of high-purity Cd, Hg and Te, and optionally containing indium, in a two-zone furnace in the temperature field 704-715{C; holding it for homogenisation and passing through an axial temperature gradient not exceeding 3{C/cm at a speed of 70-85 m/hour for the purpose of crystallisation. A charge for growing single crystals of A II B VI semiconductive compounds, specifically cadmium telluride, additionally includes in its composition together with cadmium and tellurium one or two elements from the group of sulphur, selenium and zinc. A method of preparing wafers of complex semiconductive materials includes polishing and washing of a group of wafers simultaneously on both sides without adhesive attachment of the wafers. Treatment is carried out in four stages: three polishing stages and one washing stage, in a special device which includes a lower driving polisher (2), an upper polisher (1) offset relative to the lower and freely rotatable, and a separator (3) disposed between them, in the aperture of which the wafers (9) are placed. Treatment of wafers of bulk single crystals, epitaxial structures and complex multi-layer heterostructures of arbitrary shape. As a result of the treatment, wafers have a mirror surface without a mechanically disturbed layer. Methods of fabricating Hg 1-x Cd x Te photosensors are also disclosed.

Description

Processing Complex Semiconductors Description The present invention relates to the field of semiconductor materials technology.

Methods are known for obtaining single crystals from: 1. K.Zanio, "Semiconductors and semimetals", vol. 13, Cadmium telluride. Eds. R.K.Willardsen and A.C.Beer, Academium Press, N.Y., 1978; and 2. "Chalcogenides of zinc, cadmium and mercury" (MISiS), No.73, Moscow, Izd-vo Metallurgiya, 1972, in which various methods are described for growing single crystals of cadmium telluride: a) from stoichiometric melts under controlled pressure of cadmium vapour; b) from melt solutions enriched with Te or Cd; c) zone melting.

An analysis of the methods shows that they make it possible to obtain block boules, in which the sizes of single crystal blocks reach 10 cm3. These contain twins, small-angle boundaries up to 20 cm~' and dislocations up to 105-106 cm2, and also micropores, which adversely affect structural perfection and make them unsuitable for fabrication of substrates. Due to the small dimensions of the single crystal blocks it is difficult to fabricate substrates of acceptable standard sizes.

A method is known (Lynch R.T., J. Appl. Phys., 1962, 33, 1009) for obtaining cadmium telluride crystals from the vapour phase. In this, a temperature gradient T ATc3 C is created between a source - stoichiometric polycrystalline cadmium telluride - and a single crystal seed. Crystal growth is accomplished from vapour transferred from the source. Cver 250-300 hours, crystals grow with a size of not more than 20x15x15 mm, most often consisting of two crystals. The crystals contain twins, chains of dislocations and micropores, and it is also impossible to obtain single crystals of large size and without small-angle boundaries.

An aim of the present invention is to obtain single crystals of cadmium telluride of large size and to increase the yield of single-crystal wafers free from small-angle boundaries and with low dislocation density, suitable for use as substrates when growing epitaxial layers of HglxCdxTe.

According to a first aspect of the present invention, there is provided a composition for growing single crystals of a II-VI semiconductor, comprising cadmium, tellurium and one or two elements selected from sulphur, selenium and zinc.

Preferably, the composition comprises 47.25#0.25 wt.% of Cd; 52.4#0.4 wt.% of Te and 0.35#0.15 wt.% of S.

Preferably, the composition comprises 47.2+0.2 wt.% of Cd; 51.5+1 wt.% of Te and 1.5#0.5 wt.% of Se.

Preferably, the composition comprises 45.6t0.5 wt.% of Cd; 0.8#0.3 wt.% of Zn and 53.4#0.1 wt.% of Te.

Preferably, the composition comprises 46.3+0.1 wt.% of Cd; 0.55#0.1 wt.% of Zn; 52.5#0.1% of Te and 0.65+0.1% of Se.

In a preferred embodiment, one or two impurity elements from the group of sulphur, selenium and zinc, are added additionally to a quartz vessel containing a charge of elementary cadmium and tellurium, for partial replacement of the main components while retaining overall charge stoichiometry.

The optimal amounts in wt.% of the individual impurity elements added to achieve the stated aim are: sulphur - 0.2-0.5 wt.% selenium - 1.0-2.0 wt.% zinc - 0.5-1.1 wt.% selenium + zinc - 0.55-0.75 wt.% + 0.45-0.65 wt.% Use of the presently proposed charge for growing single crystals of II-VI semiconductor, specifically cadmium telluride, provides the following advantages compared with the prior art: 1) with optimal values of added impurities of the group of sulphur, selenium and zinc, substrates are obtained with high structural perfection indices, induding: number of small-angle boundaries 0-1 cm-l, density of dislocations < (0.5-1.0)-105 cm-2, twins and pores absent; 2) the single crystals grown contain not more than 2-3 single crystal blocks of large size, which makes it impossible to fabricate a series of standard-size substrates; 3) the joint introduction of selenium and zinc impurities makes it possible controllably to vary cadmium telluride lattice parameters, which together with high substrate structural perfection makes it possible to match the lattice parameters of the substrate and the growing Hg1-xCdxTe (x - 0.24.3) epitaxial layer; 4) The charge composition is suitable for growing perfect single crystals of cadmium telluride and industrial scale fabrication of standard substrates for epitaxial growth of Hg1-xCdxTe (x - 0.24.3).

Methods are known for growing solid solutions from melt solutions of close to stoichiometric composition tl) Capper P., Gosney Jj., Jones C.L., Quelch M.J.T. Quenching studies of Bridgman grown CdxHg1-xTe, J. Cryst. Growth, 1983, 63, (1), 154-164; 2) Capper P., Jones C.L., Pearce Ej., Quelch M.J.T.

Growth of CdxHg1-xTe: comparison of some properties with the predictions of two melt growth models, Ibid., 1982, (2), 487497; 3) Shinosara K., Ueda R., Ohtsuki O., Ueda Y. The crystal growth of homogeneous Hg1-xCdxTe by the Bridgman method, Jap. J. Appl. Phys., 1972, 11, (1), 273-274]. The substance of these is formed by loading into a quartz vessel starting elements or compounds corresponding to the composition Hg1-xCdxTe (x - 0.20) and an additional weighed portion of mercury to create an equilibrium pressure in the free volume of the sealed vessel. The vessel with the charge is loaded into a directed crystallisation furnace and is heated to 10-20 above the melting point in the course of 10-20 hours, and is then moved through an axial temperature gradient at a speed of 0.25-0.5 mm/hour.

The boules obtained have axial and radial inhomogeneities exceeding 0.1-0.15 mol. fraction CdTe, from which it is not possible to cut homogeneous wafers measuring more than 5x8 mm2.

Another method for obtaining Hg,.CdxTe (x - 0.205-0.220) single crystals is known from SU-A-155469. In this method an initial charge consisting of high-purity starting components and corresponding to the composition HgO.sCd 2Te is heated in a sealed quartz vessel to the solidus temperature for the predetermined solid solution composition and is held to obtain a melt solution Hg1-xLCdxLTe with composition XL equilibrium to the solid solution composition x5, and is then passed through an axial temperature gradient not exceeding 5 C/cm at a speed of 0.05-0.15 mm/hour. In this case, large single crystals of predetermined composition are obtained with a volume of not less than 5-6 cm3.

The boules grown have axial inhomogeneity, such that the predetermined composition is concentrated in the initial part of the boule with a height of 58 mm, while further along the boule the composition varies up to 0.1 mol.

fraction of CdTe. The region in which the predetermined composition is concentrated has high homogeneity in the radial direaion and deviation in composition in a 40 mm diameter wafer does not exceed Ax - +0.005 mol.

fraction of CdTe.

The homogeneity of wafers in respect of electrophysical parameters is determined by the residual level of unmonitored impurities, which makes it impossible to manufacture wafers with the required electrophysical parameters.

An aim of the present invention is to provide a method for obtaining single crystals of Hg1-xCdxTe and wafers with predetermined properties, which make it possible to increase the yield of the part of a boule with the predetermined composition x and wafers with the required electrophysical parameters, namely n-type Hg1-xCdxTe (x - 0.200 - 0.225) with electron concentration of 1.1014 - 6.1014 cm-3 at 77K, and p-type Hg1-xCdxTe (x - 0.210 - 0.225) with a hole concentration of 3.1015 - 10.1015 cm at 77K, suitable for creation of multi element photoresistors and photodiodes for detecting infra-red radiation and which are stable over time.

According to a second aspect of the present invention, there is provided a method of producing HglxCd=Te single crystals, comprising heating a vessel, charged with a mercury-cadmium-tellurium mix, in a temperature field of 704715 C until the mix is homogenous and passing the vessel through an axial temperature gradient not exceeding 3 C/cm at a speed of 70-85 ym/hour to effect crystalization of Hg,.xCdxTe.

In order to produce an n-type crystal indium may be added to the mix.

When indium is added to the mix and n-type material is desired, x is preferably in the range 0.200 - 0.225. Preferably, indium is added to the mix at a concentration from 1.1014 to 5.1014 at/cm3.

Where the mix contains indium, a method preferably includes the step of isothermally annealing the crystal in mercury vapour, varying the temperature stepwise from approximately 4800C to approximately 3800C and then to approximately 250 C over a period of not more than 400 hours. However, if indium is absent, a method preferably includes the step of annealing the crystal in mercury vapour at temperatures of approximately 4800C for approximately 20 days and approximately 395 C for approximately 3 days with subsequent quenching.

If a p-type crystal is desired x is preferably in the range 0.210-0.225.

In preferred embodiments of the second aspect of the present invention: - a vessel with an initial charge of high-purity Cd, Hg and Te, taken in stoichiometric amounts corresponding to the composition Hg1-xCdxTe (x - 0.2) is placed in a temperature region at 704-715 C, in order to improve mass supply to the surface of a growing boule of predetermined composition; crystallisation is performed at a speed of 70-85 ym/hour, passing the vessel through an axial temperature gradient not exceeding 3"C/cm; - indium in amounts of 1.1014 - 5.1014 at/cm3 is additionally added to the initial charge for guaranteed formation of n-type material; - to reduce the concentration of native defects from 1.1017 cm3 to 1014cm-3 and obtain wafers with n-type conductivity or wafers with conductivity of mixed type with native defect concentration # 1014cm-3, Hg1-xCdxTe wafers of predetermined composition are annealed in mercury vapour stepwise at temperatures of 480 C - 3800C - 250C for not more than 400 hours; - to obtain p-type Hg1-xCdxTe wafers of predetermined composition with a hole concentration of 3.1015 - 10.1015 cm-3 at 77K, wafers from boules without addition of indium are annealed in mercury vapour at temperatures of 480 c (20 days) and 395 c (3 days) with subsequent quenching.

The second aspect of the present invention provides the following advantages: 1) the yield of the part of a boule of predetermined composition is increased (up to 2/3 of boule length) due to improvement in the conditions of mass supply to the surface of the crystallisation front and optimisation of process temperature profile, with high radial homogeneity of Ax - i 0.005 mol. fraction of CdTe being achieved with a boule diameter of 40 mm; 2) the reproducibility of electrophysical parameters and the yield of n type Hg1-xCdxTe (x - 0.200-0.225) wafers with electron concentration of (1-6)#1014 cm3 at 77K is increased due to introduction of indium into the initial charge in concentrations of (1.5).1014 cm3; 3) the time for annealing wafers in mercury vapour to reduce the concentration of native point defects from 1.1017 to - 1014 cm3 is reduced by using stepwise isothermal annealing at temperatures of 4800C - 3800C - 250 C for a period of not more than 400 hours; 4) p-type Hgl.,,CdxTe (x - 0.210-0.225) wafers with predetermined concentration are obtained from boules without addition of indium by means of three-stage heat-treatment 4800C (20 days) - 395eC (3 days) quenching; 5) the method is suitable for the manufacture of wafers with predetermined properties on industrial scales.

In semiconductor device manufacturing technology, a method is known for preparing wafers of the ternary solid solution semiconductive compound Hg1xCdxTe (US-A4436580), using a polishing etchant containing a halogen mixed with methyl alcohol with subsequent washing in acetone, alcohol and deionised water. This method is only one of the stages of wafer surface preparation, and cannot be used for the simultaneous treatment of a group of wafers; much toxic waste is produced by this wafer preparation process.

Also known is a method of polishing wafers of the semiconductive compounds CdSe, CdS, ZnS, etc. (US-A-3629023), using a composition containing the halogen Br2 (0.05-10%) in a mixture with acetic acid CH3COOH, which is fed to a gap between a rotating (- 100 rev/min) polishing wheel and a periks disc to which a wafer of semiconductive material is adhered. The adhesion of wafers in this method requires complex washing of the surface of wafers in toxic organic solvents and reduces treatment productivity.

A method of chemico-mechanical polishing of Hg1-xCdxTe ternary solid solution wafers is described in EP-A- 0188756. A composition is used in the method which includes potassium iodide (KI) and iodine a; in a mixture with deionised water and an inert additive, e.g. ethylene glycol. In this method, the surface of a wafer of semiconductive material is continuously lapped with a solid (or semi-rigid porous) surface, constantly wetting this with an excess amount of the solution. Together with the disadvantages inherent to the previous method, a polishing solution is used in this method which contains a low-activity solvent for oxides (KI),requiring that pressure be applied to the the semiconductive wafer in order to remove oxides from the surface, which leads to the appearance of processing defects (scratches, chips) and reduction in the percentage yield for finished wafers.

It is an aim of the present invention to overcome the disadvantages of the aforementioned prior art.

According to a third aspect of the present invention, there is provided a first polishing composition for polishing a wafer of a complex semiconductor comprising finely-disperse diamond powder and an organic filler. Preferably, the organic filler comprises a fat.

According to the third aspect of the present invention, there is also provided a second polishing composition for polishing a wafer of a complex semiconductor comprising an aqueous colloidal solution of powdered aluminosilicate, a halogen acid, an oxidising agent, a polybasic alcohol and a monobasic alcohol. Preferably, the aluininosilicate comprises a synthetic zeolite.

According to the third aspect of the present invention, there is further provided, a method of preparing a wafer of complex semiconductive material, comprising the steps of: polishing the wafer using the first polishing composition according to the third aspect of the present invention while applying a pressure on the wafer of 10-50 g/cm2; polishing the wafer using the second polishing composition according to the third aspect of the present invention while applying a pressure on the wafer of 10-50 g/cm2, using a semi-rigid first polishing material; and polishing the wafer using the second polishing composition according to the third aspect of the present invention while applying a pressure on the wafer of 10-30 g/cm2, using a semi-soft or soft second polishing material; washing the wafer with deionised water for 10-15 minutes, with preliminary wetting of a polisher with deionised water, to which a small amount of a mixture consisting of a halogen acid, a surfactant and deionised water in the ratio of approximately 1:20:50 has been added, using a soft third polishing material while applying a pressure on the wafer of 10-20 g/cm2.

Preferably, the first polishing material comprises bleached cambric.

The second polishing material may comprise foamed polyurethane or velvet.

Preferably, the third polishing material comprises synthetic chamois leather.

Preferably, the polishing is performed by means of an apparatus adapted to receive a wafer between two polishing members, a lower one of which is rotatable and driven and an upper one of which is offset relative to the lower and freely rotatable.

The third aspect of the present invention may be applied to single or plural bulk single crystals, epitaxial structures or complex multi-layer heterostructures In a preferred embodiment of the third aspect of the present invention, polishing and washing of a group of wafers are carried out simultaneously on both sides without adhesive attachment of the wafers. Polishing is carried out in three stages: 1) polishing using a composition containing finely-disperse diamond powder and filler based on organic compounds, e.g. fat, a polisher of natural or synthetic materials is used; pressure on the wafer is 10-50 g/cm2; 2) pre-finishing chemical-mechanical polishing using a composition comprising an aqueous colloidal solution of powdered aluminosilicate, e.g. synthetic zeolite, a halogen acid, an oxidising agent, a polybasic alcohol and a monobasic alcohol; polisher material of semi-rigid type, e.g. bleached cambric, is used; pressure on the wafer is 10-50 g/cm2 depending on the physicochemical properties of the material.

3) finishing chemical-mechanical polishing using a composition as in stage 2, but with an altered ratio of components; a polisher material of semi soft or soft type, e.g. foamed polyurethane or velvet, is used; pressure on the wafer is 10-30 g/cm2.

The wafers are washed with deionised water for 10-15 minutes, but first a soft washing polisher, e.g. of synthetic chamois leather is wetted with deionised water with a small amount (3-10 drops) of a mixture consisting of a halogen acid, a surface active detergent (surfactant), e.g.

ionic, and deionised water in (1:20:50) ratio; pressure on the wafer is 10-20 g/cm2.

Use of the presently proposed method for the preparation of wafers provides the following advantages, compared with existing methods: 1. contamination of the wafer surface, e.g. with adhesives, is substantially reduced; 2. heating, which is frequently used during adhesive attachment and re attachment of wafers is excluded; 3. as a result of using specially selected polishing compositions, oxides of the semiconductive material and processing products are removed in a complex manner: chemically - by acid components, and mechanically by colloid partides, which are often also adsorbents; 4. the use of toxic organic solvents in the washing stage is excluded. A clean surface is obtained when washing with soft polishing material using a mixture containing a surfactant and a chemically active solvent of oxides, e.g. an acid; 5. the method is suitable for preparation of wafers of III-V, 11-VI and other compounds on an industrial scale.

In the technology of the fabrication of infrared photodiodes based on Hgs,CdxTe material, a photodiode and a method for its fabrication are known A-4801990), the method including selecting a wafer of HglxCdxTe material according to the value of x, the conductivity type (n or p) and the concentration of carriers in the initial material, polishing, chemico-mechanical polishing, chemical etching, application of a passivating layer of CdTe and a protective layer of ZnS or SiO2, use of standard photolithography operations to form photodiode topology, and creation of a p-n junction by the method of diffusing gold impurity or implanting ions of doubly-charged aluminium.

The method described is mainly applicable to the creation of special (avalanche) single-element photodiodes based on Hg1-xCdxTe material with x - 0.350.5, requires the application and matching of a large number of photolithographic masks, and the formation of small-area photodiodes is made difficult.

Also known is a method for fabrication of infrared photodiodes and photodiode arrays (multi-element, including matrix) based on Hg1-xCdxTe material (EP-A- 0374232), which includes selecting wafers of Hgl.sCd=Te material according to the value of x and conductivity type p, forming a passivating layer on the surface of wider-zone material, e.g. CdTe, Hg1-xCdxTe, Hg1-x-yCdxZnyTe or Cd1-yZnyTe with preliminary cleaning of the surface, application of a photoresist mask with windows defining the topology of the photodiodes, removing exposed areas of the passivating layer by the ion bombardment method with the ion bombardment acting on the p-type starting material which results in the appearance close to the surface of a layer of n±type conductivity due to radiation damage to the material lattice, subsequent application of metallisation to form a contact to the n region of the p-n junction, subsequent removal of the photoresist with areas of metallisation lying on it to form individual photodiodes, application of a second photo resist mask and formation of common contacts. Doping of the passivating layer surface may be used to create the necessary energy diagram at the wafer-passivating layer interface. A multiplicity of small-sized photodiodes closely spaced from one another can be fabricated by this method. However, the said method has disadvantages and restrictions on use linked to the fact that the pn junction is obtained by means of lattice damage by low-energy ions with an energy of -500eV, which, according to our investigations, in structurally perfect HglxCdxTe single crystals leads to the formation of an layer 100-200 A thick, and the probability is correspondingly increased of point leakage in photodiodes due to non-uniform etching of areas of the passivating layer or crystal defects, particularly with a photodiode of large area -lxi mm2; inadequate control of the geometrical position of the p-type boundary in epitaxial methods of applying the passivating coating and the energy diagram at the Hg1-xCdxTe-passivating layer interface.

An aim of the present invention is to provide a method of fabricating infrared photodiodes based on Hg1-xCdxTe material, which makes it possible to unify the process of fabricating photodiodes of both small and large area over a wide range of values of x (0.2-0.6), to reduce production costs and to increase the percentage yield of finished photodiodes.

According to a fourth aspect of the present invention, there is provided a method of fabricating HglxCdxTe infrared photodiodes, comprising the step of selecting p-type substrate of Hg1-xCdxTe having a composition in the range: x - 0.210-0.600; Ax < c t0.005 and hole concentration and mobility at working temperature of p = 2.1016 - 10l5 cm3 and p - 700 - 80 cm2/Vs.

The fourth aspect of the present invention also provides a method of fabricating a Hg1-xCdxTe infrared photodiode, comprising the step of determining the likely reverse dark current of the photodiode using the RGV method. Preferably, this method includes forming a test MIS structure and measuring the C-V and G-V characterisitics to detemine the conductivity type, concentration of charged impurities and bending of zones in the region of the material adjacent to the interface.

Preferrably, p-type starting material is carefully selected in relation to electrophysical parameters, a high-productivity wafer processing method is used, MIS test structures are formed on a wafer with a passivating layer, by measuring the C-V, C-V and C-t characteristics in which the electrophysical parameters of the p-type region adjacent to the interface are determined and the potential dark current values of a photodiode which will subsequently be formed by ion implantation additional to an n+ layer formed on removal of regions of the passivating layer from the surface by the ion milling method.

In a preferred embodiment, fabrication of photodiodes includes the following stages: 1) selection of wafers (structures) of p-type Hgl xCdxTe starting material such that they have an x value of 0.210-0.600, with deviation in the value Ax over the plate not more than + 0.005; and concentration and mobility of holes at working temperature p - 2.1016 - 1 1025 cm3, yp 700 - 80 cm2/V s on change in x from 0.210 to 0.600 respectively; 2) formation of groups of wafers (structures) of corresponding composition and preparation (treatment) of wafers (structures); 3) chemical etching of the surface for the purpose of cleaning free from adsorbed layer and obtaining a surface with zone bending dose to zero; 4) deposition on the surface of a ZnS layer 0.8-1.2 m thick by the electron-beam evaporation method; 5) formation of MIS test structures by evaporation of metallic pads (gates) through a mask; 6) measurement of C-V, G-V characteristics by a steady-state or quasi steady-state method for the purpose of checking the conductivity type and concentration of charged impurities in the region of the material adjacent to the surface and the bending of zones at the material passivating layer interface. Measurement of the potential value of the reverse dark current of a photodiode using the RGV method M.S.Nikitin, A.Yu.Nikiforov, E.V.Troshina A study of quasi equilibrium and nonequilibrium processes in MIS structures based on p-CdxHg1-xTe. Mikroelektronika, 1987, 16, (2), 157-160.; 7) application of a photoresist mask with windows determining photodiode topology; 8) removal of exposed areas of the passivating layer by the ion milling method with Ar+ ions with ion bombardment of the p-type wafer surface and subsequent implantation of doubly-charged aluminium ions Al2+ with an energy of, for example, 400 keV and a dose of (2-3) 10'3 cm-2; 9) removal of the photoresist mask; 10) cleaning of the surface and application of contacts to individual photodiodes, for example through a mask.

Use of the presently proposed method of fabricating infrared photodiodes on the basis of Hg.xCdxTe material (x - 0.210-0.600) provides, compared with existing methods, the following advantages: 1) it permits fabrication of photodiodes on wafers of bulk single crystals, on epitaxial structures, on complex heterostructures having an upper layer of Hgl-xCdxTe; 2) it permits the use of standardised technological operations for fabrication of photodiodes for a wavelength Bco from 1.3 to 11.5 m (x - 0.210-0.600); 3) it permits fabrication both of small photodiodes A - 10 x 10 Zm2, and of photodiodes of large area A # 1 x 1 mm2; 4) as a consequence of the combined process of obtaining an n±p junction (Ar+ ion bombardment when removing the passivating layer from the surface, leading to the formation of an n+ layer 0.01-0.02 m thick plus ion implantation of Al2+ (400 keV), leading to the formation of a stable n+ layer -0.2 ym or more in thickness) on wafers with n±p junctions it is permissible to use additional ion-plasma cleaning processes, for example for the purpose of removing residues of photoresist or cleaning before application of contact metallisation; 5) it is possible to screen wafers or to evaluate photodiode parameters from measurements using test MIS structures at an intermediate stage of fabrication.

In the technology of fabricating infrared photoresistors based on HglxCdxTe material, methods of fabrication are known (GB-A-2027985, GBA-2027986), which include selection of wafers of the material, individual processing in special holders (blocks), chemical etching, passivation of the surface with anodic oxide, application of a photoresist mask, ion separating etching with the aim of obtaining a large number of fragments of the material with a thickness of -10 m and dimensions of, for example, 200x250 ym, transfer of these fragments from the process block to a photoresistor support substrate and adhesive attachment, performance of process operations for fabrication of an individual single- or multielement photoresistor, such as the application and removal of photoresist masks, ion etching, application of metallisation.

However, these methods have disadvantages and limitations on use linked to the fact that individual processing of wafers is employed, resins are used for adhesive attachment of wafers, and samples can be used which are mainly of round shape and small diameter, since re-adherence of wafers with a thickness of -200 m is carried out (we note that HgX CdxTe material is very brittle, while modern methods permit fabrication of wafers with a diameter of 20, 30 and even 40 mm), the transfer and adhesive attachment of a crystal fragment with a total thickness of about 10 Zm to a supporting substrate of sapphire applies major restrictions to the dimensions and number of detector elements, i.e. with such a method it is difficult to fabricate detectors with a large number of elements such as 32, 64, 128, the length of which with a pitch of 50 m (35 m area, 15 m gap) are 1.6, 3.2 and 6.4 mm, respectively.

However, as it is clear from the specification that the length of a fragment is a fraction of a millimetre, it is also impossible to use multiplication when fabricating photosensitive elements.

An aim of the present invention is to provide a method for the fabrication of infrared photoresistors based on Hg1-xCdxTe material, which makes it possible to reduce production costs and to increase the percentage yield of finished photoresistors.

According to the present invention, there is provided a method of fabricating Hg1-xCdxTe infrared photoresistors comprising the steps of: selecting wafers of ptype Hg1-xCdxTe starting materials having the composition x - 0.170-0.175 and hole concentration p - (1.2).1017 cm3 at 77 K and ntype Hg1-xCdxTe starting material having the composition x - 0.180-0.320, Ax roughly equal to or less than +0.005, electron concentration n - (16).10i4 cm3 and mobility 2 1.5-105 cm2/Vs for x - 0.180-0.225 and y # 104 for x - 0.27-0.32 at T - 77 K; fonning of groups of wafers of appropriate composition and processing the wafers to the necessary thickness; passifying the surfaces of the wafers; adhering the wafers to a supporting substrate, with chemically resistant cryoresistant adhesive; performing group processing of heterostructures until an Hg1-xCdxTe thickness of 5-10 m is obtained; passifying the surfaces of the wafers; contactlessly measuring the photo-response fall time in layers with composition x - 0.180-0.320; applying to the passivating layer an additional protective coating; and forming photoresistor elements.

Preferably, the supporting substrate comprises sapphire.

Preferably, the additional protective layer comprises zinc sulphide.

A method according to the fifth aspect of the present invention may be applied to bulk single crystals, epitaxial structures on insulating substrates or complex heterostruaures having an Hg1-xCdxTe upper layer.

A method according to the fifth aspect of the present invention includes careful selection, in respect of electrophysical parameters, of starting materials of p-type x - 0.170-0.175 or n-type x - 0.180-0.320, a high-produaivity method for group processing of wafers and Hg1-xCdxTe-supporting substrate heterostructures, using a special chemically-resistant and cryoresistant adhesive to attach Hg1-xCdxTe wafers to a supporting substrate, the number of photolithography and etching process operations is reduced, using a contactless method for checking the photo-response fall time at an intermediate stage of photoresistor fabrication.

In a preferred embodiment of the fifth aspect of the present invention, fabrication of photoresistors includes the following stages: 1) selection of wafers (structures) of starting material: - of ptype Hg1-xCdxTe such that they have the composition x=0.170-0.175 and a hole concentration p=(1-2)#1017 cm-3 at 77 K (for fabrication of uncooled photoresistors for X- 10.6 m); - of n-type Hg1-xCdxTe such that they have a composition in the range 0.180-0.320; #x##0.005; electron concentration (16).10i4 cm3 and mobility 1 1.5-105 cm2/V s for x-0.180-0.225 and # 104 cm2/V s for x=0.27-0.32 at 77 K (for fabrication of cooled photoresistors with Xm 3.5-20 m); 2) formation of groups of wafers (structures) of corresponding composition and preparation (processing) of wafers (structures) to the required thickness; 3) passivation of the surface; 4) adhesive attachment of wafers to a supporting substrate, for example of sapphire, with chemically resistant cryogenic adhesive; 5) group processing of such heterostructures with the aim of obtaining an Hgi.CdrTe layer 5-10 m in thickness; 6) passivation of the Hg,,C4Te layer surface; 7) contactless measurement of the photo-response fall time in the layers with 0.180-0.225 and 0.27-0.32 composition; 8) application to the passivating layer of an additional protective coating, for example a ZnS layer; and 9) performance of standard operations for forming photoresistor elements of varying topology, including application and removal of photoresist masks, ion-plasma cleaning of the surface, application of metallisation layers, use of ion etching of areas of the protective and passivating coatings, and ion milling of the Hg1.zCdxTe to the full thickness of the layer.

Use of the presently proposed method for fabrication of infrared photoresistors based on material (x-0.170-0.320) provides the following advantages compared with existing methods: 1) it permits fabrication of photoresistors on wafers of bulk single crystals, on epitaxial structures, on complex heterostructures having an Hgl-xCdxTe upper layer, including those of large size (diameter) and arbitrary shape; 2) it makes it possible to avoid adhesive attachment and re attachment of wafers (structures) at all stages of processing, which reduces the possibility of surface contamination with adhesive compositions; 3) the number of process operations and the time for performing them for one wafer (structure) are reduced; 4) the seating of a wafer with virtually 'optical contact' is ensured, and there is improvement in removal of heat from the layer and the percentage yield of elements suitable for cyclic tests with cooling to working temperature - heating, due to the use of special adhesive; 5) rejeaion of wafers (structures) in relation to photo-response fall time is possible at an intermediate stage of photoresistor fabrica tion.

Embodiments of the present invention will now be described, by way of example, with reference to the accompanying drawings in which: Figure 1 shows a polishing apparatus for performing a method according to the third aspect of the present invention;.

Figures 2(a)-(c) show typical spectral characteristics Sx, volt-ampere characteristics (VAC) and volt-farad characteristics (VFC) of a photodiode based on HgXlCdxTe (x = 0.5) with sensitive area dimensions A - 0.3 x 0.3 mm2; and Figures 3(a)-(c) show typical Sx, VAC and the dependence of specific detection capacity D*X""" (#max, 500K, 1, 10 kHz) FOV - 90' on the reverse bias of a photodiode based on Hgl.xCdxTe (X ~ 0.21) with sensitive area size A - 1 x 1 mm2; The presently proposed charge composition has been used to obtain cadmium telluride single crystals in the following manner.

33 quartz vessels of identical design and dimensions, coated inside with pyrocarbon, were used. The quartz vessels had an internal diameter of 36# 1 mm and a length of 150-155 mm and had an end neck 40i3 mm long and with an inside diameter of 12-15 mm. The first 3 vessels were loaded with a charge consisting of cadmium and tellurium or pre-synthesised polycrystalline cadmium telluride and a weighed amount of cadmium to create an equilibrium pressure of its vapour in the free space of the vessel. The charge composition corresponds to composition No.1 in Table 1.

Of the following 10 vessels, 2 each contained the charge compositions designated No. 24 in Table 1, and were, in addition to cadmium and tellurium, also charged with sulphur additive. The stoichiometry of the initial charge is not disturbed, the amount of tellurium being reduced by an amount equivalent to the amount of additive.

Of the following 6 vessels, 2 each contained the charged designated No.7-9 in Table 1, and were charged with cadmium, tellurium and selenium.

Of the following 8 vessels, 2 each contained the charges designated No. 113 in Table 1, and were charged with tellurium, cadmium and zinc.

Of the following 6 vessels, 2 each contained the charges designated Neo.1+16 in Table 1, and were charged with tellurium, cadmium, zinc and selenium.

Evacuated and sealed vessels were loaded into directed crystallisation furnaces.

The temperature profiles of the furnaces had isothermal plateaux with lengths of 120-150 mm. Deviation from average nominal temperature on an isothermal plateau Cj = 1100 C) was not more than 34C. Vessels and contents were held at such temperatures for not more than 24 hours and were then passed through an axial temperature gradient (G=5-84C/cm) at a speed of 0.3 mm/hour. After passage of the entire length of vessel with melt through the region at 950"C the furnace was cooled at a rate of 10- 15 C/hour.

The boules obtained had a macro-block structure gable 1, column 13).

An increase or decrease in concentrations compared with their optimal values led to deterioration in the microstructure of the boules being grown, i.e. to the appearance of twins, small-angle boundaries, increase in dislocation T a b l e 1 Effect of S, Se and Zn impurity elements on the structural properties of CdTe

OP ol No. Cd, Cd, Te, Te, S, S, Se, S, Zn, Zn, R tO : : Wn D Io sm U h K2 t43 s~ &commat;) O e an ~ t &num; ~ u Ez X &commat; Es &commat;0 tU3~~ ~ s U a a Z Z 1. 249,450 46,83 283,180 53,17 - - - - - - 532,63 5-7 20-30 3-5 10 6,481 2. 249,450 47,12 278,850 52,67 1,085 0,205 - - - - 529,385 < 4 1-2 < 105 6,468 3. 249,450 47,456 272,533 51,945 2,670 0,509 - - - - 524,653 < 3 0 1.105 6,464 4. 249,450 46,965 281,186 52,940 0,500 0,094 - - - - 531,136 < 3 1 < 105 6,469 5. 249,450 46,920 281,804 53,017 0,330 0,062 - - - - 531,644 < 3 1-3 < 105 6,471 6. 249,450 47,649 271,018 51,769 3,050 0,583 - - - - 523,518 < 4 2-3 #2#105 6,465 7. 249,450 47,107 275,093 51,949 - - 5,000 0,944 - - 529,543 < 3 0 #8#104 6,464 8. 249,450 47,386 265,483 50,470 - - 11,000 2,092 - - 525,838 < 2 0 #5#104 6,466 9, 249,450 46,942 279,945 52,681 - - 2,000 0,376 - - 531,395 < 6 2-5 #5#105 6,474 10. 239,563 45,329 283,180 53,583 - - - - 5,750 1,088 528,493 < 5 4-6 #1#105 6,468 11. 241,025 45,553 283,180 53,521 - - - - 4,900 0,926 529,105 < 3 0 #6#104 6,465 12. 245,409 46,222 -"- 53,335 - - - - 2,350 0,443 530,939 < 3 0 #8#104 6,463 13. 238,704 45,198 -"- 53,618 - - - - 6,250 1,183 528,134 < 5 1-3#2#105 6,469 14. 242,334 46,266 275,106 52,522 - - 3,474 0,663 2,878 0,550 523,791 < 3 0 #5#104 6,464 15. 241,098 46,192 273,702 52,439 - - 3,909 0,749 3,256 0,620 521,949 < 3 0 #5#104 6,465 16. 243,571 46,408 276,509 52,684 - - 2,606 0,497 2,158 0,411 524,843 < 4 1-2 #1#105 6,466 density, and also to substantial change in lattice parameters, which makes it impossible to use them for the fabrication of substrates for obtaining epitaxial Hg1.xCdsTe layers homogeneous in composition and with a highsuality surface, due to large deviations of the lattice parameters of the growing epitaxial layer and the lattice parameters of the substrate.

As can be seen from Table 1, the most perfect crystals were grown from the charges corresponding to compositions Nos. 3 & 4 (with addition of sulphur), Nos. 7 & 8 with addition of selenium; Nos. 11 & 12 with addition of zinc and when zinc and selenium were added together (Nos. 14 & 15).

In this case, zinc and selenium in the sub-lattices of cadmium and tellurium respectively increase even further the energy of formation of extended defects and strengthen the CdTe crystal lattice.

Tests on substrates fabricated from such boules by growing epitaxial HglxCdxTe layers showed that the surface morphology features of epitaxial layers were substantially improved as a result of matching the lattice parameters of the substrate and the lattice parameters of the growing Hg1@ xCdxTe (x - 0.204.30) epitaxial layers.

A method of producing moncrystaline Hg1-xCdxTe will now be described.

A charge of high-purity cadmium, mercury and tellurium, in which the total residual concentration of unmonitored impurities was not more than 1 10-5 wt.%, were loaded into 12 quartz vessels. The mass of each charge did not exceed 400 g.

After evacuating and sealing, a vessel was loaded into a two-zone furnace, providing a temperature field with two isothermal plateaux and a temperature gradient between them. The temperature at the upper isothermal plateau was held in the range 715ffi1 C, and at the lower plateau at 67s680 C, and the gradient sector between them had an axial temperature gradient not exceeding 3 C/cm.

The crystallisation temperature and holding time necessary to obtain a homogeneous melt solution cxL, equivalent to solid solution Hg1-xCdxTe (xs 0.21), were varied, and also the values of the axial temperature gradients and the crystallisation speed (Table 2).

Table 2. Effect of process conditions on yield of material. (Hg1-xCdxTe with x = 0.205 - 0.225)

No. Mass of Initial cryst- Holding Axial Crystallis- Length of boule Number of charge (g) allisation temp time, #, h temperature ation speed, with composition single crystal ( C) gradient m/h 0.205-0.225, 1, cm blocks in C/cm boule.

1 400 702 50 2 70 0.5 4 2 400 705 50 2 80 1.4 2 3 400 706 50 2.5 85 1.9 2 4 400 700 50 3 70 - 3 5 400 704 60 3 80 1.0 3 6 400 705 60 3 80 2.2 2 7 400 707 60 3 85 - 2 8 400 707 50 3 85 - 2 9 400 703 60 3 80 0.8 2 10 400 703 60 3 75 1.0 2 11 400 701 60 3 70 - 2 12 400 701 60 4 70 0.25 3 As can be seen from Table 2, the following are optimal for crystallisation of a predetermined range of compositions of Hg1-xCdxTe: - initial crystallisation temperature 70s706 C; - holding time 50-60 hours; - value of axial temperature gradient not more than 3. C/cm; - crystallisation speed 70-85 ym/hour.

The vessels were loaded into furnaces such that the loaded parts were at temperatures of 70s715 C in a temperature gradient. After bringing the furnaces to the said temperatures, the vessels were held stationary at such temperature for 50 hours. After reaching a value of the melt solution composition XL equivalent to the predetermined solid solution composition xs the predetermined solid solution composition us starts to crystallise in the lower part of the vessel.

The time necessary to reach such equilibrium is 50 hours and was established by calculation and confirmed by the results of repeated experiments.

After holding for 50 hours, vessel movement at a speed of 70-85 m/hour was initiated. The speed of movement depends on the value of the axial temperature gradient and the lower the value of the gradient (1-1.5 0C/cm), the correspondingly lower is the speed (-70 ym/h), while at axial temperature gradient values of 2.53 C/hour the travel speed is 80-85 Sm/hour. Increase in axial temperature gradient leads to increase in radial temperature gradient and this leads to curvature of the crystallisation front and correspondingly to radial inhomogeneity in composition distribution.

The boules grown in this manner consisted of 2-3 blocks (monocrystalline).

The predetermined composition (0.205-0.225) was distributed over 2/3 of the length of the entire boule. Radial distribution was sufficiently homogeneous and Ax did not exceed i 0.005 mol. fraction of CdTe with a wafer diameter of 3840 mm.

Table 3. Effect of indium concentration on electron concentration in Hg1-xCdxTe (x = 0.205 - 0.225)

No. Mass of Mass of Conc. of Calculated Annealing Anneal- Conc. of Charge Lifetime Hg1-xCdxTe indium holes (ID) indium conc. temperature ing charge carrier of (g) additive after growth in starting ( C) time, t carriers mobility minority (g) Phh (cm-3) mixture, C (h) after 77 carriers # (at/cm3) annealing (cm2V-1s-1) (s) ,n77 (x 105) (cm3) (x 1014) 1 400 0.00 (1-2).1017 0 480-380-250 380 0.6-1.0 1.0-1.2 #7.10-7 2 400 0.05 (1-2).1017 1.1014 480-380-250 380 1-1.2 #2 #1.10-6 3 400 0.05 (1-2).1017 1.1014 480-380-250 380 1-1.3 #2 #1.10-6 4 400 0.06 (1-2).1017 1.8.1014 480-380-250 400 2-2.3 #2 #2.10-6 5 400 0.06 (1-2).1017 1.8.1014 480-380-250 380 2-2.4 #2 #2.10-6 6 400 0.08 (1-2).1017 2.3.1014 480-380-250 420 2.5-3.0 #2 > 2.10-6 7 400 0.08 (1-2).1017 2.3.1014 480-380-250 380 2.5-3.4 #2 > 2.10-6 8 400 0.10 (1-2).1017 3.1014 480-380-250 420 3.4-4.0 #2 #2.10-6 9 400 0.10 (1-2).1017 3.1014 480-380-250 380 3.6-4.1 #2 #2.10-6 10 400 0.15 (1-2).1017 4.6.1014 480-380-250 400 4.2-5.3 #2 #2.10-6 11 400 0.18 (1-2).1017 5.3.1014 480-380-250 380 5.9-6.7 #2 #2.10-6 12 400 0.18 (1-2).1017 5.3.1014 480-380-250 420 5.8-6.3 #2 #2.10-6 13 400 0.20 (1-2).1017 5.8.1014 480-380-250 380 5.8-6.7 #2 #1.10-6 14 400 0.25 (1-2).1017 7.8.1014 480-380-250 400 7.0-8.5 #2 #1.10-6 15 400 0.25 (1-2).1017 7.8.1014 480-380-250 400 7.3-8.3 #2 #1.10-6 The boules were cut into wafers with a thickness of -1.2 mm, which after chemical/mechanical treatment were loaded into a quartz vessel with a weighed amount of mercury. The wafers in the evacuated vessels were annealed stepwise in an isothermal furnace in order to reduce the concentration of native defects, 480"C - 20 hours, then the temperature was reduced to 3800C and they were annealed for 100 hours, after which the temperature was again reduced over 10-12 hours to a temperature of 250 C and annealing was continued for 240 hours. The duration of the annealing process for Hgl.xCdxTe (x - 0.2-0.225) wafers was 380-400 hours with allowance for transitional processes associated with temperature reduction.

Table 3 shows the characteristics of the material obtained as a function of the concentration of indium added to the charge.

It is clear that in the absence of specially added indium the wafers have lower charge carrier mobility and have mixed type conductivity. It is also evident that the concentration of electrons in the wafers is clearly associated with the concentration of the added indium dopant. Indium has an effective distribution coefficient close to 1.0 (for Ga Keff K 0.67; for Al - 0.53) in the growth conditions indicated above, and was therefore selected as the most optimal. The optimum concentrations of indium dopant for obtaining wafers with an electron concentration in the required range, as can also be seen from Table 3, are (1.84.6) 10l4 at/cm3, at which the guaranteed production of Hgl.sCd"Te (x - 0.205-0.225) wafers with an electron concentration of (1 6).1014 cm3 and a charge carrier mobility of more than 2#105 cm2/Vs is ensured. Account must be taken here of the high purity of the initial components used for growth.

Since the total concentration of residual impurities in our initial (Hg, Cd, Te) does not exceed 1-10-5 wt.%, then with a different level of residual concentration of monitored and non-monitored impurities the said optimal concentrations of indium added to the charge will give completely different results.

Increase in the concentration of indium added to the charge to more than 4.6 10l4 at/cm3 leads to a proportionate increase in the concentration of electrons in the material.

An embodiment if the third aspect of the present invention will now be described.

Referring to Figure 1, to carry out the preparation of wafers 9 they were placed on lower face plate (polisher) 2 in the aperture of separator 3 of a polishing device. The device makes it possible to treat wafers of any shape on two sides simultaneously without adhesive attachment. Before being placed on polisher 2, the wafers 9 were checked for acceptance in respect of thickness with a tolerance of i 5 yam. The thickness of the separator 3 was selected to be smaller than wafer thickness by roughly 50 ym. The polisher 2 was first wetted with the appropriate composition for polishing or washing. Then upper polisher 1 was placed from above onto the wafers 9, the upper halfspindle 8 of an eccentric disc 7 freely entering its central orifice. The axis of rotation of upper polisher 1 was thus displaced relative to the axis of rotation of lower polisher 2. The upper polisher is freely rotatable and displaceable relative to the lower polisher. The rotational speed of lower polisher 2 may be varied.

Preparation of wafers of the semiconductive compounds InAs and InP with non-polar orientation was performed in the device in four stages (three polishing stages and one washing stage): 1. Polishing using a composition containing diamond powder with a grain size of 3/2 m and a filler - stearic or oleic acid; the polisher material used was bleached cambric; pressure on the wafer was roughly 40 g/cm2.

2. Pre-finishing chemical-mechanical polishing using a composition comprising an aqueous colloidal solution of powdered aluminosilicate (zeolite), hydriodic acid (HI), hydrogen peroxide, ethylene glycol and ethyl alcohol; the polisher material used was bleached cambric; pressure on the wafer was roughly 30 g/cm2; treatment time was about 20 minutes.

3. Finishing chemical-mechanical polishing using a composition comprising an aqueous colloidal solution of powdered aluminosilicate (zeolite), hydriodic acid (HI), hydrogen peroxide, ethylene glycol and ethyl alcohol in a different ratio to that in stage 2; the polisher material used was foamed polyurethane; pressure on the wafer was roughly 20 g/cm2; treatment time was about 15 minutes.

4. Washing of the wafers was performed using a soft polishing material - synthetic chamois leather; the polisher was first wetted with deionised water and to this were added 5 drops of HI:surfactant:deionised water mixture in 1:20:50 ratio, then washing with deionised water was carried out for 15 minutes at a pressure on the wafer of roughly 10 g/cm2.

The wafers had a mirror surface after preparation, without processing defects (scratches, signs of etching). The wafers had high planarity and planeparallelity characteristics.

Preparation of wafers of Hgl ,,CdxTe (x = 0.22) semiconductive ternary solid solutions, both oriented and non-oriented, was carried out in the device in four stages (three polishing stages and one washing stage): 1. Polishing using a composition containing diamond powder with a grain size of 2/1 m and a filler - stearic or oleic acid; the polisher material used was bleached cambric; pressure on the wafers was approximately 30 g/cm2; treatment time was about 20 minutes.

2. Pre-finishing chemical-mechanical polish hydrobromic acid (HBr), hydrogen peroxide, ethylene glycol and ethyl alcohol in a different ratio to that in stage 2; the polisher material used was velvet or porous semi-soft material; pressure on the wafers was approximately 10 g/cm2; treatment time was about 15 minutes.

4. Washing of the wafers was performed using a soft polishing material - synthetic chamois leather; the polisher was first wetted with deionised water and to this were added 3-5 drops of HBr:surfactant:deionised water mixture in 1:20:50 ratio, then washing with deionised water was carried out for 10-15 minutes at a pressure on the wafer of approximately 10 g/cm2.

The wafers had a mirror surface after preparation, without processing defects (scratches, signs of etching), without a mechanically disturbed layer; the thickness of the disturbed layer on the surface was not more than 0.01 ym, and the wafers had high planarity and plane-parallelity characteristics.

An example of the fourth aspect of the present invention will now be described.

A method of fabricating photodiodes has been implemented in the following manner and included the following stages: 1) selection of p-type Hg,C4Te wafers having: x - 0.500-0.510, P - (1.0-1.5) 10'5 cm3, - - 100-130 cm2/Vs at T - 293 K and x - 0.210-0.220, P - (5-10) 10l5 cm3, yp = 500-700 cm2/Vx at T - 77 K; 2) preparation (chemico-mechanical polishing and washing) of x = 0.5 and x = 0.21 wafers respectively to a thickness of 0.5 mm; 3) formation of a surface with zone flexure close to zero by liquid chemical etching first in an HCI:HNO3 (1:1) mixture, then in a mixture of Br2, HBr and ethylene glycol for several tens of seconds with subsequent washing of HBr until completely clear and with deionised water for 5 minutes; Table 4. Parameters of photodiodes

1. 1. Mol. fraaion, x 0.5 | 0.21 2. Wavelength, #m, m, 1.95 11.0 4 m 2.3 11.5 3. Size of sensitive area, A, mm3 0.3x0.3 1x1 4. Working temperature T, K 293 77 5. Current sensitivity, Sj, A/cm3 0.12 4.5 6. Total capacitance, pF 25 (-5V) 7. Reverse differential resistance, # 1.5. 106 700 (-50mV) (-2V) 8. ROA, # cm3 - 5 9. Specific detectivity, D*, (11, - 4.0 . 1010 500 K, 1,10kHz) (FOV~90() 30mV 10. Breakdown voltage, V 10 0.5 4) application of a passivating dielectric coating 1.2 m thick by electron beam vacuum evaporation; 5) formation of test MIS structures by evaporation deposition of metallic electrodes of nickel (0.3x0.3 mm2); 6) measurement of C-V, G-V characteristics by a quasi-steady-state method and checking dark current by the RGV method. Estimation of the anticipated dark current value of the photodiodes. Rejection of wafers with high dark current values and with an electron-enriched or inverted surface-bounded region (i.e. with downward flexure of zones); 7) application of a photoresist mask with windows defining photodiode topology; 8) ion-beam etching (ion milling) of ZnS areas in the windows to the boundary with the Hg1-xCdxTe using a collimated Ar+ beam with an energy of 1 keV and a current density of 0.2 mA/cm2; 9) ion implantation of Al2+ with an energy of 400 keV and a dose of 3#1013 cm-2; 10) removal of the photoresist mask; 11) application of contacts to the n+ region by evaporation of indium through the mask.

Typical characteristics of the photodiodes obtained are given in Table 4 and are illustrated graphically in Figures 2(a)-(c) and Figures 3(a)-(c). The photodiodes have parameters close to the theoretical, and have small capacitance values, which makes them suitable for recording pulsed and wide-band signals, including for operation in heterodyne mode at a wavelength of 10.6 ym.

An example of the fifth aspect of the present invention will now be described.

A method of fabrication of photoresistors has been implemented in the following manner and included the following stages: 1. selection of Hg1-xCdxTe wafers, having: x = 0.210-0.225 n = (1-6)#1014 cm-3 and 2 1.5-105 cm2/V#s at 77 K and with varying shape; 2. preparation (chemical-mechanical polishing and washing) of wafers to a thickness of 0.5 mm; 3. anodic oxidation of the surface by a known method, oxide thickness 0.075-0.1 ym; 4. adhesive attachment of wafers to precision-machined sapphire substrates with a special cryogenic adhesive; 5. performance of chemical-mechanical polishing and washing of structures to an Hg1-xCdxTe layer thickness of 5-10 ym; 6. anodic oxidation of the surface, oxide thickness 0.075-0.1 m; 7. contactless measurement of photo-response fall time at T - 77 K; 8. application of a ZnS protective layer with a thickness of 0.2 Sm; 9. application of a photoresist mask with windows for contacts (size of sensitive area 50 Zm, pitch - 65 m); 10. ion etching of exposed areas of the protective and passivating coatings to the Hg1-xCdxTe layer, including bombardment of the surface layer with the aim of obtaining a sub-contact n+ layer; 11. application of Cr-Au metallisation by a known method; 12. removal of the photoresist mask and metallisation lying on it by dissolving the resist in an organic solvent; 13. application of a photoresist mask for dividing etching of the mesa structure; 14. ion milling to the full thickness of the Hg1-xCdxTe layer; 15. cutting the structure with the substrate into blocks.

Table 5. Parameters of photoresistors

1. Mol. fraction, x 0.210-0.225 2. Wavelength, #m, m, 11 ##, m 11.5 3. Size of sensitive area, A, m 50 x 50 4. Pitch, m 65 5. Working temperature, T, K 77 6. Number of elements 10, 32, 64 7. Dark resistance. # 30#5 8. Bias voltage, mV 200 9. Voltage sensitivity, Su#m, V/W (6-7).104 (1K#) 10. Specific detectivity, D*#m (11, (6-7).1010 500 K, 1, 1.2 kHz) FOV=60 Typical characteristics of the photoresistors obtained are given in the Table 5. The photoresistors have photoelearic parameters close to theoretical.

Claims (38)

Claims

1. A composition for growing single crystals of a II-VI semiconductor, comprising cadmium, tellurium and one or two elements selected from sulphur, selenium and zinc.

2. A composition according to claim 1, comprising 47.25i0.25 wt.% of Cd; 52.4i0.4 wt.% of Te and 0.35#0.15 wt.% of S.

3. A composition according to claims 1 or 2, comprising 47.2i0.2 wt.% of Cd; 51.5j1 wt.% of Te and 1.5i0.5 wt.% of Se.

4. A composition according to claims 1, 2 or 3, comprising 45.6#0.5 wt.% of Cd; 0.8i0.3 wt.% of Zn and 53.4i0.1 wt.% of Te.

5. A composition according to any one of claims 1 to 4, comprising 46.3i0.1 wt.% of Cd; 0.55j0.1 wt.% of Zn; 52.5#0.1% of Te and 0.65#0.1% of Se.

6. A method of producing Hg.xCd=Te single crystals with predetermined properties, comprising heating a vessel, charged with a mercury-cadmium- tellurium mix, in a temperature field of 704-715 C until the mix is homogenous and passing the vessel through an axial temperature gradient not exceeding 3 C/cm at a speed of 70-85 m/hour to effect crystalization of Hg1-xCdxTe.

7. A method according to claim 6, wherein indium is added to the mix so as to produce an n-type crystal.

8. A method according to claim 7, wherein x - 0.200 - 0.225.

9. A method according to claim 7 or 8, indium is added to the mix at a concentration from 1#1014 to 510t4 at/cm3.

10. A method according to any one of claims 6 to 9, comprising the step of isothermally annealing the crystal in mercury vapour, varying the temperature stepwise from approximately 480"C to approximately 3800C and then to approximately 2500C over a period of not more than 400 hours.

11. A method according to daim 6, comprising the step of annealing the crystal in mercury vapour at temperatures of approximately 480C for approximately 20 days and approximately 3950C for approximately 3 days with subsequent quenching.

12. A method according to claim 10, wherein x w 0.210-0.225.

13. A polishing composition for polishing a wafer of a complex semiconductor comprising finelydisperse diamond powder and an organic filler.

14. A composition according to claim 13, wherein the organic filler comprises a fat.

15. A polishing composition for polishing a wafer of a complex semiconductor comprising an aqueous colloidal solution of powdered aluminosilicate, a halogen acid, an oxidising agent, a polybasic alcohol and a monobasic alcohol.

16. A composition according to claim 15, wherein the aluminosilicate comprises a sythetic zeolite.

17. A method of preparing a wafer of complex semiconductive material, comprising the step of: polishing the wafer using a composition according to claim 13 or 14 while applying a pressure on the wafer of 10-50 g/cm2, using a natural or sythetic polishing material.

18. A method of preparing a wafer of complex semiconductive material, comprising the step of: polishing the wafer using a composition according to claim 15 or 16 while applying a pressure on the wafer of 10-50 g/cm2, using a semi-rigid first polishing material.

19. A method of preparing a wafer of complex semiconduaive material, comprising the step of: polishing the wafer using a composition according to claim 15 or 16 while applying a pressure on the wafer of 10-30 g/cm2, using a semi-soft or soft second polishing material.

20. A method of preparing a wafer of complex semiconduaive material, comprising the step of: washing the wafer with deionised water for 10-15 minutes, with preliminary wetting of a polisher with deionised water, to which a small amount of a mixture consisting of a halogen acid, a surfactant and deionised water in the ratio of approximately 1:20:50, using a soft third polishing material while applying a pressure on the wafer of 10-20 g/cm2.

21. A method of preparing a wafer of complex semiconductive material, comprising performing a method according to claim 17, performing a method according to claim 18, performing a method according to claim 19 and performing a method according to claim 20.

22. A method according to claim 18 or 21, wherein the first polishing material comprises bleached cambric.

23. A method according to claim 19 or 21, wherein the second polishing material comprises foamed polyurethane.

24. A method according to claim 19 or 21, wherein the second polishing material comprises velvet.

25. A method according to any one of claims 20 or 21, wherein the third polishing material comprises synthetic chamois leather.

26. A method according to any one of claims 17 to 25, wherein the polishing is performed by means of an apparatus adapted to receive a wafer between two polishing members, a lower one of which is driven and an upper one of which is offset relative to the lower and freely rotatable.

27. A method of processing a bulk single crystal according to any one of claims 17 to 26.

28. A method of processing an epitaxial structure according to any one of claims 17 to 26.

29. A method of processing a complex multi-layer heterostructure according to any one of claims 17 to 26.

30. A method according to any one of claims 17 to 29, wherein a plurality of wafers are processed simultaneously.

31. A method of fabricating Hg1-xCdxTe infrared photodiodes, comprising the step of selecting p-type substrate of Hg1-xCdxTe having a composition in the range: x = 0.210-0.600; Ax < i 0.005 and hole concentration and mobility at working temperature of p - 2 10l6 - 1.1015 cm and p = 700 - 80 cm2/Vs.

32. A method of fabricating a Hg1-xCdxTe infrared photodiode, comprising the step of determining the likely reverse dark current of the photodiode using the RGV method.

33. A method according to claim 32, including the step of forming a test MIS structure and measuring the C-V and G-V to deteminethe conductivity type, concentration of charged impurities and bending of zones in the region of the material adjacent to the interface.

34. A method of fabricating a Hg1-xCdxTe infrared photodiode, comprising the steps of: performing a method according to claim 31; cleaning any adsorbed layer from the surface of the substrate and obtaining a surface with zone bending close to zero; forming a passivating dielectric layer on the substrate; performing a method according to claim 32 or 33; applying a photoresist mask with windows defining photodiode topology; removing exposed areas of the passivating layer using a collimated beam of Ar+ ions with exposure of the Hg1-xCdxTe surface to ion bombardment; implanting Al2+ ions with energies of 300400 keV and a dose of (24) 10-3 cm2; removing of the photo resist mask; forming a contact system.

34. A method according to claim 33, applied to wafers of bulk single crystals, epitaxial structures or complex heterostructures having an upper layer of p-Hg1-xCdxTe.

35. A method of fabricating Hg1-xCdxTe infrared photoresistorscomprising the steps of: selecting wafers of p-type Hg1-xCdxTe starting materials having the composition x - 0.170-0.175 and hole concentration p - (1-2)#1017 cm3 at 77 K and ntype Hg1-xCdxTe starting material having the composition x = 0.180-0.320, Ax roughly equal to or less than * 0.005, electron concentration n = (1-6)#1014 cm3 and mobility te 2 1.5-105 cm2/Vs for x = 0.180-0.225 and,i # 104 for x - 0.27-0.32 at T - 77 K; forming of groups of wafers of appropriate composition and processing the wafers to the necessary thickness; passifying the surfaces of the wafers; adhering the wafers to a supporting substrate, with chemically resistant cryoresistant adhesive; performing group processing of heterostructures until an Hg1.xCtxTe thickness of 5-10 m is obtained; passifying the surfaces of the wafers; contactlessly measuring the photo-response fall time in layers with composition x - 0.180-0.320; applying to the passivating layer an additional protective coating; and forming photoresistor elements.

36. A method according to claim 35, wherein the supporting substrate comprises sapphire.

37. A method according to claim 35 or 36, wherein the additional protective layer comprises zinc sulphide.

38. A method according to claim 35, 36 or 37, applied to bulk single crystals, epitaxial structures on insulating substrates or complex heterostructures having an Hg1.xCdxTe upper layer.