GB2305776A - Charge amplifier - Google Patents
Charge amplifier Download PDFInfo
- Publication number
- GB2305776A GB2305776A GB9519765A GB9519765A GB2305776A GB 2305776 A GB2305776 A GB 2305776A GB 9519765 A GB9519765 A GB 9519765A GB 9519765 A GB9519765 A GB 9519765A GB 2305776 A GB2305776 A GB 2305776A
- Authority
- GB
- United Kingdom
- Prior art keywords
- charge
- substrate
- amplifier
- channel
- semiconducting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/70—Charge amplifiers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
- H01L27/0641—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region without components of the field effect type
- H01L27/0647—Bipolar transistors in combination with diodes, or capacitors, or resistors, e.g. vertical bipolar transistor and bipolar lateral transistor and resistor
- H01L27/067—Lateral bipolar transistor in combination with diodes, or capacitors, or resistors
Abstract
A charge amplifier comprises a substrate and a first layer of semiconducting material (402) contacting said substrate to form a first semiconducting channel. Regions within said semiconducting channel define a source (405), a gate (404) and a drain (406) of a field effect transistor. A capacitive element (414), (415), (416) is connected to the field effect transistor to provide charge storage. A second layer (408) of semiconducting material contacts the substrate to form a second semiconducting channel isolated from the first semiconducting channel. Regions within the said second layer define an emitter (409) and a base (410) of a bipolar transistor. The bipolar transistor is energised in order to discharge the capacitive element. The amplifier is used to integrate charge from a detector crystal subject to incident X-rays in an electron microscope.
Description
CHARGE AMPLIFIER
The present invention relates to a charge amplifier, comprising a substrate and a first layer of semiconducting material contacting said substrate to form a first semiconducting channel, wherein regions define elements of a field effect transistor within said first channel.
Charge amplifiers are known in which a field effect transistor is used in combination with a capacitive element to provide an output signal that effectively represents an integration of the input supply charge. Thus, an instantaneous output (current or voltage) is derived representing the amount of charge received over a period of time. As charge continues to be received, the output signal will ramp towards its maximum value, therefore, in order to obtain valid results over a period of time, it is necessary to periodically reset or refresh the capacitive element.
Circuits are known in which external components may be arranged to provide reset currents. However, such arrangements are unsuitable in many applications, given that they will tend to introduce noise and thereby reduce operational resolution.
Arrangements are also known in which the capacitive element is effectively refreshed by the application of a light source. A problem with such an approach is that measures must be taken to isolate incident light from other components and a suitable period of time must be provided to allow circuits to settle to normal operational states after the application of the light
A junction field effect transistor is also known in which a-fourth region, in addition to a gate, channel and drain of the conventional field effect transistor, is included as part of the field effect transistor arrangement. This fourth region forms an injector arranged to inject carriers into a layer of semiconducting material having the conventional components of the field effect transistor configured therein.However, a problem with this arrangement is that it effectively modifies the topology of the field effect transistor which may result in a deterioration of functionality during normal operation of the device.
According to the present invention, there is provided a charge amplifier comprising a substrate; a first layer of semiconducting material contacting said substrate and forming a first semiconducting channel; regions defining elements of a field effect transistor within said first channel; a capacitive element connected to said field effect transistor to provide charge storage; a second layer of semiconducting material contacting said substrate forming a second semiconducting channel isolated from said first semiconducting channel; regions defining a bipolar transistor within said second channel; and means for energising said bipolar transistor so as to discharge said capacitive element.
In a preferred embodiment, the capacitive elements fabricated on said substrate. Preferable, a heating element is fabricated on said substrate.
In a preferred embodiment, a refresh current is conducted through an external resistance, including means for short circuiting said resistance when said resistance is not required to carry a refresh current.
According to a second aspect of the present invention, there is provided a method of amplifying charge, comprising the steps of accumulating charge on a capacitive element; and energising a bipolar transistor so as to discharge said capacitive element, wherein a first layer of semiconducting material contact the a substrate and forms a first semiconducting channel, regions are formed within said channel defining elements of a field effect transistor, said capacitive element is connected to said field effect transistor and said bipolar transistor is fabricated within a second channel defined within a second layer of said semiconducting material contacting said substrate and isolated from said first semiconducting channel.
The invention will now be described by way of example only, with reference to the accompanying drawings, in which:
Figure 1 shows a scanning electron microscope having an x-ray detecting device for analysing x-rays generated by the interaction of an electron beam with a specimen under examination, wherein a cold finger is introduced within the electron examination chamber;
Figure 2 details the cold finger identified in Figure 1, including a device for detecting x-rays;
Figure 3 details the x-ray detection equipment identified in Figure
2, including an integrating charge amplifier:
Figure 4 details the construction of the charge amplifier shown in
Figure 3; and
Figure 5 details a circuit embodying the device shown in Figure 4.
A scanning electron microscope is shown in Figure 1, having an electron generating device 101, electron focusing devices 102 and an examination chamber 103. The electron microscope may be of the type manufactured and sold by the Gresham-Camscan division of Gresham
Lion Technology Ltd., Cambridge under the trade mark "EnVac". In this device, a differential pressure may be established with the sample chamber 103 being maintained at higher pressure than the rest of the electron column, comprising the electron generating device 101 and the electron processing devices 102. The differential pressure is maintained by a pressure limiting aperture that allows the beam to pass from the high vacuum environment of the column into the lower vacuum of the specimen chamber.The vacuum conditions in the specimen chamber are dynamically monitored and automatically regulated to the value set by an operator.
When very low pressures are maintained within the specimen chamber, it is possible to make use of back scattering electron detection and x-ray detection, wherein the frequency of x-rays emitted from the specimen, as a result of an interaction between the electron beam and the specimen atoms, provides an indication of the elemental constituency of the specimen under examination.
The microscope includes optical devices 104, arranged to produce a viewable image via binocular optics 105. In addition, photographic records may be produced using photographic equipment 106.
X-ray detection is provided by a silicon crystal, as is well known in the art. In order for this crystal to operate it is necessary for it to be maintained at a temperature substantially below that of ambient, conventionally achieved using a source of liquid nitrogen. Liquid nitrogen is contained within a flask 107 and the detection equipment is mounted on a thermally conductive cold finger 108. Thus, the cold finger 108 contacts the liquid nitrogen within the flask 107 thereby transmitting heat from the vicinity of the detection device within the chamber 103 to the cooling environment provided by the liquid nitrogen within the flask 107. The cold finger 108 is shown in greater detail in
Figure 2 and comprises a protective outer sleeve 201 with a cold finger element 202 supported within said sleeve. X-rays enter the finger through a window 203, arranged to maintain a vacuum within the finger housing, comprising a cold finger cavity 204, when the specimen cavity 103 is open to atmospheric pressure. The window 203 is manufactured from a material such as beryllium, that is transparent to x-rays at frequencies of interest.
The x-ray detection crystal is arranged to facilitate interaction with x-ray photons. In this configuration there is a high probability that an incident photon will interact with an electron of an atom in the crystal lattice thereby producing a high energy photoelectron. This photoelectron dissipates within the crystal resulting in the liberation of free charge. Thus, the subsequent process of x-ray detection involves measuring the charge liberated in this way using a charge sensitive preamplifier. The charge sensitive pre-amplifier incorporates a field effect transistor as a first stage in combination with a feed-back capacitor.
The field effect transistor is directly coupled to the silicon crystal and placed in very close proximity to the crystal, so as to minimise stray capacitance and noise.
A detector/amplifier combination 205/206 is detailed in Figure 3.
X-rays of sufficient energy received at the detector crystal 205 result in the generation of electric charge, in accordance with the photoelectric effect. This charge is amplified and effectively integrated by an integrating amplifier 206, that in turn provides a stable output signal to a power amplifier 307.
The integrating amplifier 206 and the detector 205 are maintained at a temperature substantially below ambient, achieved by thermal conduction from the cold finger element 202, while the power amplifier 307 is housed elsewhere. In order to reduce the effects of thermal and microphonic noise, the integrating amplifier 206 is positioned as close as possible to the detector 205. As previously described, it is necessary for the detector 205 to be maintained at a temperature substantially below ambient in order for it to function correctly. However, in order for the integrating amplifier 206 to operate as required, additional heating must be provided and, conventionally, this heating is provided by mounting a heating element externally- to the encapsulated amplifier and detector circuitry.
Charge liberated by the silicon sensor accumulates on the plates of the feed back capacitor, thereby causing the output from amplifier 206 to rise substantially linearly. In order to prevent the amplifier output from saturating, a reset operation is performed intermittently, by discharging the feed back capacitor by means of a re-fresh circuit 308.
The field effect transistor shown in Figure 3 is detailed in Figure 4. A plurality of devices of the type shown in Figure 4 are fabricated on a substrate 401 of heavily doped p+ silicon, whereafter individual devices are derived by cutting the silicon into individual chips. An ntype epitaxial layer 402 is grown onto the substrate 401 to a thickness of approximately 5 micrometres, thereby forming channel regions, to be subsequently covered by a passivation layer of silicon dioxide. Windows are opened into the oxide layer by a process of photolithography and etching, whereafter the assembly is introduced to an atmosphere of high temperature boron. Boron atoms diffuse into the epitaxial layer to form isolation diffusion regions, including region 403.
After the isolation regions, such as region 403, have been formed, additional windows are opened in the oxide layer such that doped regions may be provided to define a p+ type gate 404, an n+ type source 405 and an n+ type drain 406, as is well known in the art. Each of these regions has a gold contact 407 connected thereto from which conductors extend to define gate, source and drain terminals respectively.
Adjacent to layer 402, and separated by isolation region 403, a similar layer 408 is provided. Within region 408 elements of a bipolar transistor are constructed by doping layer 408 to define a p+ emitter region 409 and an n type base region 410, each having gold contacts connected thereto with conducting elements extending from said contacts. The contact extending from base region 410 is connected directly to the conducting element extending from source region 405. The bipolar transistor elements are completed by a collector terminal having a contact applied directly to the underlying substrate 401.
Adjacent to layer 402 a similar layer 413 is provided, separated by layer 402 by an isolation region 403. Within region 413 elements of a capacitor, to serve as the feed back capacitor of the charge amplifier, are constructed. A first layer 413 is doped to n+, to define one electrode 414 of the capacitor. A silicon dioxide layer 415 is laid on top of the first layer 413 to form the dielectric. A top aluminium electrode 416 then serves as the second electrode, whereafter a contact is made to layer 414. In order to effect a refresh of the field effect transistor elements, a refresh pulse is applied to an emitter input terminal 411, resulting in current being allowed to flow between the collector terminal 410 and the emitter terminal 411.As a result of this current flow, conducting characteristics within channel 402 are also modified, resulting in accumulated charge being conducted away, thereby effecting the refresh condition.
In the arrangement shown in figure 4, the heating element is constructed in an isolated region 417 by doping the region with two n+ type regions 418 and by applying a gold electrode 419 to form a resistive element between the two electrodes. In this way, the heating element is provided as an integral part of the field effect transistor chip and as such requires substantially less power in order to provide the required rise in temperature. Typically 2.5 volts are applied to the terminals of the heater element resulting in approximately 25mW being dissipated.
A circuit representation of the field effect transistor with its associated elements are shown in Figure 5. The devices are constrained within a low loss dielectric material such as boron nitride. An input terminal 502 is connected to the x-ray detector crystal and is placed as close as possible to said crystal in order to minimise noise effects.
The amplifier output is monitored by means of a comparator and when the output reaches a pre-determined level, a positive pulse is applied to the refresh electrode 508, resulting in currents being collected by the substrate 505 which is also arranged to act as the collector for the pnp bipolar transistor. The collector terminal is connected to ground via a resistor 511 of typically 10 kohms and the resulting voltage pulse developed across this resistor 511 provides a refresh current that is collected by the gate terminal 502, resulting in capacitor 512 being discharged and the amplifier reset. The resulting amplifier output reset results in the comparator ceasing to reproduce a refresh pulse.
Electronic switch 513 across resistor 511 is also driven by the refresh circuit and is maintained open for the duration of the refresh pulse. At other times, switch 513 is closed, thereby short circuiting resistor 511 to avoid the introduction of noise via this resistor.
Claims (16)
1. A charge amplifier, comprising a substrate; a first layer of semiconducting material contacting said substrate and forming a first semiconducting channel; regions defining elements of a field effect transistor within said first channel;
a capacitive element connected to said field effect transistor to provide charge storage;
a second layer of semiconducting material contacting said substrate forming a second semiconducting channel isolated from said first semiconducting channel;
regions defining a bipolar transistor within said second channel; and
means for energising said bipolar transistor so as to discharge said capacitive element.
2. An amplifier recorded in claim 1, where in the substrate is t type semiconducting material and said first layer is n type semiconducting material.
3. An amplifier according to claim 1 or claim 2, wherein said elements of said field transistor comprise a source, a gate and a drain.
4. An amplifier according to claim 3, wherein a base of said bipolar transistor is connected to the source of said fuel defect transistor.
5. An amplifier. according to any of claims 1-4, wherein said capacitive element is fabricated on said substrate.
6. An amplifier according into any claims 1-5, wherein a heating element is fabricated on said substrate.
7. An amplifier according to any of claims 1-6, wherein a refresh current is conducted through an external resistance, including means for short circuiting said resistance when said resistance is not required to carry a refresh current.
8. An amplifier according to any of claims 1-7, arrange to amplify signals generated by an x-ray detection device.
9. An amplifier according to claim 8, wherein x-rays are generated by electron bombardment of a specimen in an electron microscope.
10. A method of amplifying charge, comprising the steps of accumulating charge on a capacitive element; and
energising a bipolar transistor so as to discharge said capacitive element, wherein
a first layer of semiconducting material contacts a substrate and forms a first semiconducting channel, regions are formed within said channel defining elements of a field effect transistor, said capacitive element is connected to said field effect transistor and said bipolar transistor is fabricated within a second channel defined within a second layer of said semiconducting material contacting said substrate and isolated from said first semiconducting channel.
11. A method according to claim 10 wherein a refresh current is conducted through an external resistance and said resistance is short circuited when not required to carry a refresh current.
12. Method according to claim 10 or claim 11, where in said charge is generated by an x-ray detection system.
13. A method according to claim 12, where in said the x-rays are generated by electron bombardment for the specimen in an electron microscope.
14. A charge amplifier substantially as here in described with reference to Figure 4 and Figure 5.
15. A method of amplifying charge substantially as here in described with reference to Figure 3, Figure 4 and Figure 5.
16. An electron microscope having a charge amplifier for amplifying charge generated by an x-ray detection device substantially as here in described with reference to the accompanied Figures.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB9519765A GB2305776B (en) | 1995-09-28 | 1995-09-28 | Charge amplifier |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB9519765A GB2305776B (en) | 1995-09-28 | 1995-09-28 | Charge amplifier |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| GB9519765D0 GB9519765D0 (en) | 1995-11-29 |
| GB2305776A true GB2305776A (en) | 1997-04-16 |
| GB2305776B GB2305776B (en) | 1999-11-17 |
Family
ID=10781399
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB9519765A Expired - Fee Related GB2305776B (en) | 1995-09-28 | 1995-09-28 | Charge amplifier |
Country Status (1)
| Country | Link |
|---|---|
| GB (1) | GB2305776B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2012156748A1 (en) | 2011-05-19 | 2012-11-22 | Oxford Instruments Nanotechnology Tools Limited | Charge-sensitive amplifier |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4677589A (en) * | 1985-07-26 | 1987-06-30 | Advanced Micro Devices, Inc. | Dynamic random access memory cell having a charge amplifier |
| WO1993011540A1 (en) * | 1991-11-26 | 1993-06-10 | Purdue Research Foundation | Nonvolatile random access memory device |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0627767B1 (en) * | 1988-06-27 | 2002-11-06 | Texas Instruments Incorporated | Process for fabricating JFET transistors and capacitors |
-
1995
- 1995-09-28 GB GB9519765A patent/GB2305776B/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4677589A (en) * | 1985-07-26 | 1987-06-30 | Advanced Micro Devices, Inc. | Dynamic random access memory cell having a charge amplifier |
| WO1993011540A1 (en) * | 1991-11-26 | 1993-06-10 | Purdue Research Foundation | Nonvolatile random access memory device |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2012156748A1 (en) | 2011-05-19 | 2012-11-22 | Oxford Instruments Nanotechnology Tools Limited | Charge-sensitive amplifier |
| GB2491111A (en) * | 2011-05-19 | 2012-11-28 | Oxford Instr Nanotechnology Tools Ltd | Charge sensitive amplifier with reduced bond pad capacitance |
| JP2014519261A (en) * | 2011-05-19 | 2014-08-07 | オックスフォード インストルメンツ ナノテクノロジー ツールス リミテッド | Charge detection amplifier |
| GB2491111B (en) * | 2011-05-19 | 2015-08-19 | Oxford Instr Nanotechnology Tools Ltd | Charge-sensitive amplifier |
| US9397626B2 (en) | 2011-05-19 | 2016-07-19 | Oxford Instrument Nanotechnology Tools Limited | Charge-sensitive amplifier |
| JP2017098996A (en) * | 2011-05-19 | 2017-06-01 | オックスフォード インストルメンツ ナノテクノロジー ツールス リミテッド | Charge-sensitive amplifier |
Also Published As
| Publication number | Publication date |
|---|---|
| GB9519765D0 (en) | 1995-11-29 |
| GB2305776B (en) | 1999-11-17 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 20110928 |