GB2281631A - Test apparatus - Google Patents
Test apparatus Download PDFInfo
- Publication number
- GB2281631A GB2281631A GB9318551A GB9318551A GB2281631A GB 2281631 A GB2281631 A GB 2281631A GB 9318551 A GB9318551 A GB 9318551A GB 9318551 A GB9318551 A GB 9318551A GB 2281631 A GB2281631 A GB 2281631A
- Authority
- GB
- United Kingdom
- Prior art keywords
- test
- test apparatus
- device under
- data
- digital
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
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Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/2607—Circuits therefor
- G01R31/2632—Circuits therefor for testing diodes
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2832—Specific tests of electronic circuits not provided for elsewhere
- G01R31/2834—Automated test systems [ATE]; using microprocessors or computers
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- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Tests Of Electronic Circuits (AREA)
Abstract
A test apparatus suitable for testing diodes (D.U.T) has an interface 2b allowing test measurements to be gathered by an external device, such as a computer 1b for analysis. The interface may also allow for control of the test apparatus by the external device. Plural such test apparatus may be controlled by a single external computer. <IMAGE>
Description
TEST APPARATUS
BACKGROUND OF TEIE INVENTION (a) Field of the Invention
The present invention relates to test apparatus, and to a test system incorporating a test apparatus and a computer.
(b) Description of the Prior Art
Test results are conventionally recorded manually and statistical data are drawn out in a graph or table for analysis. These manual operations are inefficient and do not meet the practical demand. It is important for industry to improve efficiency in testing.
A main object of the invention is to provide a test apparatus which enables test results to be gathered by an external device for analysis, especially statistical analysis.
According to a first aspect of the present invention there is provided a test apparatus having means for applying at least one test signal to a device under test, means for sensing a response of said device to said test signal and data interface means having a first port connectable to said means for sensing and a second port connectable to response analyzer means for outputting data representative of said response to said response analyzer means, whereby statistical data on the responses of plural devices under test may be derived.
According to a second aspect of the present invention there is provided a test system comprising a test apparatus of the first aspect of the invention and further comprising a computer connected to said second port of said data interface means whereby said computer is operable as said response analyzer means and is further operable to provide control data at said second port.
The advantages of the test apparatus include:a) the provision of an interconnectable structure in which the multi-drop system concept in networking is used.
b) a plurality of test apparatus may be connected to a personal computer so that testing can be fully automated.
c) modular design with reserved space allows the system future expansion.
Where the apparatus is connected to a computer to form a test system, the system has real time data processing capability. This allows the computer to receive the test data from the test apparatus continuously while processing other data and controlling the test operation. Further test parameters can be set up and the data can be accessed and processed directly. Thus the test data can be efficiently handled and managed. In addition, the password to the computer systems can be set up to ensure security of the test data for the factory.
The test apparatus is further advantageous since the software for control is completely based on system I/O structure to process. Hence, data processing speed is extremely fast. Also the apparatus uses a standard RS-422 interface to prevent interference in the manufacturing environment.
An embodiment of the invention will now be described by way of example with respect to the accompanying drawings in which:
FIG. 1 shows a block diagram of an embodiment of a test apparatus in accordance with the present invention;
FIG 2 shows the control block diagram for a test system of the present invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT
Fig 1 shows a test apparatus which may be used for testing diodes or other rectifiers. The apparatus is connectable to a response analyzer means, which may be embodied as a personal computer (PC). Such analyzer means may of course be coupled to plural test apparatus. In any event the analyzer means is operable to record responses from plural devices under test (DUT) and to analyze these responses, for example by statistical means.
The test apparatus of fig 1 includes:
1. CENTRAL PROCESSING UNIT (lob): The Central
Processing Unit (lib) is a digital circuitry controlling the operation of the interconnected rectifier tester system. It connects to other circuits such as liquid crystal display, light emitting diodes and keyboard for operator interface.
2. INTERFACE UNIT (2b): Interface with the Central
Processing Unit (lib), it handles RS-232, RS-422, RS-485 and
IEEE-488 hardware interface. All of the interfaces are user selectable. The function of the interface unit is to transmit data between the personal computer and the tester.
Data transmitted can either be the measurement value, control and test data or system status.
3. MECHANICAL I/O INTERFACE UNIT (3b): The function of this unit is to handle the automated control signals of the automatic machinery. This unit includes a test initialization signal (start of test), end of tast signal, solenoid valve driver signal and a group of control signals for the system.
4. FIRST DIGITAL-TO-ANALOG CONVERTER UNIT (4bl): This unit is made up of a 16-bit high resolution D/A converter, multiplexer, digital decoder and digital control circuit.
The digital signals from the central processing unit (lib) are converted into analog signals for controlling an output current amplifier (7bl, 7b2) or an output voltage amplifier (8b). The voltage or current generated from the amplifiers are applied to the device under test (D.U.T.).
5. SECOND DIGITAL-TO-ANALOG CONVERTER UNIT(4b2): This unit is also made up of a 16-bit high resolution D/A converter, multiplexer, digital decoder and digital control circuit. Its function is similar to the first digital-toanalog converter unit (4bl).
6. ANALOG-TO-DIGITAL CONVERTER UNIT (5b) This unit is made up of a 16-bit high resolution A/D converter, analog multiplexers and digital control circuitry. It is used to convert the analog signals into digital signals for the central processing unit (lib) to process. The analog signals include signals from the voltage sources of the rectifier testers, the current amplifier and the voltage and current reading of the device under test.
7. INPUT VOLTAGE AMPLIFIER (6bl): It is made up of operation amplifiers. Its function is to amplify the low level voltage signal from the measurement. In addition, it is also used to measure high voltage by using an analog voltage divider. Hence, this unit can measure voltage from different ranges.
8. INPUT CURRENT AMPLIFIER (6b2): It is made up of operation amplifiers. Its function is to amplify the low level current signal from the input. When the input signal is too high, a divider circuit is used to divide the current so that the unit can make current measurement from different ranges.
9. OUTPUT CURRENT AMPLIFIERS (7bl) (7b2): Its building blocks are operational amplifiers. The output current amplifiers (7bl and 7b2) are controlled by the first digital-to-analog converter unit (4bl) and the second digital-to-analog converter unit (4b2) and generate the output current which are then applied to the device under test.
10. OUTPUT VOLTAGE AMPLIFIER (8b): It is also made up of operational amplifiers. This output voltage amplifier (8b) also gets its input from the first digital-to-analog converter unit (4bl) and the second digital-to-analog converter unit (4b2). The output from the voltage amplifier (8b) can be applied to the device under test for testing purpose.
11. SWITCHING UNIT (9b): This unit is made up of mercury switches, relays and digital circuits. It is used to switch the high voltage and high current for testing different modules of rectifiers.
The test apparatus of fig 1, as mentioned above, may be connected to a personal computer, in which case the computer may not only carry out response analyses, but may also subsume control functions which would otherwise be carried out by the CPU (lib), if operating autonomously.
In production lines a single computer may be networked with plural test apparatus for collecting and analyzing results and for real-time warning of out-of-tolerance devices under test.
Fig 2 shows the csntrol organisation of a computer for both analyzing responses and for controlling the operation of test apparatus of the invention. The various functions are:
1. PASSWORD SETUP (la): This is used to ensure a limited access to the use of the system by authorized personnel only. The system also has the function of
Password Authentication to determine the Authentication
Hierarchy. Different Password Authentication has a different Authentication Hierarchy and the system automatically determines the authentication.
2. OPERATOR MODE (2a): In this mode of operation, the operator can only operate the test apparatus by using the pre-setup data (2al) and loading (2a2) them into the system. This mode is suitable to be used by the operator in the production line.
3. ENGINEER MODE (3a): This mode is to be used by engineers on Full Screen Setup (3al), loading the Setup
File (3a2) and Storing the Setup Data (3a3).
4. MAINTENANCE MODE (4a): The authentication in this mode is divided into a Calibration Mode (4al) and the
Solenoid Valve Driver Test (4a2). The Calibration Mode (4al) is further divided into D/A and A/D Converter (4all),
IF and VF Dynamic Test (4a12), PIV Voltage Source (4a13) and PIV and IR Dynamic Test (4a14).
5. FILE HANDLING (5a): This is divided into Operation
File Loading (5al), and File Deletion and Display (5a3). It can also exist to DOS (Disk Operating System) directly.
6. GRAPHIC HANDLING (6a): This can display the results of measurement of the PIE Chart (6al) and the BAR Chart (6a2). Using these two function, the data in the storage can also be displayed graphically (6all) (6a21). Some of the real time data can also be displayed in the computer (6a12) (6a22).
7. PRINT OUT (7a): The data files and the graphics can be print out for reference and storage.
The described embodiment of a rectifier tester can be used to test a variety of rectifiers. These include
Schottky diode, plastic diode, fast switching diode, efficient diode, ultra fast switching diode, soft recovery fast switching diode, glass passivated diode, control
Avalanche diode, bridge rectifier, center tap switching rectifier, fast switching bridge rectifier, surface mounted rectifier, dice varistor, light emitting diode, tunnel diodes and zener diodes.
Claims (14)
1. A test apparatus having means for applying at least one test signal to a device under test, means for sensing a response of said device to said test signal and data interface means having a first port connectable to said means for sensing and a second port connectable to response analyzer means for outputting data representative of said response to said response analyzer means, whereby statistical data on the responses of plural devices under test may be derived.
2. A test apparatus according to claim 1 further having processor means for providing control data for said test apparatus.
3. A test apparatus according to claim 2 wherein said data interface means is operable to provide control data incident at said second port to said first port whereby said test apparatus is alternatively controllable by said data at said second port or by said control data from said processor means.
4. A test apparatus according to claim 3 further comprising a mechanical interface for a handling system for a device under test.
5. A test apparatus according to any one of claims 2-4 wherein said means for applying comprises converter means responsive to said control data for setting said at least one test signal.
6. A test apparatus according to claim 5 wherein said means for applying further comprises a voltage amplifier and a current amplifier respectively for applying test voltages and test currents to said device under test.
7. A test apparatus according to any one of claims 2-6 wherein said means for sensing comprises converter means responsive to said response of said device to provide said data representative of said response.
8. A test apparatus according to claim 7 wherein said means for sensing further comprises a voltage amplifier and a current amplifier responsive respectively to the voltage and current responses of said device under test.
9. A test apparatus according to any of proceeding claim further comprising a switching unit operable to connect said means for applying to a device under test, and to connect said device under test to said means for sensing.
10. A test apparatus according to any proceeding claim adapted for testing rectifiers.
11. A test system comprising a test apparatus according to any one of claims 3-10 and further comprising a computer connected to said second port of said data interface means whereby said computer is operable as said response analyzer means and is further operable to provide said control data at said second port.
12. A test apparatus comprising:
a central processing unit, for controlling the operation of the test apparatus, said central processing unit having I/O circuits including liquid crystal display, light emitting diodes and keyboard for operator interface;
an interface unit, connectable to a personal computer, said interface including RS-232, RS-422, RS-485 and IEEE488 hardware interface which are all user selectable, to provide a path of data transmissicn between said personal computer and the test apparatus testers, whereby a measurement value, control and test data or system status may be transmitted;
a mechanical I/O interface unit, for handling a control signal of associated automatic machinery, said mechanical I/O interface unit including a test initialization signal (start of test), end of test signal, solenoid valve driver signal and a group of control signals for the apparatus;
a digital-to-analog converter unit, having a 16-bit high resolution D/A converter, multiplexer, digital decoder and digital control circuit, signals from the central processing unit being converted into analog signals for controlling an output current amplifier or an output voltage amplifier, the voltage or current generated from the amplifiers are applied to the device under test;
An analog-to-digital converter unit, having a 16-bit high resolution A/D converter, analog multiplexers and digital control circuitry, said analog-to digital converter unit being used to convert analog signals into digital signals for the central processing unit to process, wherein said analog signals include signals from voltage sources of the test apparatus, a current amplifier and a voltage and current reading of the device under test;
an input voltage amplifier having operational amplifiers, for amplifying low voltage signals from the device under test, and high voltage signals by using an analog voltage divider;
an input current amplifier, having operation amplifiers, for amplifying low current signals from the device under test, and a divider circuit for dividing high currents;
said output current amplifier having operational amplifiers, and being controlled by the digital-to-analog converter unit to generate the output current for the device under test;
said output voltage amplifier having operational amplifiers, and being controlled by the digital-to-analog converter unit to produce an output for the device under test; and:
a switching unit, which is made up of mercury switches, relays and digital circuits, said switching unit is used to switch the high voltage and high current for testing different devices under test.
13. A test apparatus constructed and arranged substantially as described with reference to and as illustrated in the accompanying drawings.
14. A test system constructed and arranged substantially as described with respect to the accompanying drawings.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9318551A GB2281631A (en) | 1993-09-07 | 1993-09-07 | Test apparatus |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9318551A GB2281631A (en) | 1993-09-07 | 1993-09-07 | Test apparatus |
Publications (2)
Publication Number | Publication Date |
---|---|
GB9318551D0 GB9318551D0 (en) | 1993-10-20 |
GB2281631A true GB2281631A (en) | 1995-03-08 |
Family
ID=10741652
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB9318551A Withdrawn GB2281631A (en) | 1993-09-07 | 1993-09-07 | Test apparatus |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB2281631A (en) |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1399186A (en) * | 1972-09-12 | 1975-06-25 | Ibm | Obtaining error analysis data for a system |
GB1449777A (en) * | 1973-11-10 | 1976-09-15 | Ibm | Error analysis |
WO1988005918A1 (en) * | 1987-02-06 | 1988-08-11 | Analytics Incorporated | Maintenance system |
WO1988008542A1 (en) * | 1987-04-23 | 1988-11-03 | Grumman Aerospace Corporation | Programmable tester with bubble memory |
GB2220754A (en) * | 1988-06-03 | 1990-01-17 | Tokyo Seimitsu Co Ltd | Testing semi-conductor devices |
GB2248696A (en) * | 1990-10-12 | 1992-04-15 | Intepro Systems Dev Limited | Computer controlled test apparatus |
-
1993
- 1993-09-07 GB GB9318551A patent/GB2281631A/en not_active Withdrawn
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1399186A (en) * | 1972-09-12 | 1975-06-25 | Ibm | Obtaining error analysis data for a system |
GB1449777A (en) * | 1973-11-10 | 1976-09-15 | Ibm | Error analysis |
WO1988005918A1 (en) * | 1987-02-06 | 1988-08-11 | Analytics Incorporated | Maintenance system |
WO1988008542A1 (en) * | 1987-04-23 | 1988-11-03 | Grumman Aerospace Corporation | Programmable tester with bubble memory |
GB2220754A (en) * | 1988-06-03 | 1990-01-17 | Tokyo Seimitsu Co Ltd | Testing semi-conductor devices |
GB2248696A (en) * | 1990-10-12 | 1992-04-15 | Intepro Systems Dev Limited | Computer controlled test apparatus |
Also Published As
Publication number | Publication date |
---|---|
GB9318551D0 (en) | 1993-10-20 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |