GB2265511A - Direct frequency synthesiser - Google Patents

Direct frequency synthesiser Download PDF

Info

Publication number
GB2265511A
GB2265511A GB9311017A GB9311017A GB2265511A GB 2265511 A GB2265511 A GB 2265511A GB 9311017 A GB9311017 A GB 9311017A GB 9311017 A GB9311017 A GB 9311017A GB 2265511 A GB2265511 A GB 2265511A
Authority
GB
United Kingdom
Prior art keywords
accumulator
output
digital
synthesiser
digital word
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB9311017A
Other versions
GB2265511B (en
GB9311017D0 (en
Inventor
Peter Henry Saul
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Plessey Semiconductors Ltd
Original Assignee
Plessey Semiconductors Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from GB9000317A external-priority patent/GB2239748B/en
Application filed by Plessey Semiconductors Ltd filed Critical Plessey Semiconductors Ltd
Priority to GB9311017A priority Critical patent/GB2265511B/en
Publication of GB9311017D0 publication Critical patent/GB9311017D0/en
Publication of GB2265511A publication Critical patent/GB2265511A/en
Application granted granted Critical
Publication of GB2265511B publication Critical patent/GB2265511B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G06F7/548Trigonometric functions; Co-ordinate transformations
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/02Digital function generators
    • G06F1/022Waveform generators, i.e. devices for generating periodical functions of time, e.g. direct digital synthesizers
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06JHYBRID COMPUTING ARRANGEMENTS
    • G06J1/00Hybrid computing arrangements

Abstract

A direct frequency synthesiser includes an accumulator 2 having an input receiving a digital word representative of the desired frequency, a clock controlling the successive adding of the digital word to the contents of the accumulator 2 to provide a periodically varying value representing a sawtooth waveform at the output of the accumulator, an XOR gate system 10 to convert the sawtooth waveform to an equilateral triangle form and integrators 12, 14 to provide an output to a digital to analog converter 8 in order to provide a sine wave of a desired purity. <IMAGE>

Description

Direct Frequency Synthesiser This invention relates to a direct frequency synthesiser.
Direct frequency synthesisers are known and are for example described in IEEE Journal of Solid-State Circuits, Vol. 23 No. 3 June 1988 "A Direct Digital Synthesiser with 100 MHz Output Capability" P.H.Saul, M.S.J. Mudd pp 819 to 821. Such a synthesiser is shown in Figure 1 as comprising an accumulator 2 for receiving a digital word at an input 4 representative of the desired frequency, which word is successively added to the contents of the accumulator under the control of the system clock to provide a periodically varying output value having the form of a sawtooth wave. The output value is converted by means of a ROM 6 to digital values representing a desired waveform, e.g. triangular, sine, square, which digital values are applied to a Digital to Analog converter 8 which provides an analog waveform at its output.
Figure 2 shows a modification of the known synthesiser, in accordance with the present invention, similar parts being indicated by similar reference numerals. The output of accumulator 2 is output via gate system 10 which provides an equal-sided triangular waveform to first and second integrators 12, 14 which are equivalent to low pass filters, in order to generate an output sine waveform.
In accordance with the present invention, therefore, a direct frequency synthesiser includes an accumulator having an input for receiving a digital word representative of the desired frequency, clock means for controlling the successive adding of the digital word to the contents of the accumulator to provide a periodically varying value at the output of the accumulator means, and integrator/low pass filter means coupled to receive the accumulator output and to provide an output to a digital to analog converter in order to provide a sine wave of a desired purity.

Claims (3)

1. A direct frequency synthesiser including an accumulator having an input for receiving a digital word representative of the desired frequency, clock means for controlling the successive adding of the digital word to the contents of the accumulator to provide a periodically varying value at the output of the accumulator means, and integrator/low pass filter means coupled to receive the accumulator output and to provide an output to a digital to analog converter in order to provide a sine wave of a desired purity.
2. A synthesiser according to Claim 1 wherein a gate system is coupled to the output of the accumulator means for providing an equal sided triangular waveform.
3. A synthesiser according to Claim 2 wherein the gate system comprises an array of exclusive -OR gates coupled to receive the ouput data bits from the accumulator.
GB9311017A 1990-01-06 1993-05-28 Direct frequency synthesiser Expired - Fee Related GB2265511B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB9311017A GB2265511B (en) 1990-01-06 1993-05-28 Direct frequency synthesiser

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB9000317A GB2239748B (en) 1990-01-06 1990-01-06 Direct frequency synthesiser
GB9311017A GB2265511B (en) 1990-01-06 1993-05-28 Direct frequency synthesiser

Publications (3)

Publication Number Publication Date
GB9311017D0 GB9311017D0 (en) 1993-07-14
GB2265511A true GB2265511A (en) 1993-09-29
GB2265511B GB2265511B (en) 1994-01-26

Family

ID=26296466

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9311017A Expired - Fee Related GB2265511B (en) 1990-01-06 1993-05-28 Direct frequency synthesiser

Country Status (1)

Country Link
GB (1) GB2265511B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5810935A (en) * 1994-12-06 1998-09-22 Electronics And Telecommunications Research Institute Apparatus for transferring a wafer

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2217127A (en) * 1988-04-07 1989-10-18 Plessey Co Plc Direct frequency synthesiser

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2217127A (en) * 1988-04-07 1989-10-18 Plessey Co Plc Direct frequency synthesiser

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5810935A (en) * 1994-12-06 1998-09-22 Electronics And Telecommunications Research Institute Apparatus for transferring a wafer

Also Published As

Publication number Publication date
GB2265511B (en) 1994-01-26
GB9311017D0 (en) 1993-07-14

Similar Documents

Publication Publication Date Title
US4939516A (en) Chopper stabilized delta-sigma analog-to-digital converter
US4968987A (en) Delta-sigma modulation analog to digital converter
US5055846A (en) Method for tone avoidance in delta-sigma converters
ATE175062T1 (en) AD CONVERTER WITH MODULATED JAMMER SIGNAL
JPH01305725A (en) Digital/analog converter
GB2276495A (en) A digital beamforming array
CA2140536A1 (en) Apparatus and Method for Producing an Analog Output Signal from a Digital Input Word
RU94006025A (en) MODULATED FOOTABLE PUSH-MUSIC SIGNAL
JPH0613905A (en) A/d converter
US5243346A (en) Digital-to-analog converting device using decoders and parallel-to-serial converters
JPS57125517A (en) Da conversion circuit
EP0297503A3 (en) Oversampling a/d converter with two capacitor arrays
GB2158318A (en) Fading circuit for video signals
GB2265511A (en) Direct frequency synthesiser
JP3367800B2 (en) Selection device, A / D converter and D / A converter using the same
US4792794A (en) Differential pulse code modulation system with neutralization of direct current information
MX9606016A (en) Multiple access up converter/modulator and method.
SU1742995A1 (en) Displacement-to-code converter
JPH0441647Y2 (en)
EP0180461A3 (en) Improvements in or relating to digital to analogue converters
JPS54150013A (en) Digital signal transmission system
EP0350663A3 (en) Circuit arrangement for the demodulation of a subcarrier
SU840956A1 (en) Function generator
GB2239749A (en) Direct frequency synthesiser
SU1543545A1 (en) Frequency synthesizer

Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20040106