GB2256949A - Integrated bandgap voltage reference having improved substrate noise immunity - Google Patents
Integrated bandgap voltage reference having improved substrate noise immunity Download PDFInfo
- Publication number
- GB2256949A GB2256949A GB9124287A GB9124287A GB2256949A GB 2256949 A GB2256949 A GB 2256949A GB 9124287 A GB9124287 A GB 9124287A GB 9124287 A GB9124287 A GB 9124287A GB 2256949 A GB2256949 A GB 2256949A
- Authority
- GB
- United Kingdom
- Prior art keywords
- reference voltage
- node
- generating circuit
- substrate
- resistive means
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Links
- 239000000758 substrate Substances 0.000 title claims description 61
- 230000036039 immunity Effects 0.000 title 1
- 239000003990 capacitor Substances 0.000 claims description 24
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 17
- 229920005591 polysilicon Polymers 0.000 claims description 17
- 239000004065 semiconductor Substances 0.000 claims description 16
- 238000009792 diffusion process Methods 0.000 claims description 10
- 238000009413 insulation Methods 0.000 claims description 4
- 238000001914 filtration Methods 0.000 claims description 3
- 230000003071 parasitic effect Effects 0.000 description 8
- 230000008878 coupling Effects 0.000 description 5
- 238000010168 coupling process Methods 0.000 description 5
- 238000005859 coupling reaction Methods 0.000 description 5
- 238000000034 method Methods 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000010355 oscillation Effects 0.000 description 3
- 230000001419 dependent effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000000737 periodic effect Effects 0.000 description 1
- 230000001052 transient effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/30—Regulators using the difference between the base-emitter voltages of two bipolar transistors operating at different current densities
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
- G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0214—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Electromagnetism (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Control Of Electrical Variables (AREA)
- Semiconductor Integrated Circuits (AREA)
Description
REFERENCE VOLTAGE GENERATING CIRCUIT
The present invention relates to an internal voltage drop circuit capable of reducing an external supply voltage to a given value, and is concerned particularly although not exclusively with a reference voltage generating circuit having a band gap reference circuit.
A VLSI (very large scale integrated circuit) over 16M bits may typically require an internal voltage drop circuit, using an external supply voltage less than 5V, to derive an internal operation voltage of a chip, in order to improve the operational characteristic of a memory device, with scaling down of the memory device. Generally, an internal voltage drop circuit comprises a reference voltage generating circuit, a pull-up voltage circuit readjusting a reference voltage upward, and an output terminal. Some known reference voltage generating circuits are of a threshold voltage dependent type, using the threshold voltage of a transistor and band gap reference (BGR) circuit using the energy band gap.In particular, the reference voltage generating circuit should generate a constant voltage, regardless of the variance of external circumstances such as the external supply voltage and temperature change. However, the threshold voltage dependent type circuit generally does not generate a constant reference voltage, because of fluctuation of the threshold voltage in accordance with variance of temperature and manufacturing process. On the other hand, the
BGR circuit has the merit that the change rate of reference voltage can be easily controlled by an output terminal resistor, and that the variance of manufacturing process tends not to influence the reference voltage, because an output voltage is determined by both a transistor emitter-base voltage of transistor and the resistor of the output terminal.
Figure 1 of the accompanying drawings illustrates a conventional BGR circuit. The BGR circuit comprises a first resistor 4 connected between a supply voltage terminal Vcc and a first node 1, a second resistor 5 connected between the first node 1 and a second node 3, a first transistor 6 with an emitter and collector respectively connected to the second node 3 and a ground voltage terminal Vss, a third resistor 7, a second transistor 8 and a fourth resistor 9 all connected in serial between the first node 1 and the ground voltage terminal Vss, and a third transistor 10 with a collector and emitter connected between the first node 1 and the ground voltage terminal The The reference voltage VREF is derived from the first node 1 as the output voltage.A base of the first transistor 6 is connected to the collector thereof and to a base of the second transistor 8. A base of the third transistor 10 is connected to a collector of the second transistor 8.
The reference voltage VREF independent of temperature change is obtained by combining the emitter-base voltage of negative temperature coefficient (aVBE/8T= -2.2 mV/ C) and thermal voltage of positive temperature coefficient (aV/aT=o.086 mV/ C). Assuming that the first and second transistors 6 and 8 are the same in area, and the base-emitter voltages of the first and third transistors 6 and 10 are the same, the reference voltage
VREF is expressed as follows:
wherein R1, R2 and R3 are the resistor values of the first, second and third resistors, k is Boltzman's constant, T is absolute temperature, q is electric charge, and VBE3 the base-emitter voltage of the third transistor 10.
Figure 2 of the accompanying diagrammatic drawings illustrates a cross-sectional view of a substrate, in the case of forming a resistor of the
BGR circuit with a polysilicon layer. On the semiconductor substrate 11 of
P type, receiving negative substrate voltage VBB, a field oxide layer 12 of 3300 A, a polysilicon layer 13 serving as the resistor, and an oxide layer 14 of 9000 A are successively coated. Generally the resistor is of N or P type diffusion layer or polysilicon layer. Diffusion layers and polysilicon layers both generate parasitic capacitance at the junction of an insulating layer formed on the surface of substrate and the polysilicon layer, respectively.
The variance of the value of the resistor made of a polysilicon layer, caused in the manufacturing process thereof, is not greater than that caused by a diffusion layer. On the other hand, since the sheet resistance of the polysilicon layer is typically 50#/ [ Z, when the polysilicon layer is used in a
BGR circuit requiring several kilohm's resistance, the layout area therefor has to be increased. As a result, the parasitic capacitance between the substrate 11 and the polysilicon layer 13 is more than that caused by the diffusion layer.
Dynamic random access memory (DRAM) usually has a substrate voltage generating circuit supplying negative substrate voltage VBB to the substrate, for the purpose of stability of the substrate. The operation of the substrate voltage generating circuit has a period determined by hole current flowing into the substrate. That is, the operation of substrate voltage generating circuit is started when the substrate voltage is higher than a given voltage due to hole current inflowing into the substrate, and is stopped when the substrate voltage is less than the given voltage. Such a periodic fluctuation of the substrate voltage is transferred to each node of the BGR circuit by the parasitic capacitance formed between the substrate and resistor of the BGR circuit, to thereby vary the output voltage thereof.Furthermore, since a closed feed back loop is provided with the BGR circuit, the BGR circuit is oscillated by noise of the substrate voltage VBB. Accordingly, the internal voltage drop circuit using the BGR circuit can not keep a constant output voltage. While in the case of using a large resistor in order to reduce current consumption of the BGR circuit, the parasitic capacitance between the
BGR circuit and the substrate is further increased. This results in increase of oscillation of the BGR circuit. Thus, in order to suppress the oscillation of the BGR circuit caused by increase of the parasitic capacitance, the resistor value employed in the BGR circuit should be small to reduce the parasitic capacitance. However, in reducing the resistor value, the current consumption of the BGR circuit is increased.
Preferred embodiments of the invention aim to provide a reference voltage generating circuit producing a constant output voltage regardless of substrate noise, whilst minimizing current consumption.
According to a first aspect of the present invention, there is provided a reference voltage generating circuit having a first resistive means connected between a supply voltage terminal and a first node, a second resistive means connected between said first node and a second node, a first bipolar transistor having a collector connected to a base thereof and to said second mode and an emitter connected to a ground voltage terminal, a third resistive means connected between said first node and a third node, a second bipolar transistor having a collector connected to said third node and a base connected to said second node, a fourth resistive means connected between an emitter of said second bipolar transistor and said ground voltage terminal, a third bipolar transistor having a collector and an emitter respectively connected to said first node and said ground voltage terminal and a base connected to said third node, and at least one of a first capacitor and a low-pass filter, said first capacitor being connected between said first node and said third node, and said low pass filter being provided to filter a reference voltage transiently varied by a substrate voltage.
Preferably, the circuit includes said first capacitor, which is used for compensating frequency.
Preferably, the circuit includes said low pass filter, which comprises a fifth resistive means connected between said first node and a reference voltage output terminal and a second capacitor connected between said reference voltage output terminal and said ground voltage terminal.
Preferably, the values of said fifth resistive means and said second capacitor are so determined that said low pass filter can pass a frequency less than a frequency bandwidth of a change period of said substrate voltage.
Preferably, each resistive means is of a polysilicon layer or a diffusion layer.
Each resistive means may be of a polysilicon layer which is formed over a conductive layer having a given conductive type and receiving a constant voltage, said conductive layer being disposed on a top surface of a semiconductor substrate and below an insulation layer.
Each resistive means may be of a diffusion layer which is formed on a conductive layer having a conductive type opposite to that of a semiconductor substrate and receiving a constant voltage, said conductive layer being disposed on a top surface of said semiconductor substrate.
According to a further aspect of the present invention, there is provided a reference voltage generating circuit having a plurality of bipolar transistors of negative temperature coefficient and a plurality of resistive means of positive temperature coefficient, wherein said resistive means are formed over a substrate of a semiconductor, a conductive layer having a given conductive type and receiving a constant voltage, and an insulation layer being successively formed on said substrate of said semiconductor.
Such a reference voltage generating circuit may further comprise a capacitor for compensating frequency, and a low pass filter for filtering a reference voltage transiently varied by a substrate voltage.
Such a reference voltage generating circuit may also be in accordance with any of the above-mentioned first aspects of the invention.
In accordance with a further aspect of the present invention, a conductive layer receiving a given voltage is inserted between a resistor of a band gap reference circuit and a semiconductor substrate.
In accordance with another aspect of the present invention, a reference voltage generating circuit comprises a capacitor connected between an output node of a conventional band gap reference circuit and the base of an output transistor.
In accordance with still another aspect of the present invention, a reference voltage generating circuit comprises a low pass filter comprised of a resistor connected between a first node of a conventional band gap reference circuit and a reference voltage terminal and a capacitor connected in serial between a reference voltage terminal and a ground voltage terminal.
The invention also extends to a semiconductor memory device provided with a reference voltage generating circuit according to any of the preceding aspects of the invention.
For a better understanding of the invention, and to show how the same may be carried into effect, reference will now be made, by way of example, to Figures 3 to SB of the accompanying diagrammatic drawings, in which:
Figure 3 illustrates one example of a band gap reference circuit embodying the present invention;
Figure 4 illustrates a cross-sectional view of an example of a resistor used in the circuit of Figure 3; and
Figures SA and SB illustrate respective examples of characteristic curves of a conventional band gap reference circuit and an example of a circuit embodying the present invention.
Referring to Figure 3, the illustrated example of a band gap reference circuit embodying the present invention comprises five resistors, three transistors and two capacitors. A first resistor 26, connected between a supply voltage terminal Vcc and a first node 21, is for controlling current, and a second resistor 27 is connected between the first node 21 and a second node 23. A collector and a base of a first transistor 28 are commonly connected to the second node, and an emitter thereof is connected a ground voltage terminal Vss. A third resistor 29, a second transistor 30 and a fourth resistor 31 are all connected in serial between the first node 21 and the ground voltage terminal Vss.A third transistor 32 is comprised of a collector and an emitter connected between the first node 21 and the ground voltage terminal
Vss, and a base connected to a third node 24 between the third resistor 29 and a collector of the second transistor 30. A first capacitor 33 is connected between the first node 21 and the third node 24. A fifth resistor 34 is connected between the first node 21 and a reference voltage terminal VREF.
and a second capacitor 35 is connected between the reference voltage terminal
VREF and the ground voltage terminal Vss.
The first capacitor 33, employed to compensate frequency, plays a role of suppressing open loop gate less than 1 at a frequency bandwidth capable of generating oscillation. The low pass filter 36 comprised of the fifth resistor 34 and second capacitor 35 plays a role of filtering the transient change of the reference voltage VREF caused by a substrate voltage VBB. In general, since the substrate voltage VBB is operated in a frequency bandwidth between 105 106 Hz, the substrate voltage coupling noise of the reference voltage VREF has a frequency bandwidth similar to that of the substrate voltage VBB. The value of the fifth resistor 34 and the second capacitor 35 are determined so that the RC low pass filter can pass through only frequencies less than I05 106 Hz. For example, if the cutoff frequency is 105 Hz, the RC value, i.e.
time constant, is about 3.2 x10-6 sec. Because a coupling capacitance exists between the resistor used in the low pass filter 36 and the substrate, if the value of the fifth resistor 34 is greater than that of the second capacitor 35 to a great extent, the substrate voltage coupling noise of the low pass filter 36 is transferred to the output terminal of the band gap reference circuit.
Thereby the substrate voltage coupling noise is not efficiently suppressed.
Accordingly, the value of the fifth resistor 34 and the second capacitor 35 should be suitably adjusted.
Figure 4 illustrates a cross-sectional view of a resistor of Figure 3, made of a polysilicon layer. Referring to Figure 4, an N type well 39 is formed on P type semiconductor substrate 38 receiving the substrate voltage VBB. Then, on the whole top surface of the well 39, a field oxide layer 40 of 3300 A, a polysilicon layer 41 served as a resistor, and an oxide layer 42 of 9000 A are sequential formed. The N well 39 takes the part of removing coupling capacitance caused by the substrate 38 and the resistor 41, by shielding the resistor 41 of polysilicon and the substrate 38.That is, by forming a conductive layer, for example N well 39, between the substrate 38 and the band gap reference circuit, and by applying a stable voltage such as the ground voltage VBB to the conductive layer, the problem caused by the parasitic capacitance between the substrate 38 and the band gap reference circuit, can be fundamentally solved.
The characteristic curve of the reference voltage VREF with reference to noise of the substrate voltage VBB, according to the conventional and present BGR circuit, are shown in Figure 5A and Figure 5B, respectively.
Referring to Figure 5A, in the conventional BGR circuit, the reference voltage
VREF oscillates in respect to noise of the substrate voltage VBB. However, in the circuit of Figures 3 and 4, if the N well 39 receiving the constant voltage is inserted between the BGR circuit and substrate 38, and if the capacitor 33 for frequency compensation and/or the RC low pass filter 36 are provided, a stable reference voltage VREF is produced as shown in Figure 5B, even though noise of the substrate voltage VBB is generated as before.
In the above described embodiment of the invention, the conductive layer 39 is inserted between the BGR circuit and the substrate 38 in the case of forming the resistor 41 of the BGR circuit with a polysilicon layer.
However, it will be easily understood by those skilled in the art that the insertion of the conductive layer can be applicable for forming the resistor of a BGR circuit with a diffusion layer, wherein the diffusion layer resistor is formed on the conductive layer disposed on the whole top surface of the substrate, and the conductive type of the conductive layer is opposite to that of the semiconductor substrate.
In the above-described reference voltage generating circuit having a
BGR circuit, according to an example of the present invention, since an N type well is formed between the substrate and the BGR circuit, current consumption is minimized and parasitic capacitance caused by the substrate and the BGR circuit is reduced. Furthermore, the illustrated embodiment of the present invention has an effect that by providing a capacitor for compensating frequency and/or a RC low pass filter to the BGR circuit, the reference voltage VREF independent of noise influence of the substrate voltage can be achieved.
The term "ground potential" (equivalent to "ground voltage" or "earth" potential or voltage) is used conveniently in this specification to denote a reference potential. As will be understood by those skilled in the art, although such reference potential may typically be zero potential, it is not essential that it is so, and may be a reference potential other than zero.
The present invention and embodiments thereof are susceptible to numerous modification and variations, all of which are within the scope of the inventive concept. Finally, all the details may be replaced with other technically equivalent ones.
The reader's attention is directed to all papers and documents which are filed concurrently with or previous to this specification in connection with this application and which are open to public inspection with this specification, and the contents of all such papers and documents are incorporated herein by reference.
All of the features disclosed in this specification (including any accompanying claims, abstract and drawings), and/or all of the steps of any method or process so disclosed, may be combined in any combination, except combinations where at least some of such features and/or steps are mutually exclusive.
Each feature disclosed in this specification (including any accompanying claims, abstract and drawings), may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise. Thus, unless expressly stated otherwise, each feature disclosed is one example only of a generic series of equivalent or similar features.
The invention is not restricted to the details of the foregoing embodiment(s). The invention extends to any novel one, or any novel combination, of the features disclosed in this specification (including any accompanying claims, abstract and drawings), or to any novel one, or any novel combination, of the steps of any method or process so disclosed.
Claims (12)
1. A reference voltage generating circuit having a first resistive means connected between a supply voltage terminal and a first node, a second resistive means connected between said first node and a second node, a first bipolar transistor having a collector connected to a base thereof and to said second mode and an emitter connected to a ground voltage terminal, a third resistive means connected between said first node and a third node, a second bipolar transistor having a collector connected to said third node and a base connected to said second node, a fourth resistive means connected between an emitter of said second bipolar transistor and said ground voltage terminal, a third bipolar transistor having a collector and an emitter respectively connected to said first node and said ground voltage terminal and a base connected to said third node, and at least one of a first capacitor and a lowpass filter, said first capacitor being connected between said first node and said third node, and said low pass filter being provided to filter a reference voltage transiently varied by a substrate voltage.
2. A reference voltage generating circuit according to claim 1, including said first capacitor, which is used for compensating frequency.
3. A reference voltage generating circuit according to claim 1 or 2, including said low pass filter, which comprises a fifth resistive means connected between said first node and a reference voltage output terminal and a second capacitor connected between said reference voltage output terminal and said ground voltage terminal.
4. A reference voltage generating circuit according to claim 3, wherein the values of said fifth resistive means and said second capacitor are so determined that said low pass filter can pass a frequency less than a frequency bandwidth of a change period of said substrate voltage.
5. A reference voltage generating circuit according to any of the preceding claims, wherein each resistive means is of a polysilicon layer or a diffusion layer.
6. A reference voltage generating circuit according to claim 5, wherein each resistive means is of a polysilicon layer which is formed over a conductive layer having a given conductive type and receiving a constant voltage, said conductive layer being disposed on a top surface of a semiconductor substrate and below an insulation layer.
7. A reference voltage generating circuit according to claim 5, wherein each resistive means is of a diffusion layer which is formed on a conductive layer having a conductive type opposite to that of a semiconductor substrate and receiving a constant voltage, said conductive layer being disposed on a top surface of said semiconductor substrate.
8. A reference voltage generating circuit having a plurality of bipolar transistors of negative temperature coefficient and a plurality of resistive means of positive temperature coefficient, wherein said resistive means are formed over a substrate of a semiconductor, a conductive layer having a given conductive type and receiving a constant voltage, and an insulation layer being successively formed on said substrate of said semiconductor.
9. A reference voltage generating circuit according to claim 8, further comprising a capacitor for compensating frequency, and a low pass filter for filtering a reference voltage transiently varied by a substrate voltage.
10. A reference voltage generating circuit according to claim 8, and also according to any of claims 1 to 7.
11. A reference voltage generating circuit substantially as hereinbefore described with reference to Figure 3 or to Figures 3 and 4 of the accompanying drawings.
12. A semiconductor memory device provided with a reference voltage generating circuit according to any of the preceding claims.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019910010193A KR930001577A (en) | 1991-06-19 | 1991-06-19 | Reference voltage generator |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| GB9124287D0 GB9124287D0 (en) | 1992-01-08 |
| GB2256949A true GB2256949A (en) | 1992-12-23 |
Family
ID=19316014
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB9124287A Withdrawn GB2256949A (en) | 1991-06-19 | 1991-11-15 | Integrated bandgap voltage reference having improved substrate noise immunity |
Country Status (7)
| Country | Link |
|---|---|
| JP (1) | JPH04373158A (en) |
| KR (1) | KR930001577A (en) |
| DE (1) | DE4139163A1 (en) |
| FR (1) | FR2678081A1 (en) |
| GB (1) | GB2256949A (en) |
| IT (1) | IT1258344B (en) |
| TW (1) | TW208097B (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5592121A (en) * | 1993-12-18 | 1997-01-07 | Samsung Electronics Co., Ltd. | Internal power-supply voltage supplier of semiconductor integrated circuit |
| DE19618914C1 (en) * | 1996-05-10 | 1997-08-14 | Siemens Ag | Reference potential generator for analog integrated circuits |
| US6956304B2 (en) | 2002-03-18 | 2005-10-18 | Infineon Technologies Ag | Integrated circuit and method for controlling a power supply thereof |
| DE102011089402B4 (en) * | 2011-04-28 | 2015-07-16 | Zentrum Mikroelektronik Dresden Ag | Arrangement and method for generating an output voltage |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR940007298B1 (en) * | 1992-05-30 | 1994-08-12 | 삼성전자 주식회사 | Reference voltage generating circuit using cmos transistor |
| KR100333547B1 (en) * | 1999-06-29 | 2002-04-24 | 박종섭 | Reference voltage generator |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4277739A (en) * | 1979-06-01 | 1981-07-07 | National Semiconductor Corporation | Fixed voltage reference circuit |
| WO1985002472A1 (en) * | 1983-12-01 | 1985-06-06 | Advanced Micro Devices, Inc. | Bandgap reference voltage generator with vcc compensation |
| EP0288939A1 (en) * | 1987-05-01 | 1988-11-02 | National Semiconductor Corporation | Bandgap voltage reference circuit with an NPN current bypass circuit |
| US4849933A (en) * | 1987-05-06 | 1989-07-18 | Advanced Micro Devices, Inc. | Bipolar programmable logic array |
| US4906863A (en) * | 1988-02-29 | 1990-03-06 | Texas Instruments Incorporated | Wide range power supply BiCMOS band-gap reference voltage circuit |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5849449B2 (en) * | 1977-08-03 | 1983-11-04 | 大和製罐株式会社 | Object conveyance method using air flow |
| JPS6089956A (en) * | 1983-10-24 | 1985-05-20 | Toshiba Corp | Semiconductor device |
| JPS60229125A (en) * | 1984-04-26 | 1985-11-14 | Toshiba Corp | Voltage output circuit |
| JPS6132565A (en) * | 1984-07-25 | 1986-02-15 | Nec Corp | Mos integrated circuit |
| JPS61172364A (en) * | 1985-09-27 | 1986-08-04 | Nec Corp | Semiconductor device to which constant voltage circuit is formed |
| US4795961A (en) * | 1987-06-10 | 1989-01-03 | Unitrode Corporation | Low-noise voltage reference |
| JPS6455623A (en) * | 1987-08-27 | 1989-03-02 | Fujitsu Ltd | Reference voltage generating circuit |
| DE4005756A1 (en) * | 1989-04-01 | 1990-10-04 | Bosch Gmbh Robert | Monolithically integrated precision reference voltage source - has parabolic course of temp. relation of reference voltage linearised without additional components |
-
1991
- 1991-06-19 KR KR1019910010193A patent/KR930001577A/en not_active IP Right Cessation
- 1991-10-05 TW TW080107867A patent/TW208097B/zh active
- 1991-10-11 JP JP3263700A patent/JPH04373158A/en active Pending
- 1991-10-16 FR FR9112742A patent/FR2678081A1/en active Pending
- 1991-11-15 GB GB9124287A patent/GB2256949A/en not_active Withdrawn
- 1991-11-28 DE DE4139163A patent/DE4139163A1/en not_active Ceased
-
1992
- 1992-01-16 IT ITRM920026A patent/IT1258344B/en active IP Right Grant
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4277739A (en) * | 1979-06-01 | 1981-07-07 | National Semiconductor Corporation | Fixed voltage reference circuit |
| WO1985002472A1 (en) * | 1983-12-01 | 1985-06-06 | Advanced Micro Devices, Inc. | Bandgap reference voltage generator with vcc compensation |
| EP0288939A1 (en) * | 1987-05-01 | 1988-11-02 | National Semiconductor Corporation | Bandgap voltage reference circuit with an NPN current bypass circuit |
| US4849933A (en) * | 1987-05-06 | 1989-07-18 | Advanced Micro Devices, Inc. | Bipolar programmable logic array |
| US4906863A (en) * | 1988-02-29 | 1990-03-06 | Texas Instruments Incorporated | Wide range power supply BiCMOS band-gap reference voltage circuit |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5592121A (en) * | 1993-12-18 | 1997-01-07 | Samsung Electronics Co., Ltd. | Internal power-supply voltage supplier of semiconductor integrated circuit |
| DE19618914C1 (en) * | 1996-05-10 | 1997-08-14 | Siemens Ag | Reference potential generator for analog integrated circuits |
| EP0806719A2 (en) * | 1996-05-10 | 1997-11-12 | Siemens Aktiengesellschaft | Circuit for generating a voltage reference |
| EP0806719A3 (en) * | 1996-05-10 | 1998-09-16 | Siemens Aktiengesellschaft | Circuit for generating a voltage reference |
| US5883543A (en) * | 1996-05-10 | 1999-03-16 | Siemens Aktiengesellschaft | Circuit configuration for generating a reference potential |
| US6956304B2 (en) | 2002-03-18 | 2005-10-18 | Infineon Technologies Ag | Integrated circuit and method for controlling a power supply thereof |
| DE102011089402B4 (en) * | 2011-04-28 | 2015-07-16 | Zentrum Mikroelektronik Dresden Ag | Arrangement and method for generating an output voltage |
Also Published As
| Publication number | Publication date |
|---|---|
| GB9124287D0 (en) | 1992-01-08 |
| ITRM920026A1 (en) | 1993-07-16 |
| FR2678081A1 (en) | 1992-12-24 |
| TW208097B (en) | 1993-06-21 |
| IT1258344B (en) | 1996-02-26 |
| ITRM920026A0 (en) | 1992-01-16 |
| KR930001577A (en) | 1993-01-16 |
| DE4139163A1 (en) | 1992-12-24 |
| JPH04373158A (en) | 1992-12-25 |
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