GB2256526A - Embedded diamond heat sinks - Google Patents

Embedded diamond heat sinks Download PDF

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Publication number
GB2256526A
GB2256526A GB9212072A GB9212072A GB2256526A GB 2256526 A GB2256526 A GB 2256526A GB 9212072 A GB9212072 A GB 9212072A GB 9212072 A GB9212072 A GB 9212072A GB 2256526 A GB2256526 A GB 2256526A
Authority
GB
United Kingdom
Prior art keywords
diamond
holes
recesses
recess
unit according
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB9212072A
Other versions
GB9212072D0 (en
GB2256526B (en
Inventor
Barbara Lynn Jones
John Lloyd Collins
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
De Beers Industrial Diamond Division Pty Ltd
Original Assignee
De Beers Industrial Diamond Division Pty Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from GB919112303A external-priority patent/GB9112303D0/en
Application filed by De Beers Industrial Diamond Division Pty Ltd filed Critical De Beers Industrial Diamond Division Pty Ltd
Priority to GB9212072A priority Critical patent/GB2256526B/en
Publication of GB9212072D0 publication Critical patent/GB9212072D0/en
Publication of GB2256526A publication Critical patent/GB2256526A/en
Application granted granted Critical
Publication of GB2256526B publication Critical patent/GB2256526B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4803Insulating or insulated parts, e.g. mountings, containers, diamond heatsinks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3732Diamonds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

A unit, particularly for use as a heat sink, comprises a thin substrate 10, eg of Si, presenting major surfaces on each of opposite sides thereof, a plurality of holes or recesses 12 formed in at least one of the surfaces, diamond 20 located in and filling each hole or recess, and presenting a flat surface in or close to the major surface in which the hole or recess is formed, and a diamond layer 18 connecting the diamond of each hole or recess such that a thermal path is created between each such diamond. After deposition of the diamond, the major surfaces are polished to be optically flat. The holes 12 may be of other, non-circular, shape and the substrate may be of other material. Pre-formed diamond may be inserted into the holes prior to deposition of further diamond and the holes may be blind. <IMAGE>

Description

HEAT SINKS This invention relates to heat sinks.
Heat sinks are used in circumstances where it is desired to dissipate heat as rapidly as possible away from a temperature sensitive device. Ill the electronic industry, one of the fasroured heat sinks is diamond because of its high thermal conductivity. However, diamond film cannot be deposited on chips directly after processing because the dopant profiles, metallisations and so on, of chips wiRI be damaged or upset In general, the electronic or similar device is placed on a surface of a suitable diamond which itself is placed on a relatively massive block of copper or similar metal.The diamond acts as all effective heat transmitting conduit from the electronic device to the relatively massive metal body.
The preferred diamond is diamond of type ga The diamond may take any suitable form, but is typically a cable.
According to the present invention, there is provided a unit useful, for example, as a beat sink which comprises a substrate presenting major surfaces on each of opposite sides thereof, a plurality of holes or recesses formed in at least one of the surfaces, and diamond located in and filling each hole or recess, and presenting a flat surface in or close to the major surface in which the bole or recess is formed.
The substrate will typically be a thin body or wafer. The holes or recesses may be formed in one of the major surfaces only, or may extend through the substrate from one major surface to the other The diamond will typically be diamond produced by chemical vapour deposition (CVD). The CVD results in conformality of coating, i.e. all sides of three-dimensional shapes will be uniformly coated.
Further according to the invention, a method of producing a unit as descended above, includes the steps of providing a substrate having major surfaces on each of opposite sides thereof, forming a plurality of holes or recesses in at least one of the major surfaces, depositing diamond by chemical vapour deposition into the holes or recesses and continuing such deposition until the hole or recess is fulL Further according to the invention, another method of producing a unit as descended above, includes the steps of providing a substrate having major surfaces on each of opposite sides thereof, forming a plurality of holes or recesses in at least one of the major surfaces, locating a diamond in each hole or recess, such diamond preferably filling the hole or recess, and depositing a layer of diamond by chemical vapour deposition on the major surface in which the holes or recesses are formed The invention will be further described by way of example with reference to the accompanying drawings in which: Figures 1 to 4 illustrate dia#nmaticaIIy various stages in a method of producing a unit of the invention, and flgure 5 is a sectional view of a second embodiment of a unit of the invention, A first embodiment of the invention will now be described with reference to Figures 1 to 4. Figure 1 is a plan view of a circular silicon wafer 10 and Figure 2 is a section along the line 2-2 of Figure 1.
Referring to these figures, the silicon wafer 10 has a plurality of evenly spaced holes 12 formed therein. The holes 12 extend from the one major flat surface 14 of the wafer to the other major flat surface 16.
The holes will typically be less than Imin in diameter. The holes are illustrated as having a circular shape. However, the holes can have any other shape such as square, rectangular, triangular, polygonal or the like.
The holes are illustrated in a regular pattern. The holes may also be provided in a random form or in the form of another pattern This will depend on the end use to which the unit is to be put. The holes may be formed by mechanical drillirtg, laser drillhg, chemical erching or the like. Further, the holes can have parallel sides, as illustrated, or may be wedge-shaped in section.
Diamond is deposited on the surface 14 using any known chemical vapour deposition method known in the art. In so doing, a layer of diamond 18 will form on the surface 14 and will simultaneously fill the holes 12 with diamond 20. Some diamond 22 will protrude beyond the lower surface 16. Layer 18 should not exceed SOjuLm thickness to avoid strain warp age.
Chemical vapour deposition (CVD) generally involves providing a me of hydrogen gas and a suitable gaseous carbon compound such as a hydrocarbon, applying sufficient energy to that gas to dissociate the hydrogen into atomic hydrogen and the gas into active carbon ions, atoms or cH radicals, and allowing such active species to deposit on a substrate to form diamond Dissociation of the gases can take place by a variety of methods.
One such commonly used method is a plasma-assisted method. The hydrogen and gaseous carbon compound enter a plasma region, which may be microwave, RF or DC plasma, where they are excited to their reactive states. They diffuse in this state to a substrate. The substrate is heated by the plasms The conditions for the diamond deposition will be chosen so as not to damage the silicon or harm its properties.
The dismondeoated wafer of Figure 3 is then turned over and the surface 16 and protruding diamond 22 thereafter polished to produce an optimally flat polished, continuous surface 24 having a plurality of diamond islands therein as shown in Figure 4. The diamond layer 18 may also be polished to produce an optimally flat polished surface, if desired The diamond layer 18 provides a continuous thermal path conncct=g eachdiamond-filled hole. The heat dissipation characteristics of the diamond layer will be from 3 to 9, preferably 5 to 9, W.cm#1 K-1.
This is greater than copper or alumina.
The diamond/silicon wafer of Figure 4 may be processed using standard semi-conductor processing techniques to form discrete power devices or integrated circuits. In so doing, it is important not to exceed a temperature of about 9000C at which the CVD diamond will tend to degrade. This permits one to use doping, photolithography, etching, and other such techniques necessary to produce such devices. Oxidation of the silicon is possible provided that the CVD diamond film is completely masked during the process to prevent oxidation. In practice, the silicon wafer will often have been oxidised prior to diamond deposition, The unit may have an integrated circuit formed over the entire optically flat polished surface 24. The temperature#seiisit#ve devices or portions of the circuit will be located on or adjacent the diamond islands 20 so that heat generated therein is rapidly dissipated away. Xji use, the diamond layer 18 will generally be in thermal contact with a relatively larger mass of another material of good heat conductivity, or a heat removing liquid, e. water or glycerol, Alternatively, the wafer may be cur into smaller units which can then be bonded to flat packs or other mounting packages in known manner.The wafer may be cut, for example, using a diamond saw or a laser bern As an alternative to the embodiment of Figures 1 to 4, it is possible to form diamond logs from single crystal synthetic or natuaaI diamond and then insert the logs in the holes 12 of Figure Thereafter a CVD diamond layer can be deposited on the surface 14 to connect the indfvidnal diamond logs.
A further embodiment of the invention is illustrated by Figure 5.
Referring to this figure, a disc-shaped wafer 30 has major flat surfaces 32, 34 on each of opposite sides thereof A plurality of recesses 36 are formed in the surface 3S These recesses extend into the body of the wafer but not through to the other major surface 34.
Diamond 38 is deposited by chemical vapour deposition on the surface 32 and fills the recesses with diamond. The top surface 40 of the CVD diamond may be polished to provide an optically flat polished surface, if required.
The wafer is described above as hazing been made of silicon or silicon oxide. Other materials which are suitable are gallium arsenide, indium phosphide, germanium, alumina, aluminium nitride, gallium indium arsenide, gallium phosphide, indium arsenide and indium antimonide.
The units illustrated by Figures 4 and 5, and as desmbed above, provide localised areas of high thermal conductivity. Power dissipating structures can either be formed adjacent to the diamond areas, for example using ion implantation, or above the diamond areas, by depositing polycrystalline silicon on the wafer. Polyaystalline silicon will be suitable for some structures not requinag high electron mobility such as switching speeds, or the polycrystafline silicon can be re-crystallised to be single crystal using flash lamp, laser or thermal techniques.
The units may also be used for tfryristor applications where the entire wafer may constitute a single device passing kAmps of current The properties of the diamond layer are such as to provide a radiation protective coating to the substrate and devices formed tbereon.

Claims (18)

1. A unit which comprises a substrate presenting major surfaces on each of opposite sides thereof, a plurality of holes or recesses formed in at least one of the surfaces, diamond located in at least some of the holes or recesses, and presenting a flat surface in or close to a major surface in which the holes or recesses are formed.
2. A unit according to claim 1 wherein diamond fills every hole or recess in which it is located.
3. A unit according to claim 1 or 2 wherein diamond is located in every hole or recess.
4. A unit according to claim 1, 2 or 3 wherein the substrate is a thin body or wafer.
5. A unit according to any preceding claim wherein the holes or recesses extend from the one major surface to the other major surface.
6. A unit according to any preceding claim wherein the diamond in the holes or recesses is joined by a diamond layer creating a thermal path between each diamond-filled hole or recess.
7. A unit according to any preceding claim wherein the substrate is silicon or silicon oxide.
8. A unit according to any one of claims 1 to 6 wherein the substrate is made of one or more of the following materials: gallium arsenide, indium phosphide, germanium, alumina, aluminium nitride, gallium-indium arsenide, gallium phosphide, indium arsenide and indium antimonide.
9. A method of producing a unit including the steps of providing a substrate having major surfaces on each of opposite sides thereof, forming a plurality of holes or recesses in at least one of the major surfaces, and providing diamond in at least some of the holes or recesses.
10. A method according to claim 9 wherein the step of providing diamond in at least some of the holes or recesses comprises depositing diamond by chemical vapour deposition.
11. A method according to claim 10 wherein the deposition of diamond is continued until the holes or recesses are full.
12. A method according to claim 10 or 11 wherein the chemical vapour deposition is continued until a layer of diamond is formed on the major surface in which the holes or recesses are formed, such layer connecting the diamond of the holes or recesses.
13. A method of producing a unit according to claim 9 wherein the step of providing diamond in at least some of the holes or recesses, comprises locating a diamond in the holes or recesses, and further comprising the step of depositing a layer of diamond by chemical vapour deposition on the major surface in which the holes or recesses are formed to connect the diamonds in the recesses or holes.
14. A method according to claim 13 wherein the diamond which is located in each hole or recess is such as to fill that hole or recess.
15. A method according to any one of claims 10 to 15 wherein diamond is provided in each hole or recess.
16. A unit substantially as hereinbefore described with reference to and as illustrated in the accompanying drawings.
17. A unit according to any one of claims 1 to 8 and 16 for use as a heat sink.
18. A method of producing a unit substantially as herein described with reference to and as illustrated in the accompanying drawings.
GB9212072A 1991-06-07 1992-06-08 Heat sinks Expired - Fee Related GB2256526B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB9212072A GB2256526B (en) 1991-06-07 1992-06-08 Heat sinks

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB919112303A GB9112303D0 (en) 1991-06-07 1991-06-07 Heat sinks
GB9212072A GB2256526B (en) 1991-06-07 1992-06-08 Heat sinks

Publications (3)

Publication Number Publication Date
GB9212072D0 GB9212072D0 (en) 1992-07-22
GB2256526A true GB2256526A (en) 1992-12-09
GB2256526B GB2256526B (en) 1994-12-14

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Country Status (1)

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GB (1) GB2256526B (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1994024703A1 (en) * 1993-04-14 1994-10-27 General Electric Company Electronic apparatus with improved thermal expansion match
EP0630045A1 (en) * 1993-06-14 1994-12-21 Sumitomo Electric Industries, Limited Finned diamond heatsink and process for the production of the same
EP1130644A2 (en) * 2000-03-02 2001-09-05 Sumitomo Electric Industries, Ltd. Package and method of manufacturing the same
GB2384618A (en) * 2002-01-25 2003-07-30 Denselight Semiconductors Pte A structure for thermal management in an optoelectronic device.
CN102593314A (en) * 2011-01-13 2012-07-18 吴耀铨 Heat radiation substrate
CN114551653A (en) * 2022-01-20 2022-05-27 北京大学 Method and device for improving Micro-LED communication performance by using graphical diamond material

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0142282A2 (en) * 1983-10-25 1985-05-22 Plessey Overseas Limited A method of making diamond heatsink assemblies
EP0284150A1 (en) * 1987-03-23 1988-09-28 Drukker International B.V. Method of making a diamond heat sink

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0142282A2 (en) * 1983-10-25 1985-05-22 Plessey Overseas Limited A method of making diamond heatsink assemblies
GB2148157A (en) * 1983-10-25 1985-05-30 Plessey Co Plc A method of making diamond heatsink assemblies
EP0284150A1 (en) * 1987-03-23 1988-09-28 Drukker International B.V. Method of making a diamond heat sink
US4800002A (en) * 1987-03-23 1989-01-24 Drukker International B.V. Method of making a diamond heat sink

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5642779A (en) * 1909-06-30 1997-07-01 Sumitomo Electric Industries, Ltd. Heat sink and a process for the production of the same
WO1994024703A1 (en) * 1993-04-14 1994-10-27 General Electric Company Electronic apparatus with improved thermal expansion match
EP0630045A1 (en) * 1993-06-14 1994-12-21 Sumitomo Electric Industries, Limited Finned diamond heatsink and process for the production of the same
EP1035578A1 (en) * 1993-06-14 2000-09-13 Sumitomo Electric Industries, Ltd. Process for the production of a finned diamond heatsink
EP1130644A2 (en) * 2000-03-02 2001-09-05 Sumitomo Electric Industries, Ltd. Package and method of manufacturing the same
EP1130644A3 (en) * 2000-03-02 2008-02-13 Sumitomo Electric Industries, Ltd. Package and method of manufacturing the same
GB2384618A (en) * 2002-01-25 2003-07-30 Denselight Semiconductors Pte A structure for thermal management in an optoelectronic device.
CN102593314A (en) * 2011-01-13 2012-07-18 吴耀铨 Heat radiation substrate
CN114551653A (en) * 2022-01-20 2022-05-27 北京大学 Method and device for improving Micro-LED communication performance by using graphical diamond material
CN114551653B (en) * 2022-01-20 2023-08-22 北京大学 Method and device for improving Micro-LED communication performance by using patterned diamond material

Also Published As

Publication number Publication date
GB9212072D0 (en) 1992-07-22
GB2256526B (en) 1994-12-14

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PCNP Patent ceased through non-payment of renewal fee

Effective date: 19990608