GB2250114B - Multiple data processing system - Google Patents

Multiple data processing system

Info

Publication number
GB2250114B
GB2250114B GB9200747A GB9200747A GB2250114B GB 2250114 B GB2250114 B GB 2250114B GB 9200747 A GB9200747 A GB 9200747A GB 9200747 A GB9200747 A GB 9200747A GB 2250114 B GB2250114 B GB 2250114B
Authority
GB
United Kingdom
Prior art keywords
data processing
processing system
multiple data
processing
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB9200747A
Other versions
GB2250114A (en
GB9200747D0 (en
Inventor
Itsuko Ishida
Masayuki Hata
Tatsuo Yamada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of GB9200747D0 publication Critical patent/GB9200747D0/en
Publication of GB2250114A publication Critical patent/GB2250114A/en
Application granted granted Critical
Publication of GB2250114B publication Critical patent/GB2250114B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0844—Multiple simultaneous or quasi-simultaneous cache accessing
    • G06F12/0846—Cache with multiple tag or data arrays being simultaneously accessible
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0864—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using pseudo-associative means, e.g. set-associative or hashing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0842—Multiuser, multiprocessor or multiprocessing cache systems for multiprocessing or multitasking
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12—Replacement control
    • G06F12/121—Replacement control using replacement algorithms
    • G06F12/126—Replacement control using replacement algorithms with special data handling, e.g. priority of data or instructions, handling errors or pinning
    • G06F12/127—Replacement control using replacement algorithms with special data handling, e.g. priority of data or instructions, handling errors or pinning using additional replacement algorithms
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/60—Details of cache memory
    • G06F2212/601—Reconfiguration of cache memory
GB9200747A 1988-01-21 1992-01-14 Multiple data processing system Expired - Fee Related GB2250114B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63011224A JPH0727492B2 (en) 1988-01-21 1988-01-21 Buffer storage

Publications (3)

Publication Number Publication Date
GB9200747D0 GB9200747D0 (en) 1992-03-11
GB2250114A GB2250114A (en) 1992-05-27
GB2250114B true GB2250114B (en) 1992-09-23

Family

ID=11771987

Family Applications (2)

Application Number Title Priority Date Filing Date
GB8901247A Expired - Fee Related GB2214336B (en) 1988-01-21 1989-01-20 Cache memory apparatus
GB9200747A Expired - Fee Related GB2250114B (en) 1988-01-21 1992-01-14 Multiple data processing system

Family Applications Before (1)

Application Number Title Priority Date Filing Date
GB8901247A Expired - Fee Related GB2214336B (en) 1988-01-21 1989-01-20 Cache memory apparatus

Country Status (2)

Country Link
JP (1) JPH0727492B2 (en)
GB (2) GB2214336B (en)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5553262B1 (en) * 1988-01-21 1999-07-06 Mitsubishi Electric Corp Memory apparatus and method capable of setting attribute of information to be cached
JPH01233537A (en) * 1988-03-15 1989-09-19 Toshiba Corp Information processor provided with cache memory
JPH0951997A (en) * 1995-08-11 1997-02-25 Sookoo Kk Tool for drying wash
GB2311880A (en) * 1996-04-03 1997-10-08 Advanced Risc Mach Ltd Partitioned cache memory
GB9727485D0 (en) 1997-12-30 1998-02-25 Sgs Thomson Microelectronics Processing a data stream
US6732234B1 (en) 2000-08-07 2004-05-04 Broadcom Corporation Direct access mode for a cache
US6848024B1 (en) * 2000-08-07 2005-01-25 Broadcom Corporation Programmably disabling one or more cache entries
US6748492B1 (en) 2000-08-07 2004-06-08 Broadcom Corporation Deterministic setting of replacement policy in a cache through way selection
US6748495B2 (en) 2001-05-15 2004-06-08 Broadcom Corporation Random generator
US7266587B2 (en) 2002-05-15 2007-09-04 Broadcom Corporation System having interfaces, switch, and memory bridge for CC-NUMA operation

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1555300A (en) * 1977-10-06 1979-11-07 Ibm Data processing apparatus
US4228503A (en) * 1978-10-02 1980-10-14 Sperry Corporation Multiplexed directory for dedicated cache memory system
EP0284751A2 (en) * 1987-04-03 1988-10-05 International Business Machines Corporation Cache memory

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4264953A (en) * 1979-03-30 1981-04-28 Honeywell Inc. Virtual cache
EP0114944B1 (en) * 1982-12-28 1989-09-27 International Business Machines Corporation Method and apparatus for controlling a single physical cache memory to provide multiple virtual caches
JPS59213084A (en) * 1983-05-16 1984-12-01 Fujitsu Ltd Buffer store control system
JPS61199137A (en) * 1985-02-28 1986-09-03 Yokogawa Electric Corp Microprocessor unit
US4853846A (en) * 1986-07-29 1989-08-01 Intel Corporation Bus expander with logic for virtualizing single cache control into dual channels with separate directories and prefetch for different processors

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1555300A (en) * 1977-10-06 1979-11-07 Ibm Data processing apparatus
US4228503A (en) * 1978-10-02 1980-10-14 Sperry Corporation Multiplexed directory for dedicated cache memory system
EP0284751A2 (en) * 1987-04-03 1988-10-05 International Business Machines Corporation Cache memory

Also Published As

Publication number Publication date
GB2250114A (en) 1992-05-27
GB9200747D0 (en) 1992-03-11
GB8901247D0 (en) 1989-03-15
GB2214336A (en) 1989-08-31
JPH0727492B2 (en) 1995-03-29
JPH01187650A (en) 1989-07-27
GB2214336B (en) 1992-09-23

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Legal Events

Date Code Title Description
746 Register noted 'licences of right' (sect. 46/1977)

Effective date: 19951107

PCNP Patent ceased through non-payment of renewal fee

Effective date: 20000120