GB2238923A - Digital frequency generator - Google Patents

Digital frequency generator Download PDF

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Publication number
GB2238923A
GB2238923A GB8927651A GB8927651A GB2238923A GB 2238923 A GB2238923 A GB 2238923A GB 8927651 A GB8927651 A GB 8927651A GB 8927651 A GB8927651 A GB 8927651A GB 2238923 A GB2238923 A GB 2238923A
Authority
GB
United Kingdom
Prior art keywords
frequency
output
divider
pass filter
low pass
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB8927651A
Other versions
GB2238923B (en
GB8927651D0 (en
Inventor
Peter James Topham
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Plessey Co Ltd
BAE Systems Electronics Ltd
Original Assignee
GEC Marconi Ltd
Plessey Co Ltd
Marconi Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by GEC Marconi Ltd, Plessey Co Ltd, Marconi Co Ltd filed Critical GEC Marconi Ltd
Priority to GB8927651A priority Critical patent/GB2238923B/en
Publication of GB8927651D0 publication Critical patent/GB8927651D0/en
Publication of GB2238923A publication Critical patent/GB2238923A/en
Application granted granted Critical
Publication of GB2238923B publication Critical patent/GB2238923B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/185Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using a mixer in the loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

A frequency generator comprising a phase locked loop incorporating a frequency divider (1), a phase comparator (2) for comparing a reference frequency received from a source of reference frequency (4) with an output of the divider (1), and a digital frequency synthesiser (3) connected between said source of reference frequency (4) and said comparator (2). A low pass filter (5) is connected to the output of said comparator, and a voltage controlled oscillator (6) is connected to the output of said low pass filter (5) to provide an output frequency. To extend the frequency range the output of the low pass filter may be inverted and fed into another voltage controlled oscillator (9, Fig. 2), in which case the outputs of the voltage controlled oscillators (6) (9. Fig. 2) are fed into a frequency mixer (10, Fig. 2) to provide the output frequency. A high frequency, fast switching, narrow channel spaced synthesizer is provided <IMAGE>

Description

DIGITAL FREQUENCY GENERATOR This invention relates to a digital frequency generator. This invention addresses the requirement for high frequency, fast switching, narrow channel spaced synthesisers by combining a digital frequency synthesiser with a microwave phase lock loop. This approach has the added advantages of low phase noise and minimal setting-up adjustments.
Existing designs for high frequency synthesisers suffer from compromises in selecting the loop bandwidth. A wide loop bandwidth gives rapid switching between frequencies and cancellation of much of the oscillator phase noise but at the expense of wide channel spacing. Narrow loop bandwidths allow closely spaced channels but at the expense of slow switching of frequencies and little cancellation of oscillator phase noise. Recently the Digital Frequency Synthesiser (DFS) (Plessey Semiconductors Ltd. P/N SP2001) has provided a fast switching, narrow channel spaced frequency source but limited to frequencies below 500MHz.
According to the invention there is provided a frequency generator comprising a phase locked loop incorporating a frequency divider, a phase comparator for comparing a reference frequency received from a source of reference frequency and an output of said divider, a low pass filter connected to the output of said comparator and a voltage controlled oscillator connected to the output of said low pass filter to provide an output frequency, characterised by a digital frequency synthesiser connected between said source of reference frequency and said comparator.
The advantages of this invention is the combination of a Phase Lock Loop (PLL) operating at frequencies of several gigaHertz with a reference source using a DFS operating at a few hundred megahertz.
In this way the advantages of a wideband PLL, namely rapid channel switching and cancellation of output phase noise, are combined with those of the DFS to give a frequency synthesiser capable of operation to frequencies limited only by frequency divider performance but with the rapid frequency switching and narrow (few Hz) channel spacing of the-DFS. The use of a single loop with most of the frequency determination carried out by digital circuitry makes for simple setting up. The frequency range of the arrangement can be extended by deriving the final output frequency from mixing two voltage controlled oscillators. both within the phase lock loop.
The invention will now be further described by way of example with reference to the accompanying drawings in which Figure 1 illustrates a digital frequency generator utilising a single voltage controlled oscillator (VCO); and Figure 2 illustrates the digital frequency generator utilising two VCOs.
In the configuration shown in figure 1 the digital frequency generator consists of a frequency divider (1), which can either be a fixed modulus frequency divider or a variable modulus frequency divider. The output of this frequency divider is connected to a phase comparator (2), the second input of the phase comparator being connected to the output of a digital frequency synthesiser (DFS) (3).
This digital frequency synthesiser could, for example, be the Plessey Semiconductor Ltd. Part No. SP2001. The digital frequency synthesiser is clocked from a source of reference frequency (4). This reference frequency is fixed and would usually be of a type with good frequency stability, for example based upon a quartz crystal oscillator. In this way the digital frequency synthesiser provides a comparison frequency which bears an exact but variable relationship to the reference frequency and having the same frequency stability as the reference frequency. A low pass filter (5) is connected to the output of the phase comparator to remove the comparison frequency and the output of the low pass filter is connected to a voltage controlled oscillator (VCO) (6) which produces the final output frequency (7). A portion of the output frequency forms the input to the frequency divider.
The circuit comprising the divider, the phase comparator, the low pass filter and the VCO form a phase lock loop, in which the final output frequency is a multiple of the comparison frequency. The ratio of the final frequency to the comparison frequency is equal to the divider modulus. In the case of a fixed modulus divider the output frequency is varied by altering the setting of the DFS which in turn alters the comparison frequency. With a variable modulus divider the output frequency can also be changed by varying the divider modulus.
In the configuration of figure 2, the digital frequency generator comprises the circuit of figure 1 with the following changes. The output of the low pass filter is also connected to a voltage inverter (8). A second voltage controlled oscillator (9) is connected to the output of the voltage inverter and the output of said VCO is connected to a frequency mixer (10), the second input of which is connected to the output of the first voltage controlled oscillator (6).
A second low pass filter (11) is connected to the output of the frequency mixer, this low pass filter being set to select the difference frequency between the two VCOs. The output of this low pass filter constitutes the final output frequency. A portion of this output frequency forms the input to the frequency divider. In this way the difference frequency is phase locked to a multiple of the comparison frequency. The advantage of this latter configuration is that the difference frequency can cover a wider frequency range than either VCO alone.

Claims (5)

CLAIMS:-
1. A frequency generator comprising a phase locked loop incorporating a frequency divider, a phase comparator for comparing a reference frequency received from a source of reference frequency and an output of said divider, a low pass filter connected to the output of said comparator and a voltage controlled oscillator connected to the output of said low pass filter to provide an output frequency, characterised by a digital frequency synthesiser connected between said source of reference frequency and said comparator.
2. A frequency generator according to claim 1, wherein the output from said low pass filter is inverted and fed into another voltage controlled oscillator, the outputs of said first mentioned oscillator and said other oscillator being fed into a frequency mixer to provide said output frequency.
3. A frequency generator according to claim 1 or 2, in which said divider has a variable modulus.
4. A frequency generator according to claim 1 or 2, in which said divider has a fixed modulus.
5. A frequency generator substantially as hereinbefore described with reference to the accompanying drawings.
GB8927651A 1989-12-07 1989-12-07 Digital frequency generator Expired - Fee Related GB2238923B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB8927651A GB2238923B (en) 1989-12-07 1989-12-07 Digital frequency generator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB8927651A GB2238923B (en) 1989-12-07 1989-12-07 Digital frequency generator

Publications (3)

Publication Number Publication Date
GB8927651D0 GB8927651D0 (en) 1990-02-07
GB2238923A true GB2238923A (en) 1991-06-12
GB2238923B GB2238923B (en) 1993-08-11

Family

ID=10667554

Family Applications (1)

Application Number Title Priority Date Filing Date
GB8927651A Expired - Fee Related GB2238923B (en) 1989-12-07 1989-12-07 Digital frequency generator

Country Status (1)

Country Link
GB (1) GB2238923B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0629321A4 (en) * 1992-03-04 1994-10-05 Motorola Inc Circuit, counter and frequency synthesizer with adjustable bias current.

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113242038A (en) * 2021-06-02 2021-08-10 南方电网科学研究院有限责任公司 Phase-locked loop, phase-locking method and phase-locking equipment

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3619802A (en) * 1969-05-20 1971-11-09 Dieter R Lohrman Frequency synthesizer
US4463321A (en) * 1981-12-28 1984-07-31 E-Systems, Inc. Delay line controlled frequency synthesizer
GB2149599A (en) * 1983-10-31 1985-06-12 Anritsu Electric Co Ltd Signal generator

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3619802A (en) * 1969-05-20 1971-11-09 Dieter R Lohrman Frequency synthesizer
US4463321A (en) * 1981-12-28 1984-07-31 E-Systems, Inc. Delay line controlled frequency synthesizer
GB2149599A (en) * 1983-10-31 1985-06-12 Anritsu Electric Co Ltd Signal generator

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0629321A4 (en) * 1992-03-04 1994-10-05 Motorola Inc Circuit, counter and frequency synthesizer with adjustable bias current.
EP0629321A1 (en) * 1992-03-04 1994-12-21 Motorola, Inc. Circuit, counter and frequency synthesizer with adjustable bias current

Also Published As

Publication number Publication date
GB2238923B (en) 1993-08-11
GB8927651D0 (en) 1990-02-07

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Legal Events

Date Code Title Description
730A Proceeding under section 30 patents act 1977
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20041207