GB2236225A - Superhetorodyne circuit - Google Patents

Abstract

A superheterodyne circuit comprises a first local oscillator (3) f1 applied to a split input signal (1) to give phase quadrature zero intermediate frequency (baseband) signals which then have applied to them a non-zero intermediate frequency (25) f2 also in phase quadrature (27) via a second local oscillator (25). A combination device (29) then combines by addition or subtraction the resultant signals to provide an output in which the majority of unwanted signals (eg image frequencies) cancel out. The circuit may be incorporated in a receiver or a transmitter. <IMAGE>

Description

SUPERHETERODYNE CIRCUIT This invention relates to superheterodyne circuits and has particular, though not exclusive, relevance to superheterodyne radio transceivers.

Conventional superheterodyne transceivers are known in which the incoming frequency is converted to an intermediate frequency (IF) by multiplication with a local oscillator spaced from the incoming frequency by the IF.

There is, however, generated an unwanted incoming image frequency within the circuit which is translated to the IF along with the wanted incoming frequency, and it is necessary to filter this out at the input to the circuit.

Thus it is necessary to choose a combination of IF and input filter such that there is sufficient suppression of the image frequency.

UK Patent Specification 1238789 discloses a circuit which tackles the problem of unwanted image frequencies.

The circuit includes a means to generate a signal substantially equal and opposite to a phase shift exhibited by the image components of the input signal.

This circuit suffers the disadvantages of having to mimic the unwanted signal in antiphase in order to eradicate it as well as requiring coherent demodulators to tackle the problems associated with the occurrence of so-called negative frequencies.

It is an object of the present invention to provide a superheterodyne circuit wherein image frequencies are at least reduced, but which avoids at least some of the difficulties inherent in known circuits.

According to the present invention there is provided a superheterodyne circuit comprising: means for splitting an input signal into two signal channels; means for generating a first signal of a frequency substantially at the centre of the frequency band of the input signal; means for mixing each of two phase quadrature components of said first signal with a different one of the two split input signals to produce two first intermediate frequency signals within a range of frequencies substantially centred round zero frequency; means for generating a second signal of predetermined frequency; means for mixing each of two phase quadrature components of said second signal with a different one of respective signals derived from the two first intermediate frequency signals to produce respective second intermediate frequency signals within a range of frequencies substantially centred round the predetermined frequency; and means for combining the two second intermediate frequency signals so as to provide an output signal in which unwanted mixing products are substantially cancelled.

Preferably, the means for combining comprises a signal adding device such that the output signal comprises a replica of the input signal centred round the predetermined frequency.

Alternatively, the means for combining comprises a signal -subtracting device such that the output signal comprises the sidebands of the input signal reversed in the frequency domain.

Employing a subtracting device becomes advantageous when there is a need to convert upper sideband signals to lower sideband and vice versa.

There may be provided adjustable phase and/or amplitude controls effective to suppress unwanted mixing products.

Three circuits in accordance with the present invention will now be described by way of example only with reference to the accompanying drawings of which; Figure 1 shows a schematic block diagram of the first circuit together with representations of signals passing through the circuit.

Figure 2 illustrates the effect of channel phase errors on unwanted mixing products; Figure 3 illustrates the effect of channel gain errors on unwanted mixing products; Figure 4 shows a schematic block diagram of the first circuit incorporated in a receiver; and Figure 5 shows a schematic block diagram of the first circuit incorporated in a transmitter; Referring to Figure 1, the circuit includes a splitter 1 effective to split an input signal into two channels, an in-phase channel I and a quadrature phase channel Q.A local oscillatdr 3 together with 900 phase shifter 4 produces two phase quadrature split signals which are mixed with the split input signals at mixers 5 and 7 an amplitude multiplier R1 enabling amplitude matching of the signals in the two channels. R1 may alternatively be placed anywhere between the input to mixer 7 and the output of mixer 23. R2 may be similarly re-positioned and can be combined with R1 so that only one amplitude multiplier is necessary. The output of these mixers are then IF signals centred on zero frequency. These zero IF signals are then amplified by amplifiers 11 and 13. As these amplifiers operate at low frequency, low power consumption is enabled.The signals are then filtered by filters 15 and 17 effective to filter out adjacent channels and higher frequency components. If the signals are digital signals, low pass Gaussian filters may be used.

A second local oscillator 25 together with 900 phase shifter 27 generates a further pair of phase quadrature split signals which are mixed with the filtered signals in the two channels in respective further mixers 21 and 23 so as to produce second IF signals. To enable amplitude matching of the two IF channels in the second mixing stage, an amplitude multiplier, R2, is applied to one channel. The resulting signals are finally summed at a summer 29, this summing operation being effective to cancel out unwanted mixing products as will be explained in more detail hereafter.

The operation of the circuit described herebefore will now be explained in more detail by considering the example of a radio frequency input signal V1, comprising the sum of two sinusoids of different frequencies fa, fb such that V1 = A sin (fa) + B sin (fb) (1) (at some arbitrary time t I 0 where the phase offset between the two signals can be taken as zero.) where A and B are the amplitudes of the signals of input frequencies fa and fb respectively.

The frequency fl of the local oscillator 3 is chosen to be at substantially at the centre of the frequencies fa, fb.

When the split input signal is mixed with the phase quadrature signals derived from the local oscillator 3 via mixers 5 and 7, two IF signals, IF1 and 1F2 within the respective I and Q channels are generated. These signals are given by: IF1 I (A sin (fa) + B sin (fb)) x cos ((fl) t + ~ ) (2) IF2 - (A sin (fa) + B sin (fb) x R1 (sin (fl) t + ~ + ## ) (3) where t denotes time, ~ is the phase of the first local oscillator relative to the phase of the input signal V1 at t - O,b8 ~ is the phase error in the local oscillator quadrature signals and R1 is an amplitude multiplier applied to one of the channels.

Filters 15 and 17 are effective to remove the high frequency components, leaving IF1 X 1/2 (A sin (fa - fl) t ) + B sin ((fb - fl) t -#) (4) IF2 - R1/2 (A cos (fa - fl) t - (f+t +)) + B cos ((fb - fl) t - (} + t) (5) The circuit described thus far constitutes a first stage of the circuit which is concerned only with generating IF signals centred round zero frequency. The operation of the second stage of the circuit is now to be described which concerns the generation of a non-zero IF.

The zero IF signals IF1 and IF2 in the I and Q channels are upconverted by the in-phase and quadrature signals derived from the second local oscillator 25 to generate signals centred on the second local oscillator frequency f2.

Referring to equations 4 and 5, this produces new IF's IF12, and IF22 in the in-phase and quadrature channels respectively where IF12 = IF1 x cos (f2t + so IF12 = 1/4 (A sin ((fa - fl + f2) t - > #+ e) + A sin ((fa - fl - f2) t - - Q) + B sin ((fb - fl + f2) t - P + #) + B sin ((fb - fl - f2) t - # - e) (6) and IF22 r 1F2 x R2 sin (f2t + e + ss t) 4 - A sin ((fa - fl - f2) t - cp +Da) - (# + # #)) + B sin ((fb - fl + f2) t - (# +AA) + (t + # #)) - B sin ((fb - fl - f2) t - (# + ##) - (e +S 4)) (7) where # is the phase of the second local oscillator and4 # its associated phase error in the quadrature channel.

It will be seen from equations 6 and 7 that there are two corresponding terms differing only in sign, hence when signals IF12 and IF22 are summed in summing device 29 these terms cancel out, thus cancelling out one of the mixing products so that the output of the circuit is a signal which is a replica of the input signal, but centered on frequency f2.

In order to achieve the correct cancellation of the spurious products occurring during the mixing stage, it is necessary for the two zero IF signals to be matched both in phase and amplitude characteristics, and for the phase shifter 9 to accurately generate a 900 phase shift. These requirements are achieved by employing within the circuit both phase and amplitude controls.

The effects of the channel phase errors and channel gain errors are shown in Figures 2 and 3.

Referring to Figures 2 and 3 the unwanted mixing product at f2 - (fa - fb) is shown as Al and the desired mixing product as A2.

As a phase error,; , occurs, the amplitude of Al rises according to a sine function and the amplitude of A2 declines according to a cosine function assuming the amplitude error is zero.

Figure 3 shows the variation of Al and A2 as an amplitude error, but no phase error, occurs. Appropriate adjustment of R1, R2 and phase adjustments should allow these errors to be reduced.

It will be seen that in the circuits described herebefore if the frequency of the input signal is lower than that of the local oscillator 3, then a ~negative~ frequency would occur in the IF signal. Demodulation would then normally require coherent demodulation techniques.

However, when this signal undergoes upconversion in the second, non-zero IF stage of the circuit, this special priority is no longer present and the input signal reappears on either the upper or lower side of the local oscillator signal 25, depending on its original position relative to the local oscillator 3. By utilising a second non-zero IF stage, this enables simplification of the signal demodulation by allowing the use of non-coherent demodulators as all frequencies will be positive.

It will be appreciated by those skilled in the art that as a direct result of the distortion caused to the desired signal by the unwanted mixing products, the circuit as substantially hereinbefore described will be particularly well employed in the fields of digital radio communication and data transmission due to the ability of digital radio to reject small distortions which could be objectionable or irritating in an analogue radio.

It will also be appreciated that by utilising a circuit employing a zero IF first stage and a conventional non-zero IF second stage in this manner, then it is possible to use different types of modulation within the circuit together with simple low cost non coherent demodulators.

Thus, for example, the non-zero IF stage My demodulate frequency or amplitude modulated signals using simple low cost non coherent demodulators, and the zero IF stage may nevertheless still demodulate coherent modulations if required, for example to obtain minimum bit error rate for a particular modulation in a general purpose receiver with many different types of demodulator.

The present circuit removes the need for a separate image filter by use of the zero IF stage and will be particularly beneficial for a system requiring multiple demodulators for different modes such as a scanning communications receiver or a radio test set.

It will further be appreciated that any type of modulation may be generated for conversion by the zero IF stage.

It will be appreciated that whilst a summing device is used to sum the I and Q channel if outputs of the second mixing stage of the circuits described herebefore by way of example, in some cases it may be required to reverse the sidebands in the frequency domain. In such an event the summing device may be replaced by a subtracting device to enable the cancellation of the replica of the input signal in the output signal, so as to leave the replica which is reversed in the frequency domain. This can be used to convert upper sideband SSB modulation for example.

Referring now also to Figures 4 and 5 in which corresponding components to those of Figure 1 are correspondingly labelled, the circuit described herebefore may be incorporated in either a receiver as shown in Figure 4, or a transmitter as shown in Figure 5.

In the receiver shown in Figure 4, the fixed frequency the fixed frequency IF signal output of the summing device 29 is filtered, amplified and demodulated by demodulator 14, to yield the detected signal 33.

In the transmitter shown in Figure 5 a base band input signal 29 is modulated by the f2 output of a local oscillator 32 within a modulator 30 to generate a signal centred round f2, thus reversing the process occuring in demodulator 14 of the receiver. The output of the modulator is then divided by splitter 1 into the I and Q channels as before, the signal processing being generally as described in relation to the circuit of Figure 1. The output of the summing device 23 is finally passed through a transmit filter 37 effective to eliminate any harmonics or out-of-band mixing products which may have arisen due to higher order effects.

It will be appreciated that as the first local oscillator 3 generates a signal of frequency equal to frequency of the output signal, the same local oscillator can be re-used in transmit mode on the same channel.

Claims (7)

1. A superheterodyne circuit comprising: means for splitting an input signal into two signal channels; means for generating a first signal at a frequency substantially at the centre of the frequency band of the input signal; means for mixing each of two phase quadrature components of said first signal with a different one of two split input signals to produce two first intermediate frequency signals within a range of frequencies substantially centred round zero frequency; means for generating a second signal of predetermined frequency; means for mixing each of two phase quadrature components of said second signal with a different one of respective signals derived from the first two intermediate frequency signals to produce respective second intermediate frequency signals within a range of frequencies substantially centred round the predetermined frequency; and means for combining the two second intermediate frequency signals so as to provide an output signal in which unwanted mixing products are substantially cancelled.

2. A circuit according to claim 1 wherein the means for combining the two intermediate frequency signals comprises a signal adding means.

3. A circuit according to claim 1 wherein the means for combining the two intermediate frequency signals comprises a signal substracting means.

4. A circuit according to any one of the preceding claims wherein one split input signal channel includes an amplitude control means and/or a phase control means.

5. A circuit according to any one of the preceding claims further including signal filtration means.

6. A circuit to any one of the preceding claims further including signal amplifying means.

7. A superheterodyne circuit substantially as hereinbefore described with reference to the accompanying drawings.