GB2219436A - Semiconductor devices with programmable passive-component layer and process for producing the same - Google Patents

Semiconductor devices with programmable passive-component layer and process for producing the same

Info

Publication number
GB2219436A
GB2219436A GB8915545A GB8915545A GB2219436A GB 2219436 A GB2219436 A GB 2219436A GB 8915545 A GB8915545 A GB 8915545A GB 8915545 A GB8915545 A GB 8915545A GB 2219436 A GB2219436 A GB 2219436A
Authority
GB
United Kingdom
Prior art keywords
producing
same
semiconductor devices
component layer
passive components
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB8915545A
Other versions
GB8915545D0 (en
Inventor
Peter Fred Blomley
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
LSI Logic Europe Ltd
Original Assignee
LSI Logic Europe Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by LSI Logic Europe Ltd filed Critical LSI Logic Europe Ltd
Publication of GB8915545D0 publication Critical patent/GB8915545D0/en
Publication of GB2219436A publication Critical patent/GB2219436A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/118Masterslice integrated circuits
    • H01L27/11801Masterslice integrated circuits using bipolar technology
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/702Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof of thick-or thin-film circuits or parts thereof
    • H01L21/707Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof of thick-or thin-film circuits or parts thereof of thin-film circuits or parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76886Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

A semiconductor wafer or IC array, either analogue or analogue/digital, includes a layer of material which has a substantially linear resistance characteristic and which can be programmed with passive components, i.e. resistors (R) and capacitors (C). The material is preferably polysilicon or chrome disilicide. The passive components (R, C) are configured within the area (10) surrounding active devices (B, P, N) such as CMOS devices and bipolar devices. The process for producing the desired configuration of passive components may include etching of the layer of material.
GB8915545A 1987-11-11 1988-11-11 Semiconductor devices with programmable passive-component layer and process for producing the same Withdrawn GB2219436A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB8726366A GB8726366D0 (en) 1987-11-11 1987-11-11 Ic array
PCT/GB1988/000995 WO1989004553A1 (en) 1987-11-11 1988-11-11 Semiconductor devices with programmable passive-component layer and process for producing the same

Publications (2)

Publication Number Publication Date
GB8915545D0 GB8915545D0 (en) 1989-08-23
GB2219436A true GB2219436A (en) 1989-12-06

Family

ID=10626763

Family Applications (2)

Application Number Title Priority Date Filing Date
GB8726366A Pending GB8726366D0 (en) 1987-11-11 1987-11-11 Ic array
GB8915545A Withdrawn GB2219436A (en) 1987-11-11 1988-11-11 Semiconductor devices with programmable passive-component layer and process for producing the same

Family Applications Before (1)

Application Number Title Priority Date Filing Date
GB8726366A Pending GB8726366D0 (en) 1987-11-11 1987-11-11 Ic array

Country Status (5)

Country Link
EP (1) EP0349605A1 (en)
JP (1) JPH02502054A (en)
AU (1) AU2626388A (en)
GB (2) GB8726366D0 (en)
WO (1) WO1989004553A1 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69012848T2 (en) * 1989-02-09 1995-03-09 Sony Corp Integrated semiconductor circuit arrangements.
JP2836318B2 (en) * 1991-10-18 1998-12-14 日本電気株式会社 Semiconductor device
US5631492A (en) * 1994-01-21 1997-05-20 Motorola Standard cell having a capacitor and a power supply capacitor for reducing noise and method of formation

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3634850A1 (en) * 1985-10-15 1987-04-23 Mitsubishi Electric Corp Method of producing a VLSI semiconductor circuit device of the standard wafer type

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60124015A (en) * 1983-12-08 1985-07-02 Seiko Epson Corp Magnetic head
JPH0666446A (en) * 1992-08-19 1994-03-08 Matsushita Electric Ind Co Ltd Personal space temperature environment conditioner

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3634850A1 (en) * 1985-10-15 1987-04-23 Mitsubishi Electric Corp Method of producing a VLSI semiconductor circuit device of the standard wafer type

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
IEEE Journal *
Patent Abstr *

Also Published As

Publication number Publication date
GB8726366D0 (en) 1987-12-16
WO1989004553A1 (en) 1989-05-18
GB8915545D0 (en) 1989-08-23
AU2626388A (en) 1989-06-01
JPH02502054A (en) 1990-07-05
EP0349605A1 (en) 1990-01-10

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)