GB2188777A - Light emitting element arrays - Google Patents

Description

SPECIFICATION Light emitting element arrays The present invention relates to light emitting element arrays for use in page printers for example. It is an object of the present invention to provide an improved light emmiting diode array. The present invention is characterised in that at least portions of electrodes for supply of power for the terminals in the second row adjacent to the terminals in the first row are covered with an insulating material. Thus no short-circuit will be created even if bonded wires extend outside the terminals in the first row. A light-emmiting diode array embodying the invention will now be described, by way of example, with reference to the accompying diagrammatic drawings in which: Figure 1 is a plan view of a light emitting diode array embodying the present invention; Figure 2 is a cross-sectional view of the array of Fig. 1; Figure. 3 is a plan view of a previously proposed light emitting diode array; and Figure 4 is a cross-sectional view of the conventional array. Figs. 3 and 4 show a previously proposed light emitting diode array. As shown a chip 1 is made of N-type indirect transition crystal with an N-side common electrode 2 on the overall lower surface of the chip. P-type areas 3 are arranged embedded in a straight line longitudinally through chip 1. A layer 4 of an insulating material covers the overall top surface of chip 1 and is formed by sputtering or the like.P-type electrodes 5a in a first row are connected to P-type areas 3 and has terminals 6a in a first row formed at ends of the electrodes 5a. P-side electrodes 5b in a second row are connected to P-type areas 3 and having terminals 6b in a second row formed at ends of the electrodes 5b. The terminals 6a and 6b in the first and second rows are arranged in staggered relationship so as not to come into contact with each other. They have wires (not shown) bonded thereto for recieving supply of electric power. When the terminals are supplied with electric power, the boundaries between P-type areas 3 and chip 1 become light emitting elements 7 to emit light towards the upper surface of chip 1. With this light emmiting diode array, however, there is the problem that when the wires are bonded to the terminals 6a in the first row, the wires may extend outside the terminals 6a to create short-circuits with adjacent P-type electrodes 5b in the second row if the accuracy of the pitches is inaccurate. Parts in Figs. 1 and 2 similar to those in Figs. 3 and 4 are similarly referenced. The array shown in Figs. 1 and 2 includes a chip made of N-type indirect transition crystal with an N-side common electrode 2 on the overall lower surface of the chip. P-type areas 3 are arranged ambedded in a straight line longitudinally through chip 1. A layer 4 of an insulating material covers the overall top surface of chip 1 and is formed by sputtering or the like. P-type electrodes 5a in a first row are connected to the P-type areas 3 and have terminals 6a in a first row formed at ends of the electrodes 5a. P-type electrodes 5b in a second row are connected to P-type areas 3 and have terminals 6b in a second row formed at the ends of the electrodes 5b. The terminals 6a and 6b in the first and second row are arranged in staggered relationship so as not to come into contact with each other. The respective boundaries between P-type areas 3 and chip 1 will become light emitting sections 7. A layer 8 covers those portions of the P-type electrodes in the second row adjacent to the terminals in the first row. The covering layer 8 has a width which can completely cover at least terminals 6a in the first row. It is formed belt-like by sputtering or the like so as to extend longitudinally through chip 1 and then removed away by etching or the like at portions 8a where wires are to be bounded. Since, in this process, those portions of P-side electrodes 5b in the second row adjacent to terminals 6a in the first row are covered with the insulating material, wires will create no short-circuits with P-type electrodes 5b in the second row when bonded to terminals 6a in the first row even if the wires may extend slightly outside the terminals 6a in the first row. As described above, at least those portionns of the power supply electrodes for the terminals in the second row adjacent to the terminals in the first row are covered with an insulating material, so that wires bonded to the terminals in the first row will create no short-circuits with the power supply electrodes for the terminals in the second row even if the wires are slightly inaccurately bonded to the terminals in the first row. Thus no bad articles are manufactured, the yield is improved, and the manufacuring cost is reduced.

Claims (4)

1. A light emitting element array comprising a plurality of light emitting elements arranged in a straight line; and a plurality of external terminals of electrodes for supply of power to said light emitting elements, said terminals being arranged in first and second rows in staggered relationship to each other along said plurality of light emitting elements; at least portions of said electrodes for said terminals in said second row close to said terminals in said first row being covered with an insulating material.

2. An array according to Claim 1, wherein said terminals in said first row and said elec- trodes for supply of power for said second row are covered by a common strip-like layer of an insulating material, and wherein said layer is removed at positions of said terminals in the first row for electrical connection.

3. An array according to Claim 2, wherein said common strip-like layer is formed by sputtering.

4. A light emitting diode array substantially as hereinbefore described with reference to Figs. 3 and 4 of the accompanying diagrammatic drawings.