GB2186139A - Phase and quadrature receiver - Google Patents

Abstract

A broadband receiver comprising two pairs of signal mixers (M1 and M2, M3 and M4), a summing node (???) and a subtracting node ( DELTA ). High frequency input signal is applied to one pair of these mixers (M3, M4) and a quadrature phase related input signal is applied to the other pair (M1, M2). Quadrature phase related reference local oscillator signals are applied to the mixers of each pair (M1 and M2; M3 and M4). In-phase mixer product signals are subtracted at one node ( DELTA ) and quadrature phase mixer product signals are summed at the other node (???), eliminating higher order product terms, and obviating need for critical matched low-pass filtration. The receiver may be implemented using analogue and/or digital components. <IMAGE>

Description

SPECIFICATION Phase and quadrature receiver Technical Field The present invention concerns improvements in or relating to phase and quadrature receivers.

In many radar receivers and also in some forms of communication receivers, frequency modulation discriminators, etc., it is often desirable to produce information in the form of 'In-phase' (I) and 'Quadrature' (Q) signals at the output of the detector stage of the receiver.

Background Art Hitherto, essentially two techniques have been adopted for the generation of in-phase and quadrature output signals. In one technique, the received signal is applied to a pair of mixers and mixed with local oscillator reference signals displaced by quadrature phase. In the other technique, the signal received is split into quadrature components each of which is applied to a corresponding mixer and mixed with a common local oscillator reference signal. In both techniques, however, the mixer output signals require critical low-pass filtration to remove high-order mixer product components and to effect satisfactory in-phase signal and quadrature signal separation. The need for such critical filtration restricts application to narrow-band operation.

Disclosure of the Invention The present invention is intended to effect improvement wherein wider band operation may be afforded.

In accordance with the invention thus, there is provided a phase and quadrature receiver comprising:two pairs of matched mixers, namely first and second mixers and third and fourth mixers, respectively; signal inputs means, connected to both pairs of mixers, to apply a first high frequency input signal to the first pair of mixers, and, to apply a second high frequency input signal to the second pair of mixers, said first and second input signals differing, within permissible tolerance, by quadrature phase; reference means connected to the four mixers, to apply a first high frequency reference signal to the first and fourth mixers, and, to apply a second high frequency reference signal to the second and third mixers, said first and second reference signals differing, within permissible tolerance, by quadrature phase; difference means connected to said first and third mixers to subtract mixed signal products derived at the output of each first and third mixer, respectively, and to produce thus a phase output intermediate frequency signal; and, summing means connected to said second and fourth mixers to sum mixed signal products derived at the output of each second and fourth mixer, respectively, to produce thus a quadrature output intermediate frequency signal.

The receiver aforesaid thus incorporates both well established techniques referred to earlier, but the addition and subtraction of the component signal terms affords cancellation, or in less ideal circumstances, gross diminution, of high order mixed signal product terms without requirement for critical low-pass filtering in the output signals path. Wider band operation thus is afforded. Notwithstanding, where allowing for practical tolerance, less than exact quadrature phase operation is provided for the input signal, reference signal, or both, undesirable mixed product term signals can be removed using less critical filter techniques.

The signal input means may comprise for example a signal splitter and coupled thereto, in one or both output arms, phase delay means, for differentiating the two input signals thus provided by a relative phase shift of 7r/2 or thereabouts.

Conveniently, the reference means may be a local oscillator chosen to provide reference signals of sinusoidal waveform, and the mixers chosen thus as linear multipliers.

Alternatively, the reference means may be a local oscillator chosen to provide reference signals of square waveform, and the mixers chosen thus as switching mixers.

Other reference means, chosen to provide reference signals of alternative waveform, especially signals of odd periodic waveform, dc displaced waveforms and the like, are not precluded from the general scope of this invention.

The invention may be implimented in either analogue or digital form. In a digital implimentation, the mixers would be digital multipliers of suitable characteristics and word length. In analogue circuits, mixers (linear multipliers) of conventional analogue form could be used.

Brief Introduction of the Drawings In the drawings accompanying this specification: Figures 1 and 2 are block schematic circuit drawings each of a different known type of phase and quadrature receiver; and, Figure 3 is a block schematic circuit drawing of a phase and quadrature receiver constructed and configured in accord with this invention.

Description of Preferred Embodiments So that this invention may be better understood, embodiments thereof will now be described.

The description that follows is given by way of example, only.

A well known type of phase and quadrature receiver is shown in Fig. 1. This receiver comprises a pair of linear multiplication mixers M3 and M4 to each of which one of two inphase high frequency input signals S (say sin wct) is applied. These signals S are mixed with quadrature phase related reference signals, cos wot and sin wot respectively, supplied by means of a local oscillator LO. Mixer product signals are filtered at the output of each mixer M3 and M4 by means of a critically selected pair of matched low-pass filters F3 and F4 each employed to remove high order mixer products and cross modulation terms. In-phase (I) and Quadrature (Q) channel signals respectively are extracted at the output of each of these filters, F3 and F4.

A second and alternative well known type of phase and quadrature receiver is shown in Fig.

2. This likewise comprises: a pair of linear multiplying mixers, here labelled M2 and M3; a following pair of low-pass critical filters F2, F3 and, a common reference signals source, local oscillator LO. In this latter case the input signal S is split into two components S1, SQ. A phase delay component P1 is inserted in the path of one of these signals, signal So, SO that the two input signals S, and So differ by quadrature phase. In-phase reference signals cos wct are applied to the mixers M2 and M3. As before, critical filtering is a requisite.

In the circuits of Figs. 1 and 2, terms in (wc+wO) occur in the mixer outputs, so the limitation in the low-pass filters must be below (wC+wOì and above (w,-w,).

The novel phase and quadrature receiver shown in Fig. 3 comprises two pairs of linear multiplying mixers, mixers M1, M2 and M3, M4. The input signal S is split into two signal paths one of which includes a broad-band phase-shift network P1. Two quadrature input signals S1, So are thus provided and each is applied to a respective pair of the mixers, namely mixers M3 and M4 and mixers M1 and M2. The output of the first mixer, mixer M1, and the output of the third mixer, mixer M3, are combined at a subtracting node A.The output of the second mixer, mixer M2 and the output of the fourth mixer, mixer M4, are combined at a summing node S. High frequency reference signals are applied to each of the four mixers, a first reference signals sin wot being applied to the first and fourth mixers M1, M4, and, a second reference signal cos wot being applied to the second and third mixers, M2 and M3, as shown.

In this novel receiver, provided a broad banded phase shift of the input is afforded, then very broad band systems are possible and the need for critical matched low-pass filters is obviated.

This arises because high order products are phased out, leaving only baseband terms. In the known receivers shown Figs. 1 and 2, terms (wc+wO) occur in the output, as the limitation in the low pass filters (F2, F3, F4) must be below (w0+wj and above (w,-w,). In the novel receiver shown in Fig. 4 no such limitation exists, as no filters need be used.

In practical systems it may be that low levels of higher frequencies are generated, especially in the case where the input phase shift is not exactly it/2. If this is so, then a relatively low order low pass filter will remove the spurious output terms and therefore have the effect of broadbanding the 7r/2 phase-shift and making it less critical.

A brief mathematical derivation is given below to illustrate the cancellation of high order terms: In the circuit of Fig. (3) let the input be: Vino (t)=A sin (w,t-tO(t)) Where A is the amplitude, wc is the carrier frequency, t is time and t3(t) is an arbitrary phase angle.

Let the local oscillator have unit amplitude and zero or 900 phase. ie. applied as cos wot and sin wot where w0 is the LO frequency.

After the input phase shift, the signal Vin nl2(t) =A sin (wct+0(t)+7t/2) We have A Vino (t) x cos w0t= -sin (w0t+w0t+0(t))+sin (w0t-w0t+ 0(t)) (1) 2 A Vin (t) x sinw0t = -cos (w0t+w0t+#(t) + cos (w0t-w0t+#(t)) (2) 2 and A Vin x/2 (t) x cos w0t = -sin (w0t+w0t+#(t)+#/2) + sin(w0t-w0t+#(t)+#/2) 2 A Vin x/2 (t) x sin w0t = - -(cos (w0t+w0t + #(t) + #/2) + cos (w0t-w0t+#(t)+#/2) 2 or A Vin x/2 (t) x cos w0t = -cos (w0t+w0t+#(t)) + cos (w0t-w0t+#(t)) (3) 2 A Vin x/2 (t) x sin w0t = -sin (w0t+w0t+#(t)) - sin(w0t-w0t+#(t)) (4) 2 Subtracting (4) from (1) A Vino (t) cos w0t-Vin n/2 (t) sin w0t = -2 sin (w0t-w0t+#(t)) 2 Add (2) to (3) A Vin (t) sin w0t+Vin x/2 (t) cos w0t = -2cos (w0t-w0t+#(t)) 2 ie. V0 = A sin(w0t-w0t+#(t)) V1 = A cos(w0t-w0t+#(t)) ie. The outputs are at the difference frequency only. No low-pass filter is needed. In addition, all signals at the input are translated to the base-band in the same way. A lengtheir proof is possible, but it is implicit in the above that there is no cross-modulation of input signals provided that the mixers are linearly multiplying devices.

Suppose that the phase shift was not 71/2 but (#/2+#).

Then (3) becomes A Vin x/2 (t) x cos w0t = -[cos(w0t+w0t+#(t)+#) + cos (w0t-w0t+#(t)+#)] (3a) 2 and (4) becomes A Vin x/2 (t) x sin w0t 0 - [sin(w0t+w0t+o(t)+') - sin (w0t-w0t+#(t)+#)] (4a) 2 Subtracting (4a) from (1) A Vin cos w0t-Vin x/2 (t) sin w0t = -[sin (w0t+#(t)). (1-cos#) 2 -cos (w0t+w0t+#(t)).(sin#) +sin(w0t-w0t+#(t).(1+cos#) +cos (w0t-w0t+#(t)). (sin (5) ] (7) Taking the approximation that # is small, is cos #~1 and sin #~#, the equation (7) reduces to V'0=A[sin(w0t-w0t+#(t)+#/2 (cos(w0t-w0t+#(t)]-[cos(w0t+w0t+#(2)) ie.V'0=V0+##cos(w0t-w0t+#(t))-cos(w0t+w0t+#(t)] (8) Similarly A# V;=W1+ sin (wj+w0t+ (p(t)) -sin (w0t-w0t+#(t)] (9) 2 Both the additional terms include the sum frequency (wct+Wot) and the difference frequency (wCt+wot). Ignoring the sum frequency components, since they can be low pass filtered, the final results are V'0=V0+#V1 2 # and V;--V,+ -V0 (10) 2 Where # is in units of H/2.

If we accept that a reduction in Vl by 0.7071, ie. the 3db point, is the limit, then the bandwidth of the system system is from the point where #/2=0.7071 to 1.2929 ie. +29% of the design centre frequency. It has therefore been shown that the phase shift required is not particularly critical.

The system bandwidth is +29% of design centre.

For practical systems, either analogue or digital, it may be desirable to operate with a 'squarewave' drive. In analogue terms, this is a switching-type mixer, in digital terms it means that the multiply function can be obtained by a simple manipulation of the data, such as an exclusive-or operation, instead of a true digital multiplier.

In either case, the multiplicand can be represented as a Fourier series f(t)01/2a0+ 'ancos not+bnsin nt n=1 Where a0--A(- - 1) Jr A a0 - (sin n #) 2nz A bn=-(1-cosn#) 2n7r 0=phase angle of drive waveform. For a square wave, either symmetrically located about zero, or where the circuit is effectively A.C. coupled, # is exactly equal to #.

Therefore, aO=O an=0 A if if n odd, nn or bn=O if n even A 1 1 ie. bn=(1++") Jr 3 5 So A 1 1 F(t)=/#. [sinw0t+/3sin3w0t+/5sin5w0t---] Similarly, shifting the origin by #/2, A 1 1 F(t)= -cosw0t- -cos3w0t+ -cos5w0t Jr 3 5 ie. The two local oscillator signals consist of odd harmonics of the fundamental. The effect of this is no to produce the same sum frequency cancellation as for the fundamental, and to produce in the output terms in the difference frequency eg.

A A A V0=-sin [ (wt-w0t+(p(t)) ] -- [ sin (3 w0t+#(t))]+ -[sin (5w t-w t+0(t)) ] Jr 371 57r etc.

and similar terms for Vl. Since by definition wcswOS these terms are at high frequencies, and are relatively easily removed by uncritical filters. This contrasts with the situation in conventional mixers, where intermodulation products due to higher order terms can be problematic. The ideal realization of this technique therefore demands true multipliers, either analogue or digital, but adequate performance could be achieved by a switching mixer, again either analogue or digital.

The block diagram of Fig. 3 shows one realization of the invention. Alternatives are to put the #/2 phase shift in the lower input arm of the system, or to put phase shifts of +#/4 and -Jr/4 in the upper and lower input arms respectively, or inversely. Similarly, there are several permutations of the local oscillator inputs (sin wot and cos wot) and variations of the adder and subtractor, all of which will produce equivalent results.

An analogue implimentation of the novel receiver, shown Fig. 3, will be considered now.

Consider then an input signal at 10.7 MHz frequency. This signal feeds two input lines, a bifurcated signal path, in one of which a composite delay line P1 is included. A quarter period delay 233ns is requisite and this can be provided using a 1 1x200ns Polara type 101A201T delay line in series with a 1 x50ns Polara type 101A500 (7th tap) delay line. The analogue mixers M1 to M4 may be double balanced modulators-for example Plessey SL641 mixers. Highspeed operational amplifiers, for example Plessey SL541 amplifiers may be used at the subtract A and sum E nodes, each being configured by appropriate choice and arrangement of input and feedback resistors.The quadrature related reference signals may be derived from a common local oscillator using a bifurcated signal path, a serial composite delay line, same as above, and, buffer amplifiers, for example Plessey SL541 amplifiers.

In a digital implimentation of the novel receiver, shown Fig. 3, quadrature related input signals may be provided in one of several ways: (i) For an analogue input signal, using an analogue-to-digital converter (ADC) of the type providing phase and quadrature digital output signals. Such a converter is described in our copending patent application entitled Analogue to Digital Converter, filed on even date; (ii) For a digital input signal, using acomposite analogue delay line-eg. Polara type delay lines, as just described; or, (iii) Using a digital delay line-for example a charge coupled device (CCD) shift register, which may be implimented using an array of TRW TDC 1006 devices.

Digital multipliers, eg TRW MPY 012H, may be used as mixers and digital logic gates employed for signal summation and subtraction.

Claims (7)

CLAIMS Having described the invention and the manner by which it may be performed, we claim:

1. A phase and quadrature receiver comprising:two pairs of matched mixers, namely first and second mixers and third and fourth mixers, respectively; signal input means connected to both pairs of mixers, to apply a first high frequency input signal to the first pair of mixers, and, to apply a second high frequency input signal to the second pair of mixers, said first and second input signals differing, within permissible tolerance, by quadrature phase; reference means connected to the four mixers, to apply a first high frequency reference signal to the first and fourth mixers, and, to apply a second high frequency reference signal to the second and third mixers, said first and second reference signals differing, within permissible tolerance, by quadrature phase; difference means connected to said first and third mixers to subtract mixed signal products derived at the output of each first and third mixer, respectively, and to produce thus a phase output intermediate frequency signal; and, summing means connected to said second and fourth mixers to sum mixed signal products derived at the output of each second and fourth mixer, respectively, to produce thus a quadrature output intermediate frequency signal.

2. A receiver, as claimed in claim 1, wherein the mixers are linearly multiplying and the reference means provides reference signals of sinusoidal waveform.

3. A receiver, as claimed in claim 1, wherein the mixers are switching mixers and the reference means provides reference signals of square waveform.

4. A receiver, as claimed in claim 1, wherein the mixers are digital multipliers, the reference means provides digital multiplying signals, and the difference and summing means are comprised of digital logic gates.

5. A receiver, as claimed in any one of the preceding claims, wherein the signal input means comprises a bifurcated signal path and phase delay means.

6. A receiver, as claimed in any one of the preceding claims 1 to 4, wherein the signal input means comprises an anologue digital converter of the type providing phase and quadrature output signals.

7. A phase and quadrature receiver constructed, adapted and arranged to operate substantially as described herein-before with reference to and as shown in Fig. 3 of the accompanying drawings.