GB2184599A - Schottky diode for an integrated circuit - Google Patents
Schottky diode for an integrated circuit Download PDFInfo
- Publication number
- GB2184599A GB2184599A GB08628416A GB8628416A GB2184599A GB 2184599 A GB2184599 A GB 2184599A GB 08628416 A GB08628416 A GB 08628416A GB 8628416 A GB8628416 A GB 8628416A GB 2184599 A GB2184599 A GB 2184599A
- Authority
- GB
- United Kingdom
- Prior art keywords
- schottky diode
- buried layer
- silicon
- layer
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000758 substrate Substances 0.000 claims abstract description 19
- 238000009792 diffusion process Methods 0.000 claims abstract description 13
- 229910052787 antimony Inorganic materials 0.000 claims abstract description 10
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 claims abstract description 10
- 239000002019 doping agent Substances 0.000 claims abstract 5
- 229910052710 silicon Inorganic materials 0.000 claims description 26
- 239000010703 silicon Substances 0.000 claims description 26
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 16
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 14
- 229910052698 phosphorus Inorganic materials 0.000 claims description 14
- 239000011574 phosphorus Substances 0.000 claims description 14
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 7
- 229910052796 boron Inorganic materials 0.000 claims description 7
- 238000002513 implantation Methods 0.000 claims description 7
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 abstract 3
- 239000004065 semiconductor Substances 0.000 description 8
- 230000003071 parasitic effect Effects 0.000 description 7
- 238000000034 method Methods 0.000 description 6
- 239000000969 carrier Substances 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- 230000004888 barrier function Effects 0.000 description 4
- 238000000151 deposition Methods 0.000 description 4
- 230000008021 deposition Effects 0.000 description 4
- 230000001965 increasing effect Effects 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 230000015556 catabolic process Effects 0.000 description 3
- 238000002955 isolation Methods 0.000 description 3
- 239000002131 composite material Substances 0.000 description 2
- 230000003292 diminished effect Effects 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 230000001939 inductive effect Effects 0.000 description 2
- 238000001465 metallisation Methods 0.000 description 2
- 230000000881 depressing effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000008570 general process Effects 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/2205—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities from the substrate during epitaxy, e.g. autodoping; Preventing or using autodoping
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
- H01L29/167—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table further characterised by the doping material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
- Bipolar Transistors (AREA)
Abstract
A Schottky diode comprises a buried layer which has been produced by doping with two dopants, e.g. antimony and phosphorous, having different rates of diffusion. When a layer 2 is formed above the buried layer by high temperature episaxial growth the greater diffusivity of the phosphorous creates an outer region 10 containing phosphorous only as dopant surrounding an inner region 5 containing both dopants. This structure reduces the majority carrier resistance under forward bias and the leakage current to the substrate 3. <IMAGE>
Description
SPECIFICATION
Integrated Schottky Diode
The present invention relates to an integrated
Schottky diode having an improved structure such to reduce the forward voltage drop and to reduce also the leakage current towards the substrate during forward biasing of the diode.
Schottky diodes have had, and still have, a great importance in improving performances of integrated bipolar circuits, especially for digital applications that is switching applications, as well as for applications wherein extremely high frequencies are encountered such as for example microwave mixers and detectors, etc..
The Schottky barrier diode, that is of the rectifying metal-semiconductor junction type, possesses inherent characteristics which makes it much more advantageous with respect to the p-n junction diode in applications requiring high current density for the same direct voltage applied as well as in high frequency applications and in switching circuits.
In Schottky diodes, in fact, the current is attributable mainly to the majority carriers, while in p-n junctions minority carriers do contribute, and since the switching time of a p-n junction is limited by the excess of minority carriers, Schottky diodes have a decisively better behaviour at high frequencies. Moreover, in Schottky diodes, the forward voltage drop is very much smaller than in a p-n junction diode for the same current density (by at least an order of magnitude) and also this characteristic is advantageously exploited in different circuit applications of Schottky diodes.This latter characteristic of Schottky diodes makes them particularly effective in applications which contemplate operation at relatively high levels of return and thus extremely useful in power monolithic integrated circuits with currents commonly greater than about 0,5 A and wherein current levels of about S5 A are often reached.
An application of this kind is, for example, that of the recirculation diodes in transistors bridge output stages for driving electric motors or more generally inductive loads.
The physical implementation structure of
Schottky diodes in integrated circuits has been more and more perfected with the aim of improving the diode characteristics.
It is known in particular that the structure of an integrated Schottky diode may comprise some expedients directed to reducing the probability of soft breakdown in the reverse characteristic of the diode. It is typical enough for the integrated structure to comprise the so-called "guard ring" consisting in a shallow p-n junction diffused along the edges of the contact area between the metal and the semiconductor and whose doping level is such as to give rise to a breakdown voltage higher than the one of the Schottky diode (planar contact area between the metal and the semiconductor).
Another well known expedient for eliminating the effects of soft breakdown consists in extending the metal layer over the oxide around the area of the
Schottky barrier; under reverse bias the surface of the underlying semiconductor results depleted thus increasing the overall radius of curvature in the depletion zone of the metal-semiconductor contact.
A negative characteristic of integrated Schottky diodes described above is, as it is well known, constituted by the fact that, under forward bias conditions, there exists a parasitic PNP transistor giving rise to a certain leakage current towards the substrate.
A main objective of the present invention is to provide an integrated Schottky diode with improved characteristics of forward voltage drop.
It is a further objective of the present invention to provide an integrated Schottky diode with improved characteristics of leakage towards the substrate under forward bias conditions.
It has been found that, by providing a kind of "bottom-n-well" of appropriate dimensions (i.e. a phosphorus buried layer), that is a phosphorusdoped region around the actual buried layer of antimony, connected through a contact deep diffused region to the metallization of the cathode terminal, the voltage drop is significantly reduced in so far shortened results the resistive path made by the majority carriers injected at the metalsemiconductor contact. Simultaneously, by increasing the charge in the base region that is the total number of impurities per unity of area of the base region of the parasitic PNP transistor its intrinsic gain is reduced and therefore the characteristics of leakage toward the substrate of the integrated diode are decisively improved.
The "efficiency" of the parasitic PNP transistor may be diminished further by reducing the charge in the emitter region by diffusing, for example in the guard ring of the Schottky diode of p-doped silicon, a n+ emitter region short-circuited to the p region.
Furthermore, we prefer substituting to the normal diffusion process for realizing the guard ring of the
Schottky diode an appropriate boron implantation with the aim of obtaining the p-silicon region of the guard ring with a relatively high surface resistivity, e.g. about 0.51.0 K#)/E, and having the desired depth because also this expedient has revealed itself useful in reducing further the charge in the emitter region of the parasitic PNP transistor.
Also with the purpose of reducing the leakage current towards the substrate, it is advantageous to form a further p-doped silicon region short-circuited to the cathode terminal of the diode in such a way as to form a lateral PNP transistor which is capable of recovering a portion of the current which otherwise would result in being injected towards the substrate under forward bias conditions of the Schottky diode.
With the aim of making the invention more easily understood the description will now proceed making reference to the annexed drawing wherein:
Figure 1 is an illustration of a vertical section of a conventional type of integrated Schottky diode; and
Figure 2 is an illustration of a vertical section of an integrated Schottky diode made in accordance with the present invention.
As it may be observed in Fig. 1, an integrated
Schottky diode of the conventional type presents a section wherein it is easily identified the metallic layer 1 acting as the anode A. The Schottky barrier is formed by the junction between the metal 1 and the semiconductor, e.g. n-silicon, of epitaxial layer 2 grown on a substrate 3 of p-silicon. The electric contact with the metallic layer 4 of the cathode terminal K is formed by the buried layer 5 of n+ silicon and by the n+ contact diffusion 6. The guard ring 7 is formed by the p diffusion, electrically in contact with the anode 1, formed along the perimeter of the rectifying (Schottky barrier) metal/ semiconductor contact area.
Generally the characteristics of the different regions are the following: the buried layer 5 is silicon doped with antimony having a surface resistivity comprised between 10 and 30 #IE, the contact deep diffused region 6 is silicon doped with phosphorus having a surface resistivity of about 1 n/0 while the guard ring diffused region 7 is silicon doped with boron and having a surface resistivity comprised between 100 and 200 D/a.
The integrated structure is moreover, substantially isolated from other adjacent integrated components by means of the isolation p+ deep diffused regions 8 and 9 of silicon doped with boron and having a surface resistivity comprised between 1 and lOD/IZI.
Evidenced in a schematic manner in Fig. 1 is the parasitic PNP transistor which is excited under conditions of forward bias of the integrated
Schottky diode giving rise to a leakage current towards the substrate. The emitter being represented by the p-region of the guard ring 7, the base by the epitaxial n-layer of silicon 2 and the collector by the p-silicon substrate 3.
In Fig. 2 is illustrated the cross section of an integrated Schottky diode made in accordance with the present invention wherein the regions or portions equivalent to the regions or portions of Fig.
1 are indicated by the same numbers and/or symbols.
As it may be observed, during the epitaxial growth a bottom-n-well 10 is formed that is a buried layer of silicon doped with phosphorus and having a resistivity of less than 60 S2/ [ 1, around the actual buried layer of antimony 5 itself.
Since the forward voltage drop across the diode is essentially due to the resistance R of the path of the majority carriers from the depletion region, underlying the metal-semiconductor junction, to the cathode terminal, as schematically indicated in Fig.
1 by virtue of the phosphorus buried layer 10 a substantial reduction of such a resistance R is achieved.
Furthermore, by virtue of the phosphorus buried layer 10, the charge in the base region is greatly increased, that is the total number of impurities per unit of area of the base region of the parasitic PNP transistor, thus depressing its gain and therefore the leakage current towards the substrate.
Preferably, moreover, a p-silicon region 11, doped with boron and having a resistivity comprised preferably between 100 and 200 nnz, is formed in such a way as to result short-circuited to the cathode terminal K of the diode. In this way a lateral PNP transistor is formed capable of recovering a portion of the current which otherwise would be injected towards the substrate under conditions of forward bias of the Schottky diode.
The efficiency of the parasitic PNP transistor, which determines the amount of leakage current towards the substrate, may be further diminished by reducing the charge lathe emitter region by forming a n+ silicon region 12 within the guard ring 7 by diffusing phosphorus in such a way as to obtain a resistivity of about S6 f)IE or by increasing the resistivity in the p-silicon region of the guard ring to about 0.51 k0/Cl, utilizing an implantation technique for making the boron diffusion.
The sequence of the significant operations of the process of fabrication of an integrated Schottky diode of the invention starting from a normal psilicon substrate may be synthetically described as follows:
1. Sb implantation for forming the inner buried layer(5); 2. P implantation for forming the outer phosphorus buried layer (that is the bottom-n-well) (10);
3. B implantation for forming the bottom isolation diffusion (8);
4. Epitaxial growth;
5. Deposition and diffusion of the isolation (9);
6. Deposition and diffusion of the contact (6);
7. Implantation or deposition and diffusion of the guard ring (7) and of the p-silicon region (11); 8. Deposition and diffusion of the n+ silicon region (12) in the guard ring;
9. Opening of the contacts and metallization.
As it is well known to the expert technician, having implanted the pre-determined amount of Sb and of P on the appropriate area of the surface of the substrate, during the epitaxial growth which takes place at high temperature, typically at about 1 2000C in the case of silicon, by virtue of the greater diffusion coefficient of phosphorus with respect to the one of antimony, phosphorus diffuses for a greater "depth" than antimony. The two buried layers are thus formed of antimony and phosphorus in an inner region and essentially of only phosphorus in an outer region. This is, on the other hand, the technique utilized for making the so-called "bottom-n-well" in the process of fabricating vertical PNP transistors with isolated collector. The fabrication process of the integrated Schottky diode of the invention may thus result of simple implementation within the general process of fabrication of the whole integrated circuit.
In the structure of the Schottky diode of the invention the buried layer of n+ silicon doped with antimony constitutes a sort of "core" of high conductivity of the composite structure for the electric contact with the cathode terminal thus contributing, by virtue of its high conductivity, to reduce the transverse resistance of the composite contact structure which comprises the outer phosphorus buried layer 10 and the contact diffusion 6 besides, naturally, the inner antimony buried layer (5).
The Schottky diode of the invention is particularly effective in applications contemplating high current density, for example, as recirculation diodes in transistors bridges for driving electric motors andior inductive loads.
The modification introduced in the normal fabrication process determines a small decrease of the maximum reverse voltage sustainable by the
Schottky diode of the invention which results substantially similar to the collector-emittervoltage of the NPN transistor with respect to the one of the conventional type Schottky diode which is potentially equivalent to the collector-base voltage of the NPN transistor. This small decrease is, on the other hand, negligeable in many applications such as the ones mentioned above, wherein, viceversa, the reduction of the forward voltage drop of the leakage current toward the substrate are very advantageous characteristics.
Claims (6)
1. An integrated Schottky diode formed in the epitaxial layer grown on a substrate and having a structure of electric contact with the cathode terminal comprising a buried layer and a deep contact diffused region reaching such buried layer characterized in that said structure of electric contact comprises a first buried layer and a second buried layer, the latter being realized with a dopant having a higher diffusivity of the diffusivity of the dopant of said first layer and extending itself for a larger depth than the depth of said first layer within the thickness of said epitaxial layer from the surface of said substrate.
2. The integrated Schottky diode of claim 1 wherein said deep contact diffused region extends as far as reaching at least said second buried layer.
3. The Schottky diode of claim 1 wherein said substrate is of p-silicon, said first buried layer is of n+ silicon doped with antimony, said more extensive buried layer is n+ silicon doped with phosphorus and said deep contact diffused region is n+ silicon doped with phosphorus.
4. The Schottky diode according to claim 3 wherein the diode is provided with a guard ring and with a p-silicon diffused region doped with boron short-circuited with the cathode terminal of the diode formed along the edge of said deep contact diffused region opposed to said guard ring for forming a lateral PNP transistor.
5. The Schottky diode according to claim 4 wherein said guard ring is a region of p-silicon formed by boron implantation and diffusion and having a surface resistivity greater or equal to 0.5 kQ/I2.
6. An integrated Schottky diode substantially as described herein with reference to fig. 2 of the accompanying drawings.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| IT23364/85A IT1186490B (en) | 1985-12-23 | 1985-12-23 | INTEGRATED SCHOTTKY DIODE |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| GB8628416D0 GB8628416D0 (en) | 1986-12-31 |
| GB2184599A true GB2184599A (en) | 1987-06-24 |
| GB2184599B GB2184599B (en) | 1989-12-06 |
Family
ID=11206434
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB8628416A Expired GB2184599B (en) | 1985-12-23 | 1986-11-27 | Integrated schottky diode |
Country Status (4)
| Country | Link |
|---|---|
| DE (1) | DE3644253A1 (en) |
| FR (1) | FR2592226A1 (en) |
| GB (1) | GB2184599B (en) |
| IT (1) | IT1186490B (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5338964A (en) * | 1992-03-26 | 1994-08-16 | Sgs-Thomson Microelectronics S.A. | Integrated circuit comprising a protection diode array |
| US7528459B2 (en) * | 2003-05-27 | 2009-05-05 | Nxp B.V. | Punch-through diode and method of processing the same |
| US20110156199A1 (en) * | 2008-09-04 | 2011-06-30 | Monolithic Power Systems, Incc | Low leakage and/or low turn-on voltage schottky diode |
| CN101656272B (en) * | 2009-07-22 | 2011-08-03 | 上海宏力半导体制造有限公司 | Schottky diode and fabricating method thereof |
| CN114709254A (en) * | 2022-04-01 | 2022-07-05 | 无锡友达电子有限公司 | High-voltage parallel diode structure with composite buried layer and preparation method thereof |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3882322T2 (en) * | 1987-09-30 | 1993-10-21 | Texas Instruments Inc | Static memory using Schottky technology. |
| DE19616605C2 (en) * | 1996-04-25 | 1998-03-26 | Siemens Ag | Schottky diode arrangement and method of manufacture |
| CN113013259A (en) * | 2021-02-26 | 2021-06-22 | 西安微电子技术研究所 | Low-conduction-voltage-drop Schottky diode structure and preparation method thereof |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| BE758683A (en) * | 1969-11-10 | 1971-05-10 | Ibm | MANUFACTURING PROCESS OF A SELF-INSULATING MONOLITHIC DEVICE AND BASE TRANSISTOR STRUCTURE |
| JPS55141763A (en) * | 1979-04-23 | 1980-11-05 | Hitachi Ltd | Schottky barrier diode and fabricating method of the same |
-
1985
- 1985-12-23 IT IT23364/85A patent/IT1186490B/en active
-
1986
- 1986-11-27 GB GB8628416A patent/GB2184599B/en not_active Expired
- 1986-12-22 FR FR8617976A patent/FR2592226A1/en not_active Withdrawn
- 1986-12-23 DE DE19863644253 patent/DE3644253A1/en not_active Withdrawn
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5338964A (en) * | 1992-03-26 | 1994-08-16 | Sgs-Thomson Microelectronics S.A. | Integrated circuit comprising a protection diode array |
| US7528459B2 (en) * | 2003-05-27 | 2009-05-05 | Nxp B.V. | Punch-through diode and method of processing the same |
| US20110156199A1 (en) * | 2008-09-04 | 2011-06-30 | Monolithic Power Systems, Incc | Low leakage and/or low turn-on voltage schottky diode |
| US8809988B2 (en) * | 2008-09-04 | 2014-08-19 | Monolithic Power Systems, Inc. | Low leakage and/or low turn-on voltage Schottky diode |
| CN101656272B (en) * | 2009-07-22 | 2011-08-03 | 上海宏力半导体制造有限公司 | Schottky diode and fabricating method thereof |
| CN114709254A (en) * | 2022-04-01 | 2022-07-05 | 无锡友达电子有限公司 | High-voltage parallel diode structure with composite buried layer and preparation method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| IT1186490B (en) | 1987-11-26 |
| FR2592226A1 (en) | 1987-06-26 |
| IT8523364A0 (en) | 1985-12-23 |
| DE3644253A1 (en) | 1987-06-25 |
| GB2184599B (en) | 1989-12-06 |
| GB8628416D0 (en) | 1986-12-31 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PCNP | Patent ceased through non-payment of renewal fee |