GB2183946A

GB2183946A - Frequency synthesiser

Info

Publication number: GB2183946A
Application number: GB08530165A
Authority: GB
Inventors: Brian William Oughton
Original assignee: Plessey Co Ltd
Current assignee: Plessey Co Ltd
Priority date: 1985-12-06
Filing date: 1985-12-06
Publication date: 1987-06-10

Abstract

In a digital frequency synthesiser having a phase locked loop including a voltage controlled oscillator providing an output frequency, there is a conflict between the requirements for a short loop setting time and a need for only short frequency steps as the output frequency is changed. The invention provides a digital frequency synthesiser having a phase locked loop and a variable frequency source, the loop including mixer means (5) arranged to receive a signal from the source (11) for frequency interpolation purposes, in which the mixer means (5) is a single sideband mixer of the kind which requires phase quadrature-related input signals whereby cancellation of unwanted mixing products is facilitated. <IMAGE>

Description

SPECIFICATION Frequency synthesiser This invention relates to a digital frequency synthesiser of the kind comprising a phase locked loop which includes a voltage controlled oscillator providing an output frequency, the voltage controlled oscillator being controlled by a phase detector in the presence of a phase difference between a reference frequency and a signal derived from the output frequency via a variable divider, in accordance with the setting of which the output frequency is selectable.

In synthesisers of the kind just before defined the frequency steps obtainable are normally limited to multiples of the reference frequency and if smaller steps are required then a smaller reference frequency must be used. It is not always possible however to use a low frequency reference signal since the reference signal frequency determines the loop setting time and for some applications, such as frequency hopping synthesisers for example, long loop setting times cannot be tolerated because frequencies must be selected rapidly.

It will be appreciated therefore that if the loop setting time is required to be short and the frequency steps are required to be small, these two requirements are in conflict.

One solution to this problem is however to use a reference frequency which is high enough to afford the required loop setting time constant and to interpolate between steps.

This can be done by means of a mixer connected in the loop and fed from a variable frequency source. This solution in its simplest form is however unsatisfactory since spurious signals such as intermodulation products are generated.

According to the present invention, a digital frequency synthesiser comprises a phase locked loop and a variable frequency source, the loop including mixer means arranged to receive a signal from the source for frequency interpolation purposes, wherein the mixer means is a single sideband mixer of the kind which requires phase quadrature-related input signals whereby cancellation of unwanted mixing products is facilitated.

The mixer means may comprise a pair of mixers to which signals from the source are fed in phase quadrature one to each mixer and to which signals from a voltage controlled oscillator forming a part of the loop are fed in phase quadrature.

The mixer means may comprise a phase quadrature splitter via which signals from the voltage controlled oscillator are fed to the mixers of the pair and a signal combiner arranged to be fed from the mixers and to feed a variable divider in the loop.

The loop may comprise a phase detector responsive to signals from the variable divider and to a reference frequency signal for providing in the presence of a phase difference therebetween a feedback signal which is fed back to the voltage controlled oscillator thereby to define the loop so as to change the frequency of the oscillator such that the phase difference tends to be nullified.

The source may itself comprise a further digital phase locked loop comprising a further voltage controlled oscillator, a further divider and a phase detector arranged so that the oscillator provides a source output frequency selectable in dependence upon the frequency of the further divider.

The two phase locked loops may each be arranged to include a loop filter via which a feedback signal is fed from the phase detector of the loop concerned to its associated voltage controlled oscillator.

The said further digital phase locked loop may be arranged to feed the mixers of the pair via a still further variable divider.

One embodiment of the invention will now be described by way of example only with reference to the accompanying drawing which is a block schematic diagram of a frequency synthesiser.

Referring now to the drawing, a frequency synthesiser comprises a voltage controlled oscillator 1 which on a line 2 provides an output signal FRO and which on a line 3 is arranged to feed a first variable divider 4 via a mixer arrangement shown enclosed within a broken line 5. The variable divider 4 is arranged to feed a phase detector 6 which is also fed on a line 7 with a first reference frequency FR1.

A control signal on a line 8 is fed from the phase detector 6 in the presence of a phase difference between the reference frequency FR1 on the line 7 and an output signal from the variable divider 4 on a line 9. The control signal on the line 8 is fed back to the voltage controlled oscillator 1 via a loop filter 10.

Digital phase locked loops of the kind thus far described are well known and the magnitude of the frequency steps selected by operation of the variable divider 4 is limited to multiples of the reference frequency FR1. In order to effect an interpolation operation to afford smaller frequency steps, the mixer arrangement 5 is fed from a frequency source shown within the broken line 11 via a variable divider 12. In the present example, the frequency source 11 itself comprises a phase locked loop which includes a second voltage controlled oscillator 27, a variable divider 13, a phase detector 14 and a loop filter 15 connected in the appropriate manner to define a digital phase locked loop.Ouput signals from the frequency source 11 are provided on a line 16, the signal being selectable in dependence upon the setting of the variable divider 13 determined in accordance with a second reference frequency FR2 which is applied on a line 17 to the phase detector 14.

In operation of the synthesiser just before described, an output frequency FRO on the line 2 is afforded which equals (N 1 x FR 1)+(1N2 x FR2) M where, N1 is the division ratio of the variable divider 4, M is the division ratio of the variable divider 12, and N2 is the division ratio of the variable divider 13.

In order to obviate the generation of spurious frequencies which result from the operation of the mixer arrangement 5, the mixer 5 is arranged to comprise a balanced phase quadrature fed single sideband mixer arrangement comprising a pair of mixers 18 and 19 which are fed in phase quadrature from the voltage controlled oscillator 1 via a quadrature splitter 20 and which are fed in phase quadrature from the variable divider 12 via lines 21 and 22. Output signals from the mixers 18 and 19 on lines 23 and 24 are combined in a phase comparator 25 to provide an output signal on a line 26 which is fed to the variable divider 4.

By using a single sideband mixer arrangement as just before described cancellation of in-band spurious signals is effected as will be well appreciated by those skilled in the art.

By utilising in a digital phase locked loop synthesiser system a mixer interpolation system with a single sideband mixer the provision of intermediate step interpolation is facilitated without the introduction of unwanted spurious frequencies.

Claims

1. A digital frequency synthesiser comprising a phase locked loop and a variable frequency source, the loop including mixer means arranged to receive a signal from the source for frequency interpolation purposes, wherein the mixer means is a single sideband mixer of the kind which requires phase quadrature-related input signals whereby cancellation of unwanted mixing products is facilitated.

2. A synthesiser as claimed in Claim 1, in which the mixer means comprises a pair of mixers to which signals from the source are fed in phase quadrature one to each mixer and to which signals from a voltage controlled oscillator forming a part of the loop are fed in phase quadrature.

3. A synthesiser as claimed in Claim 2, in which the mixer means comprises a phase quadrature splitter via which signals from the voltage controlled oscillator are fed to the mixers of the pair and a signal combiner arranged to be fed from the mixers and to feed a variable divider in the loop.

4. A synthesiser as claimed in any one of Claims 1 to 3, in which the loop comprises a phase detector responsive to signals from the variable divider and to a reference frequency signal for providing in the preence of a phase difference therebetween a feedback signal which is fed back to the voltage controlled oscillator thereby to define the loop so as to change the frequency of the oscillator such that the phase difference tends to be nullified.

5. A synthesiser as claimed in any one of Claims 1 to 4, in which the said source comprises a further digital phase locked loop comprising a further voltage controlled oscillator, a further divider and a phase detector arranged so that the oscillator provides a source output frequency selectable in dependence upon the frequency of the further divider.

6. A synthesiser as claimed in Claim 5, in which the said two phase locked loops each include a loop filter via which a feedback signal is fed from the phase detector of the loop concerned to its associated voltage controlled oscillator.

7. A synthesiser as claimed in Claim 5 or 6, in which the said further digital phase locked loop is arranged to feed the mixers of the pair via a still further variable divider.

8. A synthesiser substantially as hereinbefore described with reference to the accompanying drawling.