GB2180965A - Sequence controller - Google Patents

Abstract

A sequence control arrangement for the control of individual circuit units or "black boxes", e.g. in a production control system, or multi-processor or -memory system, sets up one step in a sequence of operations while a preceding sequence is in progress. The arrangement receives (10) signals which indicate when an operation step is completed, and signals (9) which indicate the results of such steps. If the result is as predicted, then the sequence continues, but if it differs then gates (7,14) ensure that the current sequence is stopped and a new sequence initiated. <IMAGE>

Description

SPECIFICATION Sequence controller The present invention relates to a sequence con troller, which controlsthe operations of a number of individual devices, and especially to an arrangement which acts as an interface between the controller proper and those individual devices.

Such a sequence controller has outputs to the controlled devices, inputs from those devices via which the operations in progress thereat are monitored, and furtherinputsfrom thesedevicesvia which the controller is notified when operations have been completed and possibly also the results of those operations. It will be appreciated that the functions of the two sets of inputs just referred to may in fact be performed by the same set of inputs.

An object ofthe invention is to provide such a sequence controlling interface which enables the system controllerto perform the operational sequences using minimal control time.

According to the invention, there is provided a sequence control arrangement, for controlling sequential operations by individual circuit units, which includes a controller, an output selectorvia which the circuit unit or units to be operated are selected, further output means via which data needed by one or more of said circuit units may be trans mitted thereto, and input means via which signals indicative ofthe completion of and the results ofthe operations by the circuit unit or units are received by the arrangement, which signals may influence subsequent operations ofthe circuit units, wherein each step in an operation sequence is set up underthe control ofthe controller while the operations of a pre vious step are in progress, wherein if the signals from the circuit units indicate that the results ofthe controlled operations are so predicted by the con trollerthe current sequence continues, and wherein if the signalsfrom the circuit units indicatethatthe results of the operations are not as predicted the cur- rentsequence is halted to enablea newsequenceto be initiated by the controller.

An embodiment of the invention will now be described with reference to the accompanying highly schematic block diagram.

The purpose ofthe arrangement shown is to enable a system controllerto perform operational sequences, for instance in an automated production control system, using minimal control time. This is done by predicting the probable sequence required, and performing each control needed one step ahead ofthe operation forwhich it is needed, in parallel with the operation then in progress. The time needed is also reduced by allowing parallel operation of some individual circuit functions.

The present arrangement, see the drawing, acts as an interface between the system controller 1, and a numberofcircuit units or "black boxes" (notshown).

The interface to each such circuit unit includes a Start Operation output, which is an input as "seen" atthe circuit unit, an "operation complete" inputtothecir- cuit shown and one or more "operation result" inputs. These inputs are, of course, outputs as seen by the circuit units. The start operation outputs are shown at 2, the operation complete inputs at 3, and the operation result inputs at 4. Further operation parameters may also be latched in as required, as will be seen later.

An operational sequence is started by the controller 1, which sets up all the operational parameters, by causing the appropriate signals to be sent tothe circuit units. This is done via an OR gate 5, a pulse shaper 6 (if required), and AND gate 7 andthe start operation output select block 8. In some cases the operations to be effected may be affected by the results of previous operations. If this is so, it is done via the inputs 4, a results input select block9 and the AND gate 7. Where the completion of a previous operation has to be taken into account, this occurs via the inputs 3, and operation complete input select block 10 to the gate 5.

When the parameters are set up, the controller 1 triggers the selected circuits via the block 8, which in one implementation is a multi-latch circuit. However, it could contain only an operational latch. While an operation is in progress, the controller sets up the input and output selectors, 8,9, 10, in accordance with the operations parameters for the next operation in the sequence. After setting up has been completed, the controller waits forthe selected operation complete input, one of 3,to be received. This output is thus activated via blocks 10, 5, 6, 7, 8. When the selected operation complete signal is received, if the selected operation result is as predicted by the controller, it is regarded as inactive.In such case, via the CONTINUE line and the gate 7, the operation complete signal is retimed through the start operation selector 8to activate the next step in the sequence.

Data from the controller set up in the pre-emptive latch 11 is passed to the operation latch 12, at this, or indeed at any stage in the sequence. From there it is passed to the controlled circuit units. This data, may come from the controller 1 or from previous operations, so that its application to one or more ofthe circuit units referred to above, occurs as called for by the current operational sequence. The controller 1 is now activated via the AND gate 7, and this sets up the parameters for the next step ofthe sequence. This introduces only one clock cycle of delay from one operation being completed to the start of the next operation.

If the selected operational result is active, it is assumed that the result was not as predicted bythe controller, and a new sequence is needed. In such case the sequence in progress is halted by closure of the AND gate 7, plus a suitable indication to the con troller,via BRANCH and gate 14. As a result a new sequence is started by the controller.

Dependent on the nature of the controlled circuit units and the operation sequences to be performed therebymm the blocks 8,9, 10, 12may vary in com- plexityfrom simple latched "one of N" selectors, allowing simple sequencing with only two possible results of any sequence and serial operation of all circuit units, to programmable AND-OR selectors, allowing a number of results foreach operation and a number of operations to be triggered atthesame time.

The results and completion signals on reception are taken into account by the controllervia the con- nections shown. Thusthe signals from blocks 9 and 10 reach the controller, ultimatelyvia gates 7 and 14.

In addition, signals arriving via the block 9 can influencethe block 8 via gate 7. This is the gate whereby an inactive result allows the current sequence to continue, while an active result causes the transfer to a new sequence mentioned above.

From the drawing itwill be seen that a fairly large number of interconnections are required between the controller and the various circuit blocks, especially as some ofthem are multi-wire connections.

Where it is required that these blocks and the controller be implemented in LSI form this is inconvenient. It can be overcome by devolving the selectors throughoutthe individual blocks by moving the AND part of each selector into the relevant block, and using wire-OR inter-connections between circuit blocks. Thus only three wires plus the controller bus would be needed to perform the controls needed.

It will be appreciated that a sequence controller such as described above has many applications.

Thus it can be used in an industrial process control system, where each of the outputs causes apart- icular process function orfunctions, the inputs then being indicative of the results of such functions. An- other importantfield of application is in data handling systems, such as in a multi-processor system or a system with a numberof memory arrangements.

Claims (6)

1. A sequence'control arrangement, for con- trolling sequential operations by individual circuit units, which includes a controller, an output selector via which the circuit unit or units to be operated are selected,furtheroutput means via which data needed by one or more of said circuit units may betransmitted thereto, and input means via which signals indicative of the completion of and the results ofthe operations by the circuit unit or units are received by the arrangement, which signals may influence subsequent operations ofthe circuit units, wherein each step in an operation sequence is set up underthe control of the controller while the operations of a pre vious step are in progress, wherein ifthe signals from the circuit units indicate that the results ofthe controlled operations are so predicted by the controllerthe current sequence continues, and wherein if thesignaisfromthecircuitunitsindicatethatthe results of the operations are not as predicted the current sequence is halted to enable a new sequence to be initiated by the controller.

2. An arrangement as claimed in claim 1, and wherein the output selector, the further output meansandtheinputmeansformed by multiple latch circuits.

3. An arrangement as claimed in claim 2, and wherein separate latched circuits are used forthe signals indicative of the completion of the steps in a sequence and for the signals indicative ofthe results of said steps.

4. An arrangement as claimed in claim 1,2 or3, and wherein two or more controlled operations at different ones of the circuit units can be in progress at once.

5. Asequencecontrol arrangement,forcontrolling sequential operations by individual circuit units, substantially as described with reference to the accompanying drawing.

Amendments to the claims have been filed, and have the following effect: *(b) New ortextually amended claims have been filed asfollows:

6. A sequence control arrangement,forcontrolling sequential operations by individual circuit units, which arrangement includes a controller, an output selector via which circuit unit or units to be operated are selected, further output means via which data needed by one or more of said circuit units may be transmitted thereto, and input means via which signals indicative of the completion of and the results of the operations by the circuit unit or units are received by the arrangement, which signals influence the subsequent operations of the circuit units, wherein each step in an operation sequence is set up underthe control of the controllerwhile the operations of a previous step are still in progress, wherein if the signals from the circuit unit or units being controlled as received by said input means in dicate that the results of said controller operations are as predicted by the controllerthe current operation sequence continues, wherein there is only one clock cycle of the arrangement between the end of one operation and the commencement of the next, and wherein if the signals from the circuit units indi cate that the results of the operations are not as predicted by the controller the current sequence is halted so that a new sequence of the said circuit unit or units can be initiated by the controller.