GB2179791A - Hybrid circuit packages - Google Patents

Hybrid circuit packages Download PDF

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Publication number
GB2179791A
GB2179791A GB8620275A GB8620275A GB2179791A GB 2179791 A GB2179791 A GB 2179791A GB 8620275 A GB8620275 A GB 8620275A GB 8620275 A GB8620275 A GB 8620275A GB 2179791 A GB2179791 A GB 2179791A
Authority
GB
United Kingdom
Prior art keywords
semi
layer
conductor
base element
conductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB8620275A
Other versions
GB8620275D0 (en
GB2179791B (en
Inventor
Gerald Herbert Swallow
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
MO Valve Co Ltd
Original Assignee
MO Valve Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by MO Valve Co Ltd filed Critical MO Valve Co Ltd
Publication of GB8620275D0 publication Critical patent/GB8620275D0/en
Publication of GB2179791A publication Critical patent/GB2179791A/en
Application granted granted Critical
Publication of GB2179791B publication Critical patent/GB2179791B/en
Expired legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
    • H01L23/647Resistive arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Cookers (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Thermistors And Varistors (AREA)

Abstract

A semi-conductor device comprises at least one semi-conductor chip (3) in a sealed housing (1, 4, 5). The housing contains a layer (6) of resistive material located adjacent the chip, the layer having a permittivity similar to that of free space so as to absorb microwave energy and to enable the device to be used in a microwave environment.

Description

SPECIFICATION Hybrid circuit packages The present invention concerns semi-conduc tor devices, and particularly, though not exclu sively, to semi-conductor devices of the type known as hybrid circuit packages. Typically a hybrid circuit package consists of a rectangu lar base element made from a suitable metal or ceramics material having a raised rim. A semi-conductor chip is mounted on a central portion within the base element and bonded to conductive metal tracks deposited around the central portion, the tracks being available for subsequent connection to other circuit ele ments. Frequently the semi-conductor chip so housed is covered by a lid bonded to the rim of the base element to provide a hermetically sealed package.
Devices of this kind can be used in mi crowave applications and it has been dis covered that energy reflected from the lid can have a deleterious effect on the performance of the semi-conductor device. Microwaves typically have a frequency between 1-100 gi gahertz.
The present invention has for one object to provide hybrid circuit packages which are suit able for use in a microwave environment.
Accordingly, from one aspect, the present invention consists in a semi-conductor device having at least one chip, and a layer of resis tive material mounted adjacent the chips which layer has a permittivity selected to be similar to that of free space so as to absorb microwave energy rather than to reflect it.
Preferably the layer is made from a thick film resistive material. The resistive material may be Ruthenium Oxide. A suitable thickness for the layer is between 5 and 15 microns.
In order that the present invention may be more readily understood an embodiment thereof will now be described by way of example and with reference to the accom panying drawing, which is a section through a hybrid circuit package which incorporates the present invention.
Referring now to the drawing, the basic components of the hybrid circuit package comprise a base element 1 which is rectangu lar in plan and which has a peripheral rim 2 which is stepped in cross-section and which carries an array of deposited conductive ele ments for connecting external circuit elements to a semi-conductor chip 3 mounted within the base element 1. The edge connectors of the chip 3 are bonded in known manner at 8 to the conductive elements on the base ele ment 1. The base element 1 can be made from a number of suitable materials of which the most commonly used is a ceramic.
The package is completed by a lid 4 nor mally made from the same material as the base element 1, that is it will in usual practise be either ceramic or metal. The lid 4 has a downwardly extending rim 5 which when the package is complete is sealed to the rim 2 of the base element.
The interior of the lid 4 is coated with a layer 6 of resistive material. This layer 6 is arranged to have the same permittivity as that of free space. The result of this is that when the lid is in place and the package is in operation in a microwave environment and microwave energy incident on the lid will be absorbed rather than reflected. The nature and composition of the layer 6 are thus defined by its purpose and there are a number of suitable "lossy" materials which can be used to give the desired absorbtion characteristic. One such composition could be a thermoplastic potting material interspersed with iron filings. However the most appropriate material is a layer of a thick film resistive material, Ruthenium Oxide.
This is printed and co-fired onto the lid during lid assembly. A suitable range for the thickness of the layer 6 is between 10-15 microns. If the thickness is less then there may not be total absorbtion of the microwave energy, whilst once total absorbtion has been achieved there is no point in increasing the layer thickness.
The package is completed by bonding the rim 5 of the lid 4 to the rim 2 of the base element 1. The two rims can be welded, soldered or glued together to make a hermetically sealed package.

Claims (7)

1. A semi-conductor device comprising at least one semi-conductor chip, and a layer of resistive material mounted adjacent the chips, which layer has a permittivity selected to be similar to that of free space so as to absorb microwave energy rather than to reflect it.
2. A semi-conductor device as claimed in Claim 1 wherein the layer is made from a thick film resistive material.
3. A semi-conductor device as claimed in Claim 2, wherein the layer is between 5 and 15 microns thick.
4. A semi-conductor device as claimed in either of Claims 2 or 3, wherein the material of the layer is Ruthenium Oxide.
5. A semi-conductor device as claimed in any one of the preceding claims wherein the device comprises a base element having a peripheral rim which is stepped in cross-section and carries an array of deposited conductive elements for connecting external circuit elements to said semi-conductor chip, and a lid sealed to the rim of the base element.
6. A device as claimed in Claim 5 wherein the base element and the lid are both of a ceramic material.
7. A semi-conductor device substantially as hereinbefore described with reference to and as shown in the accompanying drawing.
GB8620275A 1985-08-21 1986-08-20 Semi-conductor packages Expired GB2179791B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB8520907A GB8520907D0 (en) 1985-08-21 1985-08-21 Hybrid circuit packages

Publications (3)

Publication Number Publication Date
GB8620275D0 GB8620275D0 (en) 1986-10-01
GB2179791A true GB2179791A (en) 1987-03-11
GB2179791B GB2179791B (en) 1988-11-09

Family

ID=10584091

Family Applications (2)

Application Number Title Priority Date Filing Date
GB8520907A Pending GB8520907D0 (en) 1985-08-21 1985-08-21 Hybrid circuit packages
GB8620275A Expired GB2179791B (en) 1985-08-21 1986-08-20 Semi-conductor packages

Family Applications Before (1)

Application Number Title Priority Date Filing Date
GB8520907A Pending GB8520907D0 (en) 1985-08-21 1985-08-21 Hybrid circuit packages

Country Status (4)

Country Link
EP (1) EP0232401A1 (en)
JP (1) JPS63500628A (en)
GB (2) GB8520907D0 (en)
WO (1) WO1987001240A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4038168C2 (en) * 1990-11-30 1998-09-24 Daimler Benz Ag Method of manufacturing a multichip module

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4259684A (en) * 1978-10-13 1981-03-31 The Secretary Of State For Defence In Her Britannic Majesty's Government Of The United Kingdom Of Great Britain And Northern Ireland Packages for microwave integrated circuits

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2506520A1 (en) * 1981-05-19 1982-11-26 Thomson Csf ENCAPSULATION BOX FOR POWER SEMICONDUCTOR OPERATING IN A FREQUENCY RANGE OF 2 TO 20 GHZ
JPS58446U (en) * 1981-06-25 1983-01-05 富士通株式会社 Hybrid integrated circuit device
FR2538617B1 (en) * 1982-12-28 1986-02-28 Thomson Csf ENCAPSULATION BOX FOR POWER SEMICONDUCTOR WITH IMPROVED INPUT-OUTPUT ISOLATION
JPS59126665A (en) * 1983-01-10 1984-07-21 Hitachi Ltd Thick film hybrid integrated circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4259684A (en) * 1978-10-13 1981-03-31 The Secretary Of State For Defence In Her Britannic Majesty's Government Of The United Kingdom Of Great Britain And Northern Ireland Packages for microwave integrated circuits

Also Published As

Publication number Publication date
GB8620275D0 (en) 1986-10-01
EP0232401A1 (en) 1987-08-19
GB8520907D0 (en) 1985-09-25
GB2179791B (en) 1988-11-09
WO1987001240A1 (en) 1987-02-26
JPS63500628A (en) 1988-03-03

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PCNP Patent ceased through non-payment of renewal fee