GB2162666A

GB2162666A - Computers peripherals scheduler

Info

Publication number: GB2162666A
Application number: GB08519044A
Authority: GB
Inventors: Andrew John Bell
Original assignee: FIRSTQUAD Ltd
Current assignee: FIRSTQUAD Ltd
Priority date: 1984-08-01
Filing date: 1985-07-29
Publication date: 1986-02-05
Also published as: GB2162666B; GB8419641D0; GB8519044D0

Abstract

A scheduler for controlling the use of e.g. a printer shared by a number of user's computers serves to poll the user's computers in turn and allocate the printer if the polled computer wishes to use it. A CPU of the scheduler increments a register REG (one for each printer 12, 14, 16) to determine which channel of a multi-channel input 10 (connected to the respective computers) will be passed by a data selector integrated circuit SELECT. A parallel interface PAR is correspondingly set to enable the polled computer to send its data. If this computer discontinues its data transmission for a predetermined period, the scheduler resumes polling the other computers. <IMAGE>

Description

SPECIFICATION Computer peripherals scheduler This invention relates to a system for controlling the use of computer peripherals which are shared by a number of user's computers.

The usual configuration hitherto has consisted of a microcomputer connected to a peripheral device, such as a printer, via a multicore cable. If a single printer is to be shared between several computers, the cables must be unplugged and re-connected each time a different computer is to use the printer. An alternative is to use a number of multiway, multipole switches but this requires careful manual operation.

In accordance with this present invention, there is provided a computer peripherals controlled system comprising a scheduler connected or connectable to a plurality of user's computers on the one hand and connected or connectable to one or more peripherals on the other hand, the scheduler being arranged to pole the user's computers in turn and allocate the or a peripheral if the poled computer wishes to use it.

In a preferred embodiment to be described herein, the system determines if a user's computer discontinues sending data for a predetermined time period, then to inhibit that computer from sending further data and to resume polling the other computers. The system serves to switch the peripheral(s) automatically and rapidly to any one of the inputs, without the need for manual intervention. In the preferred embodiment, a serial output to e.g. a printer is switched to any of a plurality of inputs using a data selector integrated circuit controlled by a microcomputer of the scheduler system.

This embodiment of the present invention will now be described by way of example only and with reference to the accompanying drawing, the single figure of which is a schematic block diagram of a computer peripherals controller system in accordance with the invention.

In the example shown, any one of the 16 channels of input 10 (from respective user's computers) are to be switched to any one of three outputs 12,14,16 which respective printers and plotters are connected. The scheduler includes a central processing unit CPU shown with its RAM and ROM memories on a common data bus 18 with the outputs. For each output, there is provided a line select register REG together with a data selector integrated circuit SELECT (such as an SN74150 in integrated circuit) to which the 16-channel input 10 is connected. A serial interface SER connects the data output of each data selector circuit to the common data bus. A parallel interface PAR has its input connected to the common data bus and its respective output lines connected to the user's computer as slow control lines, one for each computer.

In use, the central processing unit CPU of the scheduler continually cycles, placing the numbers 0-15 into the line select registers REG, thus defining which of the 16 inputs to the data selector circuits will be passed. The parallel interface is correspondingly set to enable the "clear to send" of the serial interface of the computer connected to that input. If data is then received from that computer, it is passed by the relevant data selector circuit and transmitted to one of the printers. If no characters are received in a predetermined time period, the "clear to send" line is lowered to inhibit the serial interface of the computer in question from sending further data. After a short delay the next of the 16 inputs is offered the user of a printer, in the same way as just described.

The example shown copes with three output devices, and three of the 16 input channels may be chosen at any one time and directed to the respective output devices. However in general the system may be arranged to cope with any number of input channels and any number of output devices, or with only a single output device.

The system which has been described serves to switch the output device or devices automatically to any one of the inputs. The polling technique determines if any input wishes to use an output device: once connected, the output device will only become freed after a period of inactivity, whereupon the scheduler proceeds to poll the other inputs on behalf of the free output device(s). It will be appreciated that no mannual intervention is needed to allocate and free an output device and the switching is rapid.

The system may be embodied as a "stand alone" apparatus, placed between the user's computers on the one hand and the printers or plotters on the other hand. Alternatively, the system could be built into a printer or plotter, this peripheral having the multi-channel input.

Claims

1. A computer peripherals controlled system comprising a scheduler connected or connectable to a plurality of user's computers on the one hand and connected or connectable to one or more peripherals on the other hand, the scheduler being arranged to pole the user's computers in turn and allocate the or at peripheral if the poled computer wishes to use it.

2. A system as claimed in claim 1, arranged to determine if a computer discontinues sending data to its allocated peripheral for a predetermined time period, then to inhibit that computer from sending further data and to resume polling the other computers.

3. A system as claimed in claim 1 or 2, having an output for the or each connected or connectable peripheral and having, for each output, a line select register and a data selector circuit, the system further comprising a central processing unit which serves to increment the line select register to determine which channel (of a multi-channel input connected or connectable to the user's computers) the data selector circuit will pass.

4. A system as claimed in claim 3, further comprising a parallel interface with its output lines connected or connectable to the respective user's computers, the central processing unit serving to set the parallel interface to provide a "clear to send~ enabling signal to the user's computer defined by the content of the line select register.

5. A computer peripherals controller system substantially as herein described with reference to the accompanying drawing.