GB2132045A - Circuit arrangement for the conversion of bipolar analogue signals into digital signals - Google Patents

Circuit arrangement for the conversion of bipolar analogue signals into digital signals Download PDF

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Publication number
GB2132045A
GB2132045A GB08333189A GB8333189A GB2132045A GB 2132045 A GB2132045 A GB 2132045A GB 08333189 A GB08333189 A GB 08333189A GB 8333189 A GB8333189 A GB 8333189A GB 2132045 A GB2132045 A GB 2132045A
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United Kingdom
Prior art keywords
input
output
converter
signals
analogue
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Granted
Application number
GB08333189A
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GB2132045B (en
GB8333189D0 (en
Inventor
Peter Lehmann
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Medizin und Labortechnik Leipzig VEB
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Medizin und Labortechnik Leipzig VEB
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Publication of GB8333189D0 publication Critical patent/GB8333189D0/en
Publication of GB2132045A publication Critical patent/GB2132045A/en
Application granted granted Critical
Publication of GB2132045B publication Critical patent/GB2132045B/en
Expired legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters

Abstract

A circuit arrangement for the conversion of bipolar analogue signals into digital signals comprises a controlled rectifier (3) and a unipolar analogue- digital (A/D) converter (1), in which each data output (7-16) of the A/D converter (1) feeds a decoder (4) feeding the measured value validity input (21) of a measured value processing unit (2) and an AND-element (5). The AND-element (5) is also fed from the data validity output (17) of the A/D converter (1), and feeds the clock pulse input (22) of a bistable trigger stage (6), the negated output (24) of which feeds its data input (25). The non-negated output of the trigger stage (6) feeds a polarity input (26) of the measured value processing unit (2) and a switching transistor (28) for controlling the rectifier (31). Thus the rectifier (31) is changed from non- inverting to inverting operation or vice versa, after each change of polarity of the analogue input, as detected from the output of the A/D converter (1). <IMAGE>

Description

SPECIFICATION Circuit arrangement for the conversion of bipolar analogue signals into digital signals The invention relates to a circuit arrangement for converting bipolar analogue signals into digital signals. Such circuit arrangements represent an elementary prerequisite for the digital measuring art.
In the measuring art, it is often necessary to convert positive and negative analogue signals into digital signals. Many analogue-digital converters (AID converters), however can only convert analogue signals of one polarity. If a signal of the wrong polarity is applied to such an A/D converter1 then it gives out a carry or a zero. AID converters for bipolar signals have been developed (for example C 520, Halbleiterwerk Frankfurt/Oder), wherein the conversion range for negative signals (up to - 99mV) is smaller by an order of magnitude than the conversion range for positive signals (up to 999mV).
If larger negative signals are also to be converted, it is necessary for them to be transformed. As a result of the transformation, the resolution drops in relation to the original amplitude.
A/D converters are also known (for example Type C 571, Halbleiterwerk Frankfurt/Oder),which, in one method of operation, convert positive signals and, in the other, bipolar signals of small amplitude. The second method of operation requires one bit to represent sign information for the following measured-value processing unit. This bit lacks the actual conversion as a result of which the resolution of the bipolar method of operation is lower than that of the unipolar method of operation. In the case of a transformation to the convertible input amplitude, there is also a further reduction in the resolution.
If a rectifier is connected in series with a unipolar AID converter, then bipolar analogue signals can also be converted into digital signals without inroads into resolution. The necessary polarity bit (sign information) is produced separately in a zero comparator. Such a circuitforthe reversal of polarity is described, for example, in "Seifart: Analogue Schaltungen und Schaltkreise, Berlin 1980, Verlag der Technik, page 339". An operational amplifier wired with precision resistors serves as a rectifier and an operational amplifier likewise serves as a zero comparator. Precision rectifiers with two operational amplifiers are also usual as rectifiers, as in the above literature source, page 337. Together with the zero comparator, such a circuit for the reversal of polarity also contains three operational amplifiers.The preci sion rectifier contains an even more extensive circuitry of precision resistors than the first mentioned controlled operational ampi ifier.Com- mon to both forms of reversal of polarity is a drift of the parameters of the operational amplifiers and of the other components. This can only partially be countered by the use of precision resistors. The temperature drift, in particular, requires expenditure on circuitry for its compensation. The expenditure for the balancing of the operational amplifiers used as rectifiers is considerable.
Only a little lower in expenditure and somewhat less complicated in balancing is a "Device for voltage measurement with the correct sign" according to DE-OS 2 236 150 (G 01 r - 19/00). For the purpose of AID conversion, it would have to be supplemented by a decoupling stage connected to the zero comparator.
The invention seeks to reduce the expenditure on components for rectification and recognition of polarity, to simplify the balancing, to reduce the influence of the temperature drift on the measuring accuracy and to improve the long-term constancy of the A/D conversion.
According to the invention, there is provided a circuit arrangement for converting bipolar analogue signals into digital signals with a controlled rectifier and a unipolar analogue-digital (A/D)converter, wherein each data output of the A/D converter is connected to one input of a decoder, the output of the decoder is connected to the measured-value validity input of a measured-value processing unit and to the first input of an AND-element, the second input of which AND-element is connected to the data validity output of the AID converter, the output of the AND-element is connected to the clock-pulse input of a bistable trigger stage, the negated output of which trigger stage is coupled to its data input and the non-negated output of the trigger stage is connected to a polarity input of the measured-value processing unit and to the input of a switching transistor for controlling the rectifier.
The invention will now be described in greater detail, by way of example, with reference to the drawing, the single Figure of which shows a circuit diagram of a circuit according to the invention.
As an input stage, a polarity reversing stage 3 is connected in series with the unipolar analoguedigital converter 1. The data outputs 7 - 16 of the AID converter 1 are connected to the measured-value processing unit 2 and to the inputs of a decoder 4.
The polarity reversing stage 3 consists of a wired operational amplifier 31, the output 32 of which is coupled to the input 33 of the A/D converter 1 and to a switching transistor 28. The output 29 of the switching transistor 28 is connected to the control input 30 of the operational amplifier 31. The signal input 34 of the operational amplifier 31 is formed by an intersection of a Wheatstone bridge selected as circuitry. The signal voltage U is applied between it and earth. The operating voltages ± Us are applied to the two supply lines of the operational amplifier 31.
The output 18 of the decoder 4 is taken to the measured-value validity input 21 of the measuredvalue processing unit 2 and to the first input 19 of an AND-element 5. The second input 20 in connected to the data validity output 17 of the A/D converter 1.
The output of the AND-element 5 is in communication with the clock-pulse input 22 of a bistable trigger stage 6. The negated output 24 of the trigger stage 6 is coupled to its data input 25. The non-negated output 23 is connected to the polarity input 26 of the measured-value processing unit 2 and the input 27 of the switching transistor 28.
The principle of operation of the circuit arrange ment described consists in changing over the operational amplifier 31 from the non-inverting to the inverting operation and vice versa after a change of polarity has been effected and in recognizing the change in polarity by the nature of the output signal of the A/D converter 1.
On the application of a negative voltage, the A/D converter 1 gives out, at its outputs 7 to 16, a zero or a special carry signal (according to the A/D converter), on the appearance of which, the decoder 4 delivers a logical One at its output 18. At the same time the AID converter 1, working according to an internal timing, gives out a logical One at its output 17. This occurs after every measuring cycle, after every clock pulse, even if a positive voltage is applied to the input 33. The AND-element 5 produces an output signal which correspondstothe logical One and which changes over the trigger stage 6 into the other stable state. The signal resulting in this case at the non-negated output 23 switches the operational amplifier 31 into inverting operation via the switching transistor 28.As a result of this, a positive voltage is applied to the input 33 of the A/D converter 1. The voltage value is converted into a digital value, the binary places of which appear at the outputs 7 to 16. As a result of the altered structure of its input signal, the decoder 4 recognizes the application of a voltage which is now positive at the input 33 of the AID converter 1 and produces a logical Zero at its output. As a result, a logical Zero results at the output of the AND-element 5. This does not cause any alteration of the trigger stage 6.
Without a change in polarity, the circuit arrangement works in this operational state, the operational amplifier 31 being particularly in inverting operation.
If a positive voltage Us is suddenly again applied to the signal input 34, then it is inverted and it appears as a negative voltage at the input 33 of the AID converter 1. The switching-over process explained is now repeated as a result of which the circuit arrangement is transferred into the other operating state with non-inverting operation of the operational amplifier 31.

Claims (2)

1. A circuit arrangement for converting bipolar analogue signals into digital signals with a controlled rectifier and a unipolar analogue-digital (AID) converter, wherein each data output of the AID converter is connected to one input of a decoder, the output of the decoder is connected to the measuredvalue validity input of a measured-value processing unit and to the first input of an AND-element, the second input of which AND-element is connected to the data validity output of the A/D converter, the output of the AND-element is connected to the clock-pulse input of a bistable trigger stage, the negated output of which trigger stage is coupled to its data input and the non-negated output of the trigger stage is connected to a polarity input of the measured-value processing unit and to the input of a switching transistorfor controlling the rectifier.
2. A circuit arrangement for converting bipolar analogue signals into digital signals substantially as described herein with reference to the drawing.
GB08333189A 1982-12-22 1983-12-13 Circuit arrangement for the conversion of bipolar analogue signals into digital signals Expired GB2132045B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DD24641182 1982-12-22

Publications (3)

Publication Number Publication Date
GB8333189D0 GB8333189D0 (en) 1984-01-18
GB2132045A true GB2132045A (en) 1984-06-27
GB2132045B GB2132045B (en) 1986-06-25

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GB08333189A Expired GB2132045B (en) 1982-12-22 1983-12-13 Circuit arrangement for the conversion of bipolar analogue signals into digital signals

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DE (1) DE3334998A1 (en)
FR (1) FR2538639A1 (en)
GB (1) GB2132045B (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1162373A (en) * 1966-06-02 1969-08-27 Ass Elect Ind Improvements relating to arrangements for the transmission of communication signals by pulse code modulation transmission

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2009953C3 (en) * 1970-03-03 1981-11-19 TE KA DE Felten & Guilleaume Fernmeldeanlagen GmbH, 8500 Nürnberg Pulse code modulator with buckling curve amplitude converter

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1162373A (en) * 1966-06-02 1969-08-27 Ass Elect Ind Improvements relating to arrangements for the transmission of communication signals by pulse code modulation transmission

Also Published As

Publication number Publication date
DE3334998A1 (en) 1984-06-28
GB2132045B (en) 1986-06-25
GB8333189D0 (en) 1984-01-18
FR2538639A1 (en) 1984-06-29

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