GB2130793A - Forming a doped region in a semiconductor body - Google Patents

Forming a doped region in a semiconductor body Download PDF

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Publication number
GB2130793A
GB2130793A GB08330342A GB8330342A GB2130793A GB 2130793 A GB2130793 A GB 2130793A GB 08330342 A GB08330342 A GB 08330342A GB 8330342 A GB8330342 A GB 8330342A GB 2130793 A GB2130793 A GB 2130793A
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United Kingdom
Prior art keywords
alloy
doped region
layer
amorphous
metal
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Granted
Application number
GB08330342A
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GB8330342D0 (en
GB2130793B (en
Inventor
Michael Joseph Kelly
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General Electric Co PLC
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General Electric Co PLC
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Priority to GB08330342A priority Critical patent/GB2130793B/en
Publication of GB8330342D0 publication Critical patent/GB8330342D0/en
Publication of GB2130793A publication Critical patent/GB2130793A/en
Application granted granted Critical
Publication of GB2130793B publication Critical patent/GB2130793B/en
Expired legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251Diffusion into or out of group IV semiconductors
    • H01L21/2254Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • H01L21/2257Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer being silicon or silicide or SIPOS, e.g. polysilicon, porous silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251Diffusion into or out of group IV semiconductors
    • H01L21/2254Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45Ohmic electrodes

Abstract

A doped region (9, 19) in a body (1, 15) of semiconductor material is formed by depositing on a surface of the semiconductor body (1, 15) a layer of an amorphous metallic alloy (7, 17) containing a quantity of a material, e.g. boron or arsenic, capable of acting as a dopant in the semiconductor material, and heating the layer (7, 17) to cause diffusion of the dopant material into the region (9, 19) of the semiconductor body (1, 15). The amorphous alloy may serve as an electrical contact (7) and may act as a barrier (17) to prevent diffusion of lead material (21) into the semiconductor body (1, 15). The amorphous alloy suitably comprises a metal-metal alloy such as nickel- niobium alloy, or a metal-metalloid glassy alloy such as silicide glass of a refractory metal. <IMAGE>

Description

SPECIFICATION Semiconductor devices This invention relates to semiconductor devices.
In the manufacture of semiconductor devices it is frequently required to form in a body of semiconductor material a region extending into the body from a surface thereof and containing a dopant material which serves to confer on the doped region electrical properties different from those of the surrounding material. A typical application of such a process is for the formation of source and drain regions in field effect transistors.
Many processes have been devised for forming such regions, but in general such processes essentially comprise covering the surface of the body with a masking layer, forming a window in the masking layer and causing dopant material to enter the body via the window, typically either by diffusion from an atmosphere above the surface or by ion implantation of dopant material into the part of the surface of the body exposed through the window and subsequent annealing to drive the dopant material further into the semiconductor body.
Having formed such a region it is normally required to provide an electrical contact thereto.
Conventionally, such contacts are in the form of metallised layers on the surface of the body which contact the doped region via a window in a layer of insulating material which carries the metallised layer and serves to insulate it from other parts of the semiconductor body.
For a variety of reasons it is frequently found to be quite difficult to obtain a satisfactory electrical connection between such a contact and the associated doped region. Thus such contacts may be subject to mechanical weakness, thermal instability, or to the effect of electro migration of material of the contact into the doped region.
It is an object of the present invention to provide a method of forming a doped region in a semi-conductor body whereby the above difficulties may be alleviated.
According to the present invention a method of forming a doped region in a body of semiconductor material comprises: depositing on a surface of the semiconductor body a layer of an amorphous metallic alloy containing a quantity of a material capable as acting as a dopant in the semiconductor material; and heating the layer to cause diffusion of the dopant material from said amorphous alloy into the semiconductor body.
The amorphous alloy suitably comprises a metal-metal alloy or a metal-metalloid glassy alloy.
In one particular embodiment of the invention the material of the amorphous alloy is chosen so that the alloy serves as an electric contact to the doped region.
Alternatively the method further includes the step of subsequently providing an electric contact to the doped region in the form of a metal layer which contacts the doped region via the amorphous layer, the material of the amorphous layer being chosen so as to serve as a barrier layer between the doped region and the metal layer to inhibit diffusion of material into the doped region from the metal layer.
In a method according to the invention the region into which dopant material is diffused may already contain dopant material, the diffused dopant material serving to improve the ohmic contact between the alloy layer and the already doped region.
Various methods in accordance with the invention will now be described, by way of example, with reference to the accompanying drawings in which:~ Figure 1 is a diagram illustrating a first method; Figure 2 is a graph illustrating a doping profile obtained with the first method; and Figure 3 is a diagram illustrating a second method.
Referring to Figure 1, in the first method, the starting material is an n-type silicon substrate 1.
On a main face of the substrate there is formed, in conventional manner, a layer of silicon oxide 3 provided with a window 5 in register with a portion of the substrate where it is desired to form a doped region extending into the substrate from its surface.
A layer 7 of an amorphous nickel-niobium alloy containing a few percent by weight of boron is then deposited on the exposed surface of the oxide layer and the substrate, the layer filling the window 5 and extending therefrom in a pattern corresponding to a required connection to the doped region to be formed.
The structure is then heated to cause outdiffusion of boron from the layer 7, thus forming a shallow region 9 of p-type doped material in the region of the substrate defined by the window 5.
Typically the heat treatment is at a temperature of 900cm for 30 minutes, as is typically used for driving in ion-implanted dopants into a silicon substrate. It will be understood that the heat treatment may therefore conveniently be arranged also to effect drive in of material ion-implanted into other regions of the substrate to form other doped regions in conventional manner.
The relative diffusion of boron in nickel-niobium is six orders of magnitude greater than in silicon at the temperatures involved. Consequently, after the heat treatment the boron has a half Gaussian distribution in the substrate, as illustrated in Figure 2, with a peak value determined by the original boron concentration in the nickel-niobium alloy and a half width a determined by the diffusion constant of boron in silicon which, with a typical annealing schedule, will give a value for a of 0.05 #m.
Referring now to Figure 3, in the second method to be described, an oxide layer 11 provided with a window 13 is formed on a main face of an n-type silicon substrate 1 5, as in the first described method.
A layer 17 of nickel-niobium alloy containing boron is then formed in the region of the window 13 only, the layer being thin compared with the oxide layer 11.
After heat treatment, as in the first described method, to form a p-type region 19 in the substrate by out-diffusion of boron from the layer 17, an aluminium layer is deposited onto the surface of the structure and selectively etched to provide a lead 21 on the surface of the oxide layer which contacts the region 19 through the window 13 via the layer 17.
In addition to providing a source of dopant material for formation of the region 1 9, the layer 17 also acts as a barrier to prevent diffusion of aluminium from the lead 21 into the silicon.
Such a method may be used to enable the use of a metal for a contact to a doped region which would otherwise be unacceptable because of electro-migration problems.
In other methods in accordance with the invention the region into which dopant material is diffused from the amorphous metallic alloy layer may already contain dopant material, for example, by virtue of an earlier implantation process. Such a method may be used to improve the ohmic contact to a pre-existing doped region, the outdiffusion from the amorphous metallic alloy layer creating in the adjacent part of the pre-existing doped region a suitable sharp, narrow doping profile. Such a method may therefore be used as described above with reference to Figure 3 to enable the use of a metal for a contact to a preexisting doped region which would otherwise be unacceptable because of poor ohmic contact.
It will be understood that dopant materials other than boron may be used in a method according to the invention, for example, arsenic where an n-type dopant material is required.
Similarly, amorphous metal alloys other than nickel-niobium may be used in methods in accordance with the invention. However, it will be appreciated that an important requirement of the amorphous metal alloy in a method according to the invention is that it should consist of elements with low diffusion constants in the material of the semiconductor body. Other suitable metal-metal alloys are molybdenum-nickel, nickel-titanium and niobium-platinum. Other suitable alloys are glassy metal-metalloid alloys such as the silicide glasses of refractory metals.
It will be understood that a method according to the invention is especially suitable for fabricating shallow doped regions in a semiconducoor body, for example the source and drain regions of MOS transistors in VLSI circuits.

Claims (15)

1. A method of forming a doped region in a body of semiconductor material comprising depositing on a surface of the semiconductor body a layer of an amorphous metallic alloy containing a quantity of a material capable as acting as a dopant in the semi-conductor material; and heating the layer to cause diffusion of the dopant material from said amorphous alloy into the semiconductor body.
2. A method according to Claim 1 wherein the amorphous alloy is chosen so that the alloy serves as an electric contact to the doped region.
3. A method according to Claim 1 further including the step of subsequently providing an electric contact to the doped region in the form of a metal layer which contacts the doped region via the amorphous layer, the material of the amorphous layer being chosen so as to serve as a barrier layer between the doped region and the metal layer to inhibit the diffusion of material into the doped region from the metal layer.
4. A method according to any one of the preceding claims wherein the region into which dopant material is diffused already contains dopant material, the diffused dopant material serving to improve the ohmic contact between the alloy layer and the already doped region.
5. A method according to any one of the preceding claims wherein said amorphous alloy is a metal-metal alloy.
6. A method according to Claim 5 wherein said amorphous alloy is a nickel-niobium alloy.
7. A method according to Claim 5 wherein said amorphous alloy is a molybdenum-nickel alloy.
8. A method according to Claim 5 wherein said amorphous alloy is a nickel-titanium alloy.
9. A method according to Claim 5 wherein said amorphous alloy is a niobium-platinum alloy.
10. A method according to any one of Claims 1 to 4 wherein said amorphous alloy is a metalmetalloid glassy alloy.
11. A method according to Claim 10 wherein said amorphous alloy is a silicide glass of a refractory metal.
12. A method according to any one of the preceding claims wherein said dopant material is boron.
13. A method according to any one of Claims 1 to 11 wherein said dopant material is arsenic.
14. A method of forming a doped region in a body of semiconductur material substantially as hereinbefore described with reference to Figure 1 or Figure 3 of the accompanying drawings.
15. A semiconductor body including a doped region formed by a method according to any one of the preceding claims.
GB08330342A 1982-11-22 1983-11-14 Forming a doped region in a semiconductor body Expired GB2130793B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB08330342A GB2130793B (en) 1982-11-22 1983-11-14 Forming a doped region in a semiconductor body

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB8233245 1982-11-22
GB08330342A GB2130793B (en) 1982-11-22 1983-11-14 Forming a doped region in a semiconductor body

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GB8330342D0 GB8330342D0 (en) 1983-12-21
GB2130793A true GB2130793A (en) 1984-06-06
GB2130793B GB2130793B (en) 1986-09-03

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0248445A2 (en) * 1986-06-06 1987-12-09 Hitachi, Ltd. Semiconductor device having a diffusion barrier and process for its production
EP0305977A2 (en) * 1987-09-04 1989-03-08 Kabushiki Kaisha Toshiba Method for doping a semiconductor integrated circuit
DE4139159A1 (en) * 1990-11-28 1992-06-04 Mitsubishi Electric Corp METHOD FOR DIFFUSING N INTERFERENCE POINTS IN AIII-BV CONNECTION SEMICONDUCTORS
US5284793A (en) * 1989-11-10 1994-02-08 Kabushiki Kaisha Toshiba Method of manufacturing radiation resistant semiconductor device

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB816799A (en) * 1955-06-28 1959-07-22 Western Electric Co Improvements in or relating to semi-conductor devices and to methods of making them
GB1227985A (en) * 1967-05-31 1971-04-15
GB1231103A (en) * 1967-04-28 1971-05-12
GB1345231A (en) * 1970-06-23 1974-01-30 Gen Electric Semiconductor doping
GB1464801A (en) * 1974-10-18 1977-02-16 Siemens Ag Production of doped zones of one conductivity type in semi conductor bodies
GB1503017A (en) * 1974-02-28 1978-03-08 Tokyo Shibaura Electric Co Method of manufacturing semiconductor devices
GB2012107A (en) * 1977-12-30 1979-07-18 Mobil Tyco Solar Energy Corp Manufacture of solar cells

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB816799A (en) * 1955-06-28 1959-07-22 Western Electric Co Improvements in or relating to semi-conductor devices and to methods of making them
GB1231103A (en) * 1967-04-28 1971-05-12
GB1227985A (en) * 1967-05-31 1971-04-15
GB1345231A (en) * 1970-06-23 1974-01-30 Gen Electric Semiconductor doping
GB1503017A (en) * 1974-02-28 1978-03-08 Tokyo Shibaura Electric Co Method of manufacturing semiconductor devices
GB1464801A (en) * 1974-10-18 1977-02-16 Siemens Ag Production of doped zones of one conductivity type in semi conductor bodies
GB2012107A (en) * 1977-12-30 1979-07-18 Mobil Tyco Solar Energy Corp Manufacture of solar cells

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0248445A2 (en) * 1986-06-06 1987-12-09 Hitachi, Ltd. Semiconductor device having a diffusion barrier and process for its production
EP0248445A3 (en) * 1986-06-06 1988-10-12 Hitachi, Ltd. Semiconductor device having a diffusion barrier and process for its production
US4965656A (en) * 1986-06-06 1990-10-23 Hitachi, Ltd. Semiconductor device
EP0305977A2 (en) * 1987-09-04 1989-03-08 Kabushiki Kaisha Toshiba Method for doping a semiconductor integrated circuit
EP0305977A3 (en) * 1987-09-04 1990-11-22 Kabushiki Kaisha Toshiba Method for doping a semiconductor integrated circuit
US5284793A (en) * 1989-11-10 1994-02-08 Kabushiki Kaisha Toshiba Method of manufacturing radiation resistant semiconductor device
DE4139159A1 (en) * 1990-11-28 1992-06-04 Mitsubishi Electric Corp METHOD FOR DIFFUSING N INTERFERENCE POINTS IN AIII-BV CONNECTION SEMICONDUCTORS

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Publication number Publication date
GB8330342D0 (en) 1983-12-21
GB2130793B (en) 1986-09-03

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