GB2126802A - High density packaging for electronic circuits - Google Patents

High density packaging for electronic circuits Download PDF

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Publication number
GB2126802A
GB2126802A GB08225182A GB8225182A GB2126802A GB 2126802 A GB2126802 A GB 2126802A GB 08225182 A GB08225182 A GB 08225182A GB 8225182 A GB8225182 A GB 8225182A GB 2126802 A GB2126802 A GB 2126802A
Authority
GB
United Kingdom
Prior art keywords
substrate
flexible
flexible portions
chips
strips
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB08225182A
Other versions
GB2126802B (en
Inventor
John Alan Scarlett
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STC PLC
Original Assignee
Standard Telephone and Cables PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Standard Telephone and Cables PLC filed Critical Standard Telephone and Cables PLC
Priority to GB08225182A priority Critical patent/GB2126802B/en
Priority to DE19833330466 priority patent/DE3330466A1/en
Publication of GB2126802A publication Critical patent/GB2126802A/en
Application granted granted Critical
Publication of GB2126802B publication Critical patent/GB2126802B/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/189Printed circuits structurally associated with non-printed electric components characterised by the use of a flexible or folded printed circuit
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • H05K1/147Structural association of two or more printed circuits at least one of the printed circuits being bent or folded, e.g. by using a flexible printed circuit
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/118Printed elements for providing electric connections to or between printed circuits specially for flexible printed circuits, e.g. using folded portions
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/04Assemblies of printed circuits
    • H05K2201/046Planar parts of folded PCBs making an angle relative to each other
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/06Thermal details
    • H05K2201/064Fluid cooling, e.g. by integral pipes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09372Pads and lands
    • H05K2201/09445Pads for connections not located at the edge of the PCB, e.g. for flexible circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10689Leaded Integrated Circuit [IC] package, e.g. dual-in-line [DIL]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2009Reinforced areas, e.g. for a specific part of a flexible printed circuit
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0058Laminating printed circuit boards onto other substrates, e.g. metallic substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/36Assembling printed circuits with other printed circuits
    • H05K3/361Assembling flexible printed circuits with other printed circuits
    • H05K3/365Assembling flexible printed circuits with other printed circuits by abutting, i.e. without alloying process

Abstract

A high density assembly of integrated circuit units is made on a flexible or flexi-rigid substrate of insulating material which consists of flat sections (13) carrying the IC units separated by flexible portions. Each flexible region carries contact fingers or strips (4), so located that when the substrate is folded into a corrugated form the contact fingers or strips are on the outside of the now curved flexible portion. The substrate is either folded back on itself, or a number of such substrates placed adjacent to each other, with contact fingers or strips on adjacent flexible portions engaging. Compliant spacers (14) located between the inner or concave sides of the substrate urge the contact fingers into engagement. The whole is in a box and can be filled with a liquid coolant. Contact fingers may also be provided on the inner or concave sides of the flexible portions. In such case the compliant spacers (14) also have contacts to cooperate with these contact fingers. <IMAGE>

Description

SPECIFICATION High density packaging for electronic circuits The invention relates to a method and means for high density packaging of integrated electronics circuit modules or chips.
As the complexity of electronic circuits using integrated circuit units increases, the problems of mounting, interconnecting and cooling the units increases. Hence in any system or sub-system with more than a dozen or two of such units, it is likely to be the interconnection and cooling arrangements which dictate the overall performance and efficiency of such systems or sub-systems. Thus an object of the invention is to provide a method and means of mounting and interconnecting such units in which the above indicated problems are minimised.
According to the invention there is provided a method of mounting and interconnecting integrated electronics circuit modules or chips, including mounting individual modules or chips to a flexible of flexi-rigid substrate with the modules or chips mounted on substrate regions which are separated by flexible portions of the substrate, providing the flexible portions of the substrate with electrically conductive fingers or strips to form electrical contacts, folding the substrate at its flexible portions to produce corrugations, the folding being so done that some at least of the conductive fingers or strips are on the outside of the flexible portions and stand proud of the surface thereof, folding the substrate back on itself, or placing folding substrate strips adjacent to each other, such that adjacent flexible portions engage, and securing the conductive fingers or strips together such that they are electrically connected.
Embodiments of the invention will now be described with reference to the accompanying drawings, in which: Fig. 1 shows schematically a flexible substrate as used in assemblies embodying the invention, Fig. 2 is a plan view of an assembly embodying the invention, Fig. 3 is a perspective view of a substrate and integrated circuit units as used in an assembly embodying the invention, Fig. 4 is a view similar to Fig. 3 of an alternative arrangement, and Fig. 5 is a perspective view of an assembly embodying the invention.
In our Application No. (J.A. Scarlett 4) we have described a three-dimensional "packaging" arrangement for integrated circuit units with some description of methods of cooling.
Those arrangements used an insulating substrate on which integrated circuit modules or chips are mounted. In the preferred arrangement the modules or chips are each mounted in an aperture in the substrate.
This substrate has a layer of insulating material with printed circuit tracks on one or both of its faces, each face with such tracks having a coating of an insulation. Each mounting aperture is made by back etching to expose the tracks and then cutting them to leave beams or fingers to which the modules or chips are electrically and mechanically fixed. Other methods of mounting can also be used e.g. DIP units with holes in the substrate.
Fig. 1 shows a flexible printed circuit substrate 1 like that of the above-identified application with chips such as 2 mounted by inverse beam bonding. The major difference from the arrangement of the above-mentioned application is that between the tooling or locating holes 3 along the edges of the tape, gold (or similar) plated fingers 4 are present on one or both sides of the flexible substrate, with alternate rows of these fingers on opposite sides of the tape when they are on one side only. The fingers are plated to such a depth as to stand proud of any cover coat etc. applied to the flexible base.
In use, the flexible substrate 1 is folded through an angle, Fig. 2 which could be about 300own either side of the sets of holes 3, which leaves the fingers 4 exposed on the outside of a curve.
Locating pins (not shown) hold successive layers of the folded flexible substrate in alignment. After a number of such corrugations, the flexible base 1 may be folded back on itself between two rows of chips, see Fig. 2. Alternatively, the flexible substrate may be terminated just beyond a set of holes such as 3 and contacts 4, and in assembly a second, similar flexible arrangement laid over the first, such that the fingers 4 on the underside of this second flexible substrate contact the fingers on the upper side of the first flexible substrate.
The sets of fingers on adjacent layers of the folded substrate or between adjacent separate layers, are held in intimate contact by spacers 7 which have some degree of compliance, such as an elastomeric strip on their edges.
Where the substrate has contact fingers on the inner or concave face of the flexible regions of the substrate, some at least of the spacers 7 have contacts on their edges to co-operate with these contact fingers.
At the ends of the system, a rigid plate such as 5 has holes to carry locating pins or rods which pass through the holes 3, the spacing of the rows of holes determining the fold angles of the flexible substrate 1. Midway between the holes in the plate 5 there are half-height pillars 6 which may have compliant edges similar to those of the spacers 7, to support the crests of the first set of corrugations. These pillars may also carry contacts for co-operation with contacts on the inner or concave portions of the substrate.
The plate 5 may be a printed circuit board (single-sided, double-sided or multilayer) having contact fingers to mate with the fingers 4 on the adjacent face of the first layer of the flexible substrate 1. The plate 5 may also be of metal, in which case the flexible substrate 1 does not have fingers on the adjacent sides of the folds which contact the plate 5, with the possible exception of fingers for making earthing contacts. In this case alternative means of providing input and output connections to the system is provided, e.g. folds 8 carry contact fingers which could be stiffened and inserted into an edge connector.
This system is similar in some respects to that of the above application, but it has significant differences. Thus the interconnect potential is less, since any connection "up" the stack is made only on one side of any given row of modules or chips, while connections "down" are on opposite sides of the that row of modules or chips. However, this disadvantage is offset by a much simpler construction, with no separate inter-layer connectors used. The basically triangular form of the assembly obviates any need for spacers to separate chips on adjacent layers.
The methods of cooling and input-output connections mentioned in the above application are applicable. Thus in the case of cooling the whole assembly may be immersed in a suitable coolant.
A variant is shown in Fig. 3, in which instead of carrying bare chips mounted on inverse beams, the areas between the contact sets 4 can carry packaged chips, e.g. DIP's 10, flat packs, chip carriers 1 1 or bare chips 12 wire bonded or solder bump bonded. These areas may be left as simple flexible circuitry, but could also be in the form of rigidised "flexibles", in which a stiffening plate is bonded to the flexible substrate 1, as shown at 9, or they could be fully bonded, through-hole plated areas making the base a true flexi-rigid board.
While for the maximum interconnect capability there should be only a single row of chips between each layer to layer contact set, circuits can be made with two or more rows of chips between contact sets. This applies to any variant of the basic form.
A further variant of the flexi-rigid approach is to rigidise alternate connector zones, as shown at 1 2a in Fig. 4, so that each contact area is between one rigid and one flexible portion of the substrate.
This rigidisation can be extended to forming the end plate 5 as a rigidised area at the end of the flexible substrate. The contacts 4 can be connected to inner layer tracking by via holes or by other known means.
If a rigidised end 5 is used as an end plate, it can carry active devices as well as inputloutput contacts.
Flexi-rigid constructions can also be used to produce a variant of the arrangement of the above application in which the semiconductor chips, which may be pre-packaged, are mounted on rigid areas with flexible folds between the layers, and with compliant connectors to contact rows of fingers on the rigidised plates. Alternatively, in the case of sprung pin connectors, these could be received in holes.
Instead of using inverse beam bonding for the chips, chips with a TAB or so-called "spider bond" lead carrier attached can be placed in the apertures in the flexible, rigidised flexible or rigid base, and the leads are then bonded to suitable terminations on the tracking around the apertures.
Thus a practical implementations of the present invention gives a truly three-dimensional packaging format, which is capable of easy, cheap manufacture, and can also be tested when in a planar form.
The package, see Fig. 5 comprises vertical areas, such as 13 which may be rigid carrying single columns of packages or bare chips, between which are flexible areas on which the contact fingers 4 are plated up to a height above the surface of the cover coat. Compliant spacers 14 mounted on guide bars such as 15 separate the corrugations of the circuit, and press the fingers of one layer into contact with the fingers on an adjacent layer. The assembly can be unfolded and laid flat for testing, with simple jumper links in a frame connecting the contact fingers. As in the case of the arrangements of Fig.
2, contact fingers can also be provided on the inner or concave flexible region, to co-operate with contacts on the spacers such as 14.
Any package on a conventional board can make connections to only four adjacent packages, whereas the folded form of Flg. 5 offers eight effectively adjacent packages, and if the compliant spacers carry connections, and the fingers on the two sides of the flexible portions are connected by via holes, there can be access to sixteen packages without a track needing to pass any other package. The three-dimensional format is also an excellent vehicle for bus-oriented systems, where a complete address or data bus can run in the third dimension.
When the whole circuit is made on a doublesided flexible laminate, the base material can be back-etched or laser cut from the package mounting areas to leave the plated-up ends of tracks projecting in the form of inverse beam leads to which chip carriers or bare chips can be directly bonded. Cooling and enviromental protection for bare chips can be achieved by immersing the entire assembly in an inert liquid, possibly one which can be allowed to boil where it contacts the chips, thus enabling use to be made of the latent heat of evaporation.
External connections to the unit can be made with matching contact fingers on rigid front and back plates: and also at the ends where the successive layers of the flexible circuit are folded over.
With the use of minimum lines and gaps of 0.1 mm, such a three-dimensional package offers an extremely powerful interconnect capability without increasing the packaging costs significantly above those of currently used planar interconnects.

Claims (11)

1. A method of mounting and interconnecting integrated electronics circuit modules or chips, including mounting individual modules or chips to a flexible or flexi-rigid substrate with the modules or chips mounted on substrate regions which are separated by flexible portions of the substrate, providing the flexible portions of the substrate with electrically conductive fingers or strips to form electrical contacts, folding the substrate at its flexible portion to produce corrugations, the folding being so done that some at least of the conductive fingers or strips are on the outside of the flexible portions and stand proud of the surface thereof, folding the substrate back on itself, or placing folded substrate strips adjacent to each other, such that adjacent flexible portions engage, and securing the conductive fingers or strips together such that they are electrically connected.
2. A method as claimed in claim 1, in which the substrate is formed with rigidised sections carrying the modules or chips, which sections are separated from each other by the flexible portions.
3. A method as claimed in claim 1 or 2, and in which the substrate or substrates are installed in a container whose walls fit closely to the substrate folds.
4. A method as claimed in claim 3, in which the walls of the substrate carry contacts to be engaged by contacts on some of the flexible portions.
5. A method of mounting and interconnecting integrated electronics circuit modules, substantially as described with reference to the accompanying drawings.
6. Apparatus for the high density mounting and interconnection of integrated circuit modules or chips, which includes a flexible or flexi-rigid substrate of an electrically insulating material having a number of regions on which the modules or chips are mounted, the said regions being separated by flexible portions, and a number of electrically conductive fingers or strips on some at least of the flexible portions, in which the substrate is folded into a corrugated form in such a way that the conductive fingers or strips are on the outsides of their flexible portions, and in which the substrate is folded back on itself or a number of substrates are mounted adjacent to each other, such that the connecting fingers or strips on adjacent flexible portions engage and are secured together electrically.
7. Apparatus as claimed in claim 6, and in which compliant spacers are located between the insides of the flexible regions of adjacent folds of the substrate.
8. Apparatus as claimed in claim 6, in which contact fingers are on both sides of some at least of the flexible portions of the substrate, in which compliant spacers between the insides of parallelmounted flexible regions carry contacts to cooperate with contact fingers on the insides of said flexible regions.
9. Apparatus as claimed in claim 6, 7 or 8, in which the folded substrate or substrates is or are in a container whose sides contact the corrugations and in which the walls carry contacts to engage contacts on the outer ones of the flexible portions.
10. Apparatus as claimed in claim 7, 8 or 9, and in which the container is filled with a liquid coolant
1 1. Apparatus for the high density mounting and interconnection of integrated circuit modules or chips, substantially as described with reference to the accompanying drawings.
GB08225182A 1982-09-03 1982-09-03 High density packaging for electronic circuits Expired GB2126802B (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
GB08225182A GB2126802B (en) 1982-09-03 1982-09-03 High density packaging for electronic circuits
DE19833330466 DE3330466A1 (en) 1982-09-03 1983-08-24 HIGH PACKING DENSITY ARRANGEMENT OF INTEGRATED CIRCUITS

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB08225182A GB2126802B (en) 1982-09-03 1982-09-03 High density packaging for electronic circuits

Publications (2)

Publication Number Publication Date
GB2126802A true GB2126802A (en) 1984-03-28
GB2126802B GB2126802B (en) 1985-06-05

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Family Applications (1)

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GB08225182A Expired GB2126802B (en) 1982-09-03 1982-09-03 High density packaging for electronic circuits

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GB (1) GB2126802B (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5228192A (en) * 1990-10-29 1993-07-20 Harris Corporation Method of manufacturing a multi-layered ic packaging assembly
EP0892487A1 (en) * 1997-07-10 1999-01-20 SME Elettronica S.p.A. Power module using semiconductors
WO2003030607A1 (en) * 2001-09-27 2003-04-10 Siemens Aktiengesellschaft Electrical circuit arrangement comprised of a number of electrically interconnected circuit components
WO2008020361A2 (en) * 2006-08-14 2008-02-21 Koninklijke Philips Electronics N.V. Deformable integrated circuit device
CN107105569A (en) * 2012-06-20 2017-08-29 三星电机株式会社 Substrate and portable terminal
EP2365740B1 (en) * 2010-03-12 2018-08-22 Omron Corporation Illuminating device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
RU2119276C1 (en) * 1997-11-03 1998-09-20 Закрытое акционерное общество "Техно-ТМ" Three-dimensional flexible electronic module

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5228192A (en) * 1990-10-29 1993-07-20 Harris Corporation Method of manufacturing a multi-layered ic packaging assembly
EP0892487A1 (en) * 1997-07-10 1999-01-20 SME Elettronica S.p.A. Power module using semiconductors
US6137169A (en) * 1997-07-10 2000-10-24 Pace; Adolfo Heat reduction system for transistor assemblies
WO2003030607A1 (en) * 2001-09-27 2003-04-10 Siemens Aktiengesellschaft Electrical circuit arrangement comprised of a number of electrically interconnected circuit components
WO2008020361A2 (en) * 2006-08-14 2008-02-21 Koninklijke Philips Electronics N.V. Deformable integrated circuit device
WO2008020361A3 (en) * 2006-08-14 2008-06-05 Koninkl Philips Electronics Nv Deformable integrated circuit device
US7915707B2 (en) 2006-08-14 2011-03-29 Koninklijke Philips Electronics N.V. Deformable integrated circuit device
EP2365740B1 (en) * 2010-03-12 2018-08-22 Omron Corporation Illuminating device
CN107105569A (en) * 2012-06-20 2017-08-29 三星电机株式会社 Substrate and portable terminal
CN107105569B (en) * 2012-06-20 2019-11-05 三星电机株式会社 Substrate and portable terminal

Also Published As

Publication number Publication date
GB2126802B (en) 1985-06-05
DE3330466A1 (en) 1984-03-08

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PCNP Patent ceased through non-payment of renewal fee