GB2091038A

GB2091038A - Step-wise Variable Capacitor

Info

Publication number: GB2091038A
Application number: GB8137178A
Authority: GB
Original assignee: Clarion Co Ltd
Current assignee: Faurecia Clarion Electronics Co Ltd
Priority date: 1980-12-10
Filing date: 1981-12-09
Publication date: 1982-07-21
Also published as: DE3148968A1; FR2495821B1; JPS5797682A; FR2495821A1; GB2091038B

Abstract

A variable capacitor comprising a plurality of combinable capacitative elements formed on the surface of an insulating or semiconductor substrate (9). The capacitative elements consist of conducting regions (10A to 10E) partially covered by an insulating layer (11), which is in turn covered by a further common conducting layer (12). Switches S (1-5) are provided and connected respectively to the capacitative elements to enable selective combination of the capacitative elements. In some embodiments the switches are semi- conductor switching devices provided on the surface of the substrate (9) (diodes, transistors, FET or photoresponsive elements). <IMAGE>

Description

SPECIFICATION Variable Capacitor The present invention relates to the field of variable capacitors.

It is well known to utilize as a variable capacitor a p-n junction element as shown in Figure 1 of the accompanying drawings. In this Figure, the reference numeral 1 denotes an n-type semiconductive region; 2 is a p-type semiconductive region; 3 is a p-n junction; 4 and 5 are ohmic electrodes disposed in said regions 1 and 2, respectively; 6 and 7 are outgoing or leadout terminals disposed for said electrodes 4 and 5, respectively; and 8 is a depletion layer. In the above variable capacitor configuration, the depletion layer 8 is expanded and contracted depending upon the bias voltage applied to the lead-out terminals 6 and 7, the change of capacitance being due to the expansion or contraction of the depletion layer 8.

However, the conventional or prior-art variable capacitors using the above-mentioned p-n junction elements having the following disadvantages: (1) Since the dependence upon the bias voltage of the depletion-layer capacitance in the p-n junction is utilized, the minimum capacitance depends upon the concentration of impurityin the semiconductive regions, while the maximum capacitance depends upon the increase of the conductive component. Thus, it is practically impossible to provide a large change in the capacitance in a state where 0 is large, and because of the change of 0 being larger with the change of capacitance, a difficulty is experienced in the design of circuits.

(2) Because it is at the common lead-out terminals that the bias voltage is applied for change of the capacitance and that the change of capacitance is read, when such prior art variable capacitors are employed in resonance circuit or the like, input signal voltage itself will easily induce an unnecessary change of the capacitance, resulting in degradation of the signal. Further, since a special circuit configuration is needed for minimization of the interaction between the input signal voltage and the bias voltage, such prior-art variable capacitors can be used only in a limited range of applications.

(3) The concentration of impurity in the semiconductive regions is controlled by the diffusion method of ion-implantation method for determination of the depletion-layer capacitance; generally speaking, however, since such methods permit only a low available percentage, the conventional variable capacitors cannot practically be formed in integrated circuit.

Accordingly, it has been proposed to provide variable capacitors using no p-n junction elements. Figure 2 of the accompanying drawings is a circuit diagram illustrating the basic configuration of such a variable capacitor. In the illustration, the reference symbols C1 to Cn denote fixed capacitive elements, respectively; CO is a floating capacitance of the circuit; S1 to Sn are switching elements, respectively; 6A and 7A are terminals. The number n is a selected integer.

In the configuration illustrated, assume that the switching elements S1 to Sn can be independently opened and ciosed and that the sum in capacitance (the floating capacitance CO may be arbitrarily selected) of the fixed capacitive elements C1 to Cn is Ct. Thus, CT=C1+C2+C3+ ... +C t +C|. Therefore, the circuit shown in Figure 2 permits the capacitance to change in a range from CO to CO+CT by appropriately opening and closing the switching elements S1 to Sn.

Generally, the variable capacitors are employed in a resonance circuit, tuning circuit, timeconstant circuit, etc. However, there are many applications in which no completely continuous change of capacitance is required. In the tuning circuit, for example, of ordinary commercial broadcast receivers, it suffices that the capacitance is changed in a number of steps corresponding to the number of broadcasting channels; no completely stepless change is needed in this field of art.

By giving the fixed capacitive elements different capacitances, the total capacitance can be changed coarsely and finely; accordingly, it is possible to make an accurate control over the change of capacitance in a wide range with a relatively small number of fixed capacitive elements.

Finally, in the case where discrete capacitors are used as the fixed capacitive elements C, to C, they must be high-precision parts selected under strict control for accurate change of the capacitance. For this purpose, however, it is necessary to elaborately select from many discrete capacitors those ones which have desired characteristics. This will lead to higher production costs due to the reduced available percentage; thus, the prior-art variable capacitors do not meet the practical requirements imposed in this field of technique.

The invention provides a variable capacitor, comprising: a substrate; a plurality of conductive regions provided on a surface of said substrate; an insulative layer substantially covering said conductive regions; a common conductive layer provided on said insulative layer so that a capacitor is formed between each said conductive region and a respective portion of said common conductive layer; and switching elements connected between respective said conductive regions and a common point whereby the capacitance between said common point and said common conductive layer can be varied by selectively operating said switching elements.

By way of example embodiments of a variable capacitor according to the present invention will now be described with reference to Figures 3 to 14 of the accompanying drawings, in which Figure 3 is a perspective view showing the basic configuration of a variable capacitor according to the present invention; Figures 4, 8, 10 and 12 are perspective views, respectively, of the embodiments according to the present invention; Figures 5, 6, 9 and 11 are circuit diagrams, respectively, illustrating the embodiments according to the present invention; Figure 7 is a characteristic diagram illustrative of one embodiment according to the present invention; and Figures 13(a), (b) and (c), and 14 are sectional views and a perspective view, respectively, explaining the other embodiments of the present invention.

Referring to the drawings, Figure 3 is a perspective view of a variable capacitor according to the present invention, illustrating the basic configuration thereof. The variable-capacitor configuration in Figure 3 is a version of the circuit in Figure 2 in which the number n is selected to be 5. The substrate of this variable capacitor is an insulation 9 on the surface of which a desired metal is evaporated and next a plurality of conductive regions 10A to 10 is formed by the process of photo-etching. Subsequently, an insulative layer 11 is so informed as to cover the majority of the conductive regions 10A to 10. A common conductive layer 12 is then formed on the surface of the insulative layer 11.

Said conductive regions 11 are to be produced by bonding a desired dielectric material on said majority of the surface area by sputtering or CVD method using a mask. Otherwise, after the dielectric material is bonded over the substrate, the unnecessary portions are eliminated by photo etching method to produce such conductive layers. The common conductive layer 12 is to be formed by evaporation of a desired metal.

Following the above steps of process, each of the plurality of conductive regions 10A to 10E is wired (W, to W5) by wire-bonding method to the switching elements S1 to S5. In the illustration in Figure 3, t is the thickness of the insulative layer 11, b is the width of the common conductive layer 12, and Ii to 16 are the lengths of contact (overlapped length) of the plurality of conductive regions 10A to 10E with the insulative layer 11.

In the configuration in Figure 3, the plurality of conductive regions 10A to 1 0, insulative layer 11 and common conductive layer 12 together form a plurality of capacitance elements, the conductive regions 10A to 10 being operative as one electrode of the individual capacitive element while the common conductive layer 12 acts as the other electrode common to all the capacitive elements. Therefore, the plurality of capacitive elements C, to C6 are thus integrated on the substrate 9.

Concerning the capacitance of the capacitive elements C, to C6 thus formed integrally on the substrate, the nth capacitance Vn is given as follows: Vn=-b-1n/t (farad) where E: dielectric constant.

By the application of the ordinary film-forming technique and photo-etching technique, the thickness t and contact length In of the insulative layer 11, and the width b of the common conductive layer 12 can be controlled each to a desired value, thus permitting minimization of difference between the elements of products to an ignorable extent. Further, it is possible to design said contact length In of the insulative layer 11 to a desired and wide range for each of the capacitive elements. Along with this advantage, integrated-circuit technology can be applied to accurately weight the capacitance of each capacitive element.

Furthermore, by integrairy forming the switching elements on the substrate where the capacitive elements are formed, it is possible to provide such variable capacitors which can be reduced in size and manufactured with lower costs.

Referring now to Figure 4, there is shown an embodiment according to the present invention, in which pluralities of capacitive elements and switching elements are formed integrally on a common substrate, said switching elements being diodes. The substrate is a semiconductive one 13 which is to be heat-treated in an acidic atmosphere at a high temperature to produce an insulative oxide film 14 on the surface of the substrate 13. Next, a portion of the insulative film 14 is removed by photo-etching. A desired impurity which can provide a p- or n-type characteristic is selectively diffused into the semiconductive substrate 13 from the abovementioned portion where the insulative film has been removed, thus producing a plurality of diodes D, to D5 (p-n junction diode).

Subsequently, a plurality of conductive regions 10A to 10 which are to be respectively connected to the said diodes D1 to D6 and a common conductive layer 1 5 which is to be connected to all the diodes, are to be formed. Then, resistive films R, to R5 are produced to cover a portion of the said plurality of conductive regions 10A to 10. Next, an insulative layer 11 and common conductive layer 12 are produced according to the process described with reference to Figure 3.

The conductive regions lOAtO 10, common conductive layers 12 and 15, and the insulative layer 11 are to be produced by an appropriate combination of the ordinary evaporation method and photo-etching method as described with reference to Figure 3. In Figure 4 V8 denotes bias voltage; this bias voltage VB is applied to the capacitive elements through wires W, to W5 bonded to the said resistive films R, to R5 and bias voltage applying switches SW, to SW5 connected to those wires.

In the variable capacitor configuration, the p-n junction diodes D, to D6 are connected via said plurality of conductive regions 10A to 10 to each of the plurality of capacitive elements C, to C5 formed by the plurality of conductive regions 10A to 10, the insulative layer 11 and the common conductive layer 12, and they act as the switching elements S, to S5 shown in Figure 2. Figure 5 illustrates an equivalent circuit including a single capacitive element C, and switching element S,.

When the bias-voltage-applying-switch SW, is turned off, no bias voltage VB is applied to the diode D, so the resistance of the diode will be large so that the respective capacitive element will not be connected to the terminals 6A and 7A Next, when the bias-voltage-applying-switch SW, is turned on, the bias voltage V6 is applied to the diode D, which in turn is forward biased and a dc bias current will flow.Thus, the resistance of the diode D, to small signals will be small with the result that the capecitative element C, as a laminar structure consisting of a conductive region 10A' insulative layer 11 and common conductive layer 12 is connected to the terminals 6A and 7A Since other capacitative elements C2 to C6 are connected in parallel with the capacitative element C,,the actual capacitance between the terminals 6A and 7A can be changed in a wide range by turning on and off the bias-voltageapplying-switches SW, to SW5. Of course, it will be apparent to those skilled in the art that the number of capacitive elements is not limited to 5 and can be freely selected.It should be noted that the resistive films R, to R5 are provided for setting the dc bias current through the diodes D, to D5 and for blocking ac input signal voltage component which is applied between the variable capacitor terminals 6A and 7A Where a large amplitude ac input signal is to be handled, the large-amplitude signal will cause the diodes to be turned on and off so that the variable capacitor may possibly operate erroneously. To avoid this, a source of reversebias voltage VR is provided as shown in Figure 6 to apply a reverse-bias voltage to the diode when it is meant to be switched off. In this case, bias voltage applying switches SW, to SW5 are of a two-circuit switching type making it possible to select one of the bias and reverse-bias voltages.

In the foregoing, the case where p-n junction diodes are used has been described, but diodes of any other appropriate type may be used. For example, diodes made using intrinsic semiconductor as semiconductive substrate, socalled "p-i-n" diodes, may be adopted. Further, Schottky diodes with a so-called Schottky barrier formed between the semiconductive substrate and a desired metal which is bonded to the semiconductive substrate may also be employed.

In case where this Schottky diode is adopted, a selected metal may be bonded to the surface of a semiconductive substrate by the evaporation method or the like instead of diffusing an impurity to produce a p-n junction diode as described with reference to Figure 4.

In effect, in the embodiments described in the foregoing, diodes are made to act as switching elements by utilizing the change in magnitude of the resistance of the diode between when a bias voltage is applied (V=V6) and when no bias voltage is applied (V=O) in the characteristic of voltage V (horizontal axis) vs. current I (vertical axis) of the diodes, as shown in Figure 7; thus, the diodes used in the present invention are not limited to the ones of a specific structure.

Figure 8 illustrates another embodiment of the present invention, in which junction transistors are used as switching elements. It should be noted that in this Figure, the parts or elements similar to those in Figure 4 are indicated at the similar reference numerals. TR, to TR5 are junction transistors, for example, n-p-n transistors of which the collectors are connected to the conductive regions 10A to 10, respectively, all the emitters being connected to the common conductive layer 1 5 and the bases being connected to the resistive films R, to R5 respectively.

These junction transistors TR, to TR5 can be produced by adding a process of impurity diffusion to the process of producing p-n junction diodes as described with reference to Figure 4.

Further, the conductive regions 10A and 10, insulative layer 1 1, common conductive layers 12 and 15, resistive films R, to R5 and wires W6 to W,O may be produced by the same means as described with reference to Figure 4.

In the aforementioned configuration of a variable capacitor, connected to a plurality of capacitive elements C, to C5 composed of a plurality of conductive regions 10A to 10, insulative layer 11 and common conductive layer 1 2 are the junction transistors TR, to TR5 through the plurality of conductive regions 10A to 10, the transistors serving as switching elements S, to S5.

Figure 9 shows an equivalent circuit comprising a capacitive element C1 and switching element SW,. When the bias voltage applying switch SW, is turned off, the bias voltage V5 is not applied to the base B of the junction transistor TR, which will thus be turned off. At this time, the resistance between the collector C and emitter E becomes so great that only the residual capacitance between the collector C and emitter E of the transistor TR, is read as capacitance between the terminals 6A and 7 the circuit can be arranged so that this residual capacitance is small in comparison with the capacitance C1, and the capacitances C2 to C5.

Next, when the bias voltage applying switch SW, is turned on, a bias voltage V9 is applied to the base of the transistor TR, so that a dc bias current will flow between the base B and emitter E. At this time, the resistance between the collector C and emitter E becomes very small so that the capacitance of the capacitative element C, is connected between the terminals 6A and 7A By turning on and off the bias voltage applying switches SW, to SW5, the capacitance between the terminals 6A and 7A can be changed in a wide range.

Note that the resistive films R, to R5 are provided to set the dc bias current through the bases of the junction transistors TR, to TR5.

Figure 10 -shows a further embodiment according to the present invention in which FET (field effect transistor) transistors are adopted as switching elements. It should be.noted that in Figures 4 and 8, similar parts or elements are indicated with similar reference numerals. FTR, to FTR5 are FET transistors, for example, MOSFET transistors, of which the drains are connected to the conductive regions 10A to 1 owe respectively, the sources being connected each to the common conductive layer 12 and the gates of which are connected to the bias voltage applying switches SW, to SW5 by means of wires We to W,O.

These MOSFET transistors FTR, to FTR5 can be produced by producing two regions of drain and source simultaneously using the process of impurity diffusion described with reference to the production of p-n junction diodes. The reference numeral 16 denotes a conductive layer for gate.

This layer is formed on the insulative oxide film 14 between the drain and source and can be produced simultaneously with the production of the conductive regions 10A to 10 and common conductive layer 15. These conductive layers 10A' 10,, 15 and 12, insulative layer 11 and wires W, to W,O may be produced by the same means as described with reference to Figure 4.

In the aforementioned configuration of a variable capacitor, connected to the plurality of capacitive elements C, to C5 composed of the plurality of conductive regions 10A to 10, insulative layer 11 and common conductive layer 12 are the MOSFET transistors FTR, to FTR5 serving as the switching elements S, to S5 as shown in Figure 2. Figure 11 shows an equivalent circuit consisting of a capacitive element C, and switching element SW,.When the bias voltageapplying-switch SW, is turned off, no bias voltage V8 is applied to the gate G of the MOSFET transistor FTR1,which will be turned off so that the resistance between the drain D and source S becomes large; thus, only the residual capacitance between the drain D and source S of the transistor FTR, is read as the capacitance between the terminals 6A and 7A The circuit can be arranged so that this residual capacitance is smaii in comparison with the capacitance C1, and also the capacitances C2 to C5.

Next, when the bias voltage applying switch SW1 is turned on, a bias voltage V8 is applied to the gate of the MOSFET transistor FTR1, forming a channel between the drain D and source S of the transistor FTR, so that the resistance between the drain D and source S becomes very small. Thus, the capacitance of the capacitive element C, can be added to the total capacitance of the variable capacitor. By turning on and off the other bias voltage applying switches SW2 to SW5, the capacitance between the terminals 6A and 7A can be changed in a wide range, by including the capacitances of the other capacitive elements C2 to C5. In a similar manner, junction FET transistors may be used in place of the MOSFET transistors.

These junction FET transistors can be produced by utilizing the process of impurity diffusion as described with reference to the production of p-n junction diodes or junction transistors.

Figure 12 shows a yet further embodiment of the present invention, in which photoresponsive elements are used as switching elements. In this illustration, parts or elements similar to those in Figure 4, 8, and 10 are indicated with similar reference numerals PT, to PT5 are photoresponsive elements being connected between the conductive regions 10A to 10, respectively, and the common conductive layer 1 5. In this embodiment, an insulation 9 is used as the substrate on which the photo-responsive film regions such as CdS (cadmium sulfide) are evaporated and shaped. The conductive regions 10A to 10 and 15, and insulative layer 11 may be produced by the means as described with reference to Figure 3.The reference numeral 1 6 denotes light shutters which can be displaced in the directions of the arrows; 18 is a light source and 19 is a power source.

In the configuration of a variable capacitor, connected to a plurality of capacitive elements C, to C5 formed by the plurality of conductive regions 10A to 10, insulative layer 11 and common conductive layer 12 are photo-responsive elements PT, to PT5 through the plurality of conductive regions lOAtO 10, the photoresponsive elements serving as switching elements S1 to S5 as shown in Figure 2. When a light is irradiated to the photo-responsive films forming part of said photo-responsive elements PT, to PT5, their resistance drops markedly; thus the photo-responsive elements may be used as resistance-changing type switches.Accordingly, by adjusting, by means of the light shutter 16, the position to which the light from the light source 1 8 is projected, it is possible to selectively actuate the photo-responsive elements as switching elements. If the light shutter 16 is adjusted so that the light is projected to the photoconductive elements PT, to PT3, for example, as shown in Figure 12, only the photoresponsive elements PT, to PT3 have the lower resistance; this state corresponds to the state where the switching elements S, to S3 are turned on. Accordingly, the capacitance sum C,+C2+C3 of the capacitive elements C1 to C3 in parallel is connected between the terminals 6A and 7A In this state, since no light is projected to the other photoresponsive elements PT4 and PT5, their high resistance is maintained, which corresponds to the switching elements being turned off; so no component from the capacitive elements C4 and C5 is included.

In this embodiment, under the operating conditions in which the resistance component of the photoresponsive elements PT, to PT3 is smaller than the impedance of the capacitive elements C, to C3, the factor Q is great so that these capacitive elements can be operated like an ordinary capacitive element.

According to the embodiments described in the foregoing, an integrated capacitor can be provided by producing together with capacitive elements on a same substrate semiconductor switches composed of various semiconductive elements as switching elements so arranged as to operate as resistance-changing type switches.

In the embodiments shown in Figures 4, 8 and 10, the insulative oxide film 1 4 produced on the surface of semiconductive substrate 13 may be used as the dielectric forming the capacitive element; thus the intergration of the capacitor can be simplified. In these cases, the capacitive elements are composed of conductive regions lOAtO 10 (see Figures 13(a) to 13(c)) (connected to an island region) and a laminar structure consisting of an insulative oxide film 14 and common conductive layer 1 2. The island region 20 has not been referred to in the description of the aforementioned embodiments; however, this region must be produced in the manufacture of integrated circuits in order to prevent the interaction in characteristics with other elements to be produced.In this embodiment according to the present invention, the island region may be used as one end of the capactive element as it is.

Referring to Figure 14, there is shown yet another embodiment of the present invention in which variable capacitors VC obtainable according to the aforementioned embodiments are integrally formed on a substrate 13 on which semiconductive integrated circuits IC are also produced. According to this configuration, since the variable capacitors are incorporated in a single chip of integrated circuit, excessive terminals which are usually welded from the exterior, and also the bonding work can be omitted; so, the product can be reduced in size and a reduction in productions costs can be attained.

The capacitance of the plurality of capacitative elements in the various embodiments explained in the foregoing can be changed, so-called "weighted" by changing the area of contact between the plural conductive layers and the insulative layer covering the conductive layers; however, any other appropriate method or means may be adopted to change the area of contact.

With partially different film thickness of the insulative layer or partially different structure of the insulative layer, for example, it is possible to attain the above object.

In production of various semiconductor switches, the conductivity type of semiconductive regions may be freely selected.

As seen from the foregoing, the present invention provides a variable capacitor which uses no p-n junction by producing integrally on a common substrate a plurality of fixed capacitative elements and a plurality of switching elements connected to the capacitative elements, respectively. The present invention also provides the following effects: (1) Since it is possible to freely and accurately change the capacitance from the minimum one which is determined by the floating capacitance of the circuit which can be adjusted as desired, to the maximum capacitance which is determined by the area of electrode which is adjustable as desired, the ratio of capacitance change can be made considerably larger than in conventional variable capacitors.Thus, when the variable capacitor according to the present invention is employed in a resonance circuit or tuning circuit, it is possible to provide a considerably larger range in changes of central frequency, thus making it possible to design the circuit more freely.

(2) It is possible to provide a large Q factor of the capacitance by designing the switching element correspondingly, and also it is possible to reduce the change of Q due to the capacitance change.

(3) Since the capacitance is changed by means of a switching element, no substantial change of the capacitance with an input signal occurs, thus preventing the degradation of the signal.

(4) Because integrated-circuit technology is applicable in the production of variable capacitors according to the present invention, it is possible to reduce the size of products and the production costs.

(5) Since the production of capacitive elements according to the present invention requires no diffusion method or ion-implantation method for control of the impurity concentration, which is likely to result in non-uniformity, it is possible to minimize the non-uniformity in capacitance from one capacitative element to another, thus improving the available percentage.

Claims

1. A variable capacitor, comprising: a substrate; a plurality of conductive regions provided on a surface of said substrate; an insulative layer substantially covering said conductive regions; a common conductive layer provided on said insulative layer so that a capacitor is formed between each said conductive region and a respective portion of said common conductive layer; and switching elements connected between respective said conductive regions and a common point whereby the capacitance between said common point and said common conductive layer can be varied by selectively operating said switching elements.

2. A variable capacitor, comprising: a substrate; a plurality of conductive regions provided on a first surface region of said substrate; an insulative layer substantially covering said conductive regions; a first common conductive layer provided on said insulative layer so that a capacitor is formed between each said conductive region and a respective portion of said first common conductive layer, switching elements provided on a second surface region of said substrate and a second common conductive layer provided adjacent said switching elements, the switching elements being connected between respective said conductive regions and said second common conductive layer; and switch control means for selectively energizing said switching elements to connect corresponding said conductive regions to said second common conductive layer, whereby to vary the capacitance between said first and second common conductive layers.

3. A variable capacitor as claimed in Claim 2 wherein the sizes of the areas of said conductive regions contacting with said insulative layer are different.

4. A variable capacitor as claimed in either of Claims 2 or 3, in which said substrate is made of a semiconductive material.

5. A variable capacitor as claimed in any one of Claims 2 to 4, in which said switching elements are semiconductor switching devices.

6. A variable capacitor as claimed in Claim 5, in which each semiconductor device is a p-n junction diode.

7. A variable capacitor as claimed in Claim 5, in which each of said semiconductor device is a Schottky diode.

8. Variable capacitor as claimed in Claim 5, in which each said semiconductor device is a junction transistor.

9. A variable capacitor as claimed in Claim 5, in which each said semiconductor device is a fieldeffect transistor (FET).

10. A variable capacitor as claimed in Claim 5, in which each said semiconductor device is photo-responsive element, the switch control means further comprising light projecting means to project light selectively onto said photoresponsive elements.

11. A variable capacitor as claimed in any of the preceding claims, in which said substrate forms a part of a semiconductor integrated circuit substrate.

12. A variable capacitor substantially as hereinbefore described and as illustrated in Figures 3 to 14 of the accompanying drawings.