GB2081505A

GB2081505A - Hall effect device

Info

Publication number: GB2081505A
Application number: GB8025487A
Authority: GB
Original assignee: ITT Industries Ltd
Current assignee: ITT Industries Ltd
Priority date: 1980-08-05
Filing date: 1980-08-05
Publication date: 1982-02-17
Also published as: GB2081973B; GB2081973A

Abstract

A Hall effect device comprises a thin substrate-free epitaxially grown semiconductor body (11) mounted in a magnetically permeable, e.g. ferrite, housing (15, 16). The layer is grown on a substrate (12) which, after device processing is complete, is removed by a selective etching process. <IMAGE>

Description

SPECIFICATION Hall effect device This invention relates to semiconductor devices of the Hall effect type and to methods of fabricating such devices.

As is well known to those skilled in the art, a Hall effect device comprises a plate-like body of a semiconductor material through which a transverse magnetic field may be applied. The effect of the magnetic field is to deflect an electric current flowing across the body between a pair of current electrodes, this deflection of the current inducing a potential difference between a pair of sensor or Hall electrodes disposed one on each side of a line joining the two current electrodes. The magnitude of this Hall voltage VH is given by the expression (approximately) BI VH Nde where B is the applied magnetic field intensity; I is the current through the device; N is the carrier concentration of the device material; e is the electronic charge and d is the device thickness.It will be appreciated from this expression that the output Hall voltage is inversely proportional to the device thickness and is directly proportional to the current which in turn is a function of the carrier mobility in the semiconductor material.

Hall effect devices are employed in a variety of switching applications, their most important features being the complete absence of moving parts and the provision of a high degree of isolation between the control input and the device output. These features have made the use of such devices in e.g. telephone switching applications an attractive proposition. The use of Hall effect devices is however limited at present by their relatively low sensitivity which in turn results in a relatively high power consumption.

It will be apparent that the sensitivity of a Hall effect device can be enhanced by using a semiconductor material having a relatively high carrier mobility, e.g. gallium arsenide, and at the same time reducing the device thickness to a minimum. However, previous attempts to produce thin wafers of gallium arsenide have not been successful.

The object of the invention is to minimise or to overcome these disadvantages.

According to one aspect of the invention there is provided a Hall effect device in which the magnetic field sensitive element comprises a substrate free laminer body of an epitaxially grown compound semiconductor material.

According to another aspect of the invention there is provided a method of fabricating a Hall effect device, including depositing an epitaxial layer of a compound semiconductor on a substrate of the same semiconductor or a lattice matching semiconductor, providing current contacts and Hall contacts to the exposed face of the epitaxial layer, and removing the substrate from the unexposed face of the epitaxial layer.

Reduction of the device thickness has the additional consequent effect of increasing the magnetic field through the device as the reduced thickness provides for a reduced air gap between the poles of the magnet used to operate the device.

Embodiments of the invention will now be described with reference to the accompanying drawings in which Figs. 1 to 3 illustrate successive stages in the fabrication of a gallium Hall effect device.

Referring to the drawings, the Hall effect device is formed in an n-type gallium arsenide epitaxial layer 11 (Fig. 1) grown on a gallium arsenide semi-insulating substrate 12 by conventional liquid or vapour phase epitaxial techniques. Typically the epitaxial layer 11 is from 2 to 20 microns in thickness, and in some applications an intervening, e.g. 5 micron, layer 1 2a of gallium aluminium arsenide (Ga1 XAIxAs where 0.8 > x > ()#5) may be provided between the substrate 12 and the epitaxial layer 11. Where such an intervening alloy layer is provided the substrate need not be semi-insulating.

Gold Hall ohmic contacts 13 providing low contact resistance are formed on the n-type epitaxial GaAs layer using standard photolith techniques. The assembly is next inverted (Fig. 2) on to a gold contact pattern 14 laid on an insulating magnetic substrate 15 e.g. a ferrite, such that contact is made to the contacts 13.

The semi-insulating substrate layer 12 is back-etched (Fig. 3) using controlled etching techniques to provide uniformity of device thickness. The etch can either be a normal GaAs etch or one which preferentially etches GaAs with respect to GaAIAs. If the latter has been grown the etching stops at the alloy layer. This is known as a "chemi-stop" process. A lid 16 of ferrite or other magnetic material is placed over the device, and the package is incorporated in a magnetic circuit.

Alternatively the base or substrate can alrerjy be part of the magnetic circuit.

By employing the above technique the air gap can be reduced to less than 10 microns, i.e. an increase in output by a factor of approximately 50 over conventional gallium arsenide devices.

Various methods may be employed for removing the substrate from the back of the device. One such technique is the cathodic inhibition method such as is described in our published specification No. 1,469,005 (J.

Froom-P.D. Green-H.G.B. Hicks8-3-2). In this technique the GaAs is grown on a semi-insulating (SI) GaAs substrate. A chemical etch e.g.

KOH H202 H20 2g 10 ml 20 ml (actually 10 ml of a standard commercial 30% solution) is used to dissolve the GaAs substrate. The semiconductor is given a negative potential (-10 V) by an external power supply, which inhibits the action of the chemical etch. However this only affects the conductive epilayer.

The surface of the high resistance does not acquire the -ve potential, so the substrate dissolves at the normal unhibited rate. This is about 1 ,um/mm for the quoted mixture.

An alternative technique is the chemical dicrimination method. This does not depend on the electrical properties of the substrate, which can be n or p or Sl but requires the presence of the layer 1 2a of Ga1 xAIxAs between the substrate and the GaAs epilayer.

The substrate is removed using an etch which does not attack Ga, XAIxAs in which x > 0~5.' A mixture of 95% H202 solution (30% H202 in H2O) with 5% concentrated NH3 solution has the required properties. If necessary the barrier layer of Ga1-xAlxAs can then be removed by dissolution in concentrated HF solution, which does not attack FaAs.

For both etching techniques the device uniformity is determined by the uniformity of the GaAs epilayer growth. The best uniformity has been achieved with the organometallic cvd process.

In a further embodiment a device can be produced by growing n-type gallium indium arsenide, typically GaO471nO.53As on an indium phosphide (InP) substrate, preferably of semiinsulating material, and then selectively removing the latter. The composition GaO.471- nO.53As gives the epitaxial layer the same lattice parameter as the InP substrate. An exact match is not essential but a close match should be provided. The gallium indium phosphide layer can be grown by conventional liquid epitaxial techniques.

The mobility at room temperature in GaO.471- nO.53As can be as high as 13,000 cm2V-'s-', significantly greater than in GaAs with up to 8,000 cm2V-1s-1.

Chemically selective dissolution of the InP can be achieved using a mixture of hydrochloric acid (HC2) and phosphoric acid (H3PO4) typically in a volume ration of 3:1, but other proportions would be satisfactory.

The Hall effect devices described herein may be used in a variety of applications. In particular they may be used as switching elements in telecommunication exchanges, as general purpose relays or switches, or as current and magnetic field measuring devices.

Claims

1. A Hall effect device in which the magnetic field sensitive element comprises a substrate free laminar body of an epitaxially grown compound semiconductor material.

2. A Hall effect device, including a substrate free laminar body of an epitaxially grown compound semiconductor, which body is provided with current electrodes and Hall electrodes, and means for providing a magnetic field transverse to the plane of said body.

3. A Hall effect device as claimed in claim 2, wherein the thickness of said laminar body is between 2 and 20 microns.

4. A Hall effect device as claimed in claim 2 or 3, wherein said means for providing a magnetic field comprises a ferrite package within which the body is mounted.

5. A Hall effect device as claimed in any one of claims 1 to 4, wherein the semiconductor is gallium arsenide.

6. A Hall effect device as claimed in any one of claims 1 to 4, wherein the semiconductor is gallium indium arsenide.

7. A Hall effect device as claimed in claim 6, wherein the semiconductor is GaO471nO.53As.

8. A Hall effect device substantially as described herein with reference to the accompanying drawings.

9. A method of fabricating a Hall effect device, including depositing an epitaxial layer of a compound semiconductor on a substrate of the same semiconductor or a lattice matching semiconductor, providing current contacts and Hall contacts to the exposed face of the epitaxial layer, and removing the substrate from the unexposed face of the epitaxial layer.

10. A method as claimed in claim 9, wherein the substrate is semi-insulating and is removed with an electric potential selective etch.

11. A method as claimed in claim 9, wherein the substrate is removed with a chemically selective etch.

12. A method as claimed in any one of claims 9 to 11, wherein the thickness of the 4 epitaxial layer is from 2 to 20 microns.

1 3. A method as claimed in any one of claims 9 to 12, wherein the epitaxial layer is ; gallium arsenide.

14. A method as claimed in claim 13, wherein a relatively thin three component semiconductor layer is provided between the substrate and the epitaxial layer.

15. A method as claimed in any one of claims 9 to 12, wherein the epitaxial layer is gallium indium arsenide.

6. A method as claimed in claim 15, wherein the epitaxial layer is Ga0.47ln0.53As, and wherein the substrate is indium phosphide.

17. A method of fabricating a Hall effect device substantially as described herein with reference to the accompanying drawings.

18. A Hall effect device made by the method of any one of claims 9 to 17.

19. A telephone exchange provided with a plurality of Hall effect devices as claimed in any one of claims 1 to 6 or claim 18.