GB2044024A - Overcurrent relays - Google Patents
Overcurrent relays Download PDFInfo
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- GB2044024A GB2044024A GB8006997A GB8006997A GB2044024A GB 2044024 A GB2044024 A GB 2044024A GB 8006997 A GB8006997 A GB 8006997A GB 8006997 A GB8006997 A GB 8006997A GB 2044024 A GB2044024 A GB 2044024A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
- H02H3/08—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess current
- H02H3/093—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess current with timing means
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Description
1 GB 2 044 024 A 1
SPECIFICATION Static instantaneous overcurrent relay with low. 55 transient overreach
BACKGROUND OF THE INVENTION 5 The present invention relates to an instantaneous overcurrent relay, and more particularly to a static instantaneous relay with low transient overreach. As a result of advancements in solid state technology, static protective relays have been developed. Exemplary static relays are disclosed in U. S. Patent No. 4,092,690, entitled, - Protective Relay Circuit Providing a Combined Distance and Overcurrent Function", issued May 30, 1978; and in U. S. Patent No. 4,034,269, entitled, "Protective Relay Circuits", issued July 5, 1977.
An overcurrent protective relay is employed when it is necessary to trip a circuit breaker when greater than a predetermined magnitude of current flows into a particular portion of a power system. Such overcurrent relays are broadly characterized as -Instantaneous- or--- timedelay", with---timedelay- being further characterized as "inverse"; "very inverse"; or "extremely inverse".
An instantaneous overcurrent relay is generally provided with no intentional time delay whereas a time delay ove.rcurrent relay is provided with various degrees of time delay.
Instantaneous overcurrent relays have a tendency to overreach. Overreach is generally defined as the tendency of a relay to pick up, i.e., operate, for fault currents less than one would expect; that is, if the effect of offset in the fault current wave were neglected. Percent overreach is a term which describes the degree to which this transient tendency exists, and may be defined as follows:
(A-B) Percent overreach = 100-, where 95 A A = relay pickup current, in steady state rms amperes.
B = the steady-state rms amperes which, when Jully offset initially, will just pick up the relay.
As an example of the foregoing, consider an application involving electro-mechanical instantaneous overcurrent relays having a typical 105 15% transient overreach. For a fault with a steady state component of 10 amps, if the relay is not to operate for such a fault, the value A, i.e. the relay pick-up setting, must exceed:
X 10 - 100-15 amperes = 11.8 amperes However, referring now to the static instantaneous overcurrent relay, it is to be appreciated that such static relays operate much more quickly than the electromechanical instanteous overcurrent relays. This is due in large measure to the fact that the electromechanical relays have a certain amount of inertia to overcome before operation whereas no such inertia must be overcome in a static relay.
Accordingly, the transient overreach percentage for a static relay approaches the maximum value which is the value for a relay which is fast enough to respond to the instantaneous magnitude of the current. For example, in an exemplary power line having a line angle (0) of 751, the maximum transient overreach percentage approaches 33%. This transient overreach percentage can be responded to with the technique discussed above in the case of the 15% electromechanical transient 70, overreach percentage. However, in the case of the 33% transient overreach situation, this technique is undesirable as it requires the pickup of the relay to be set 50% greater than the steady state fault current. Such a setting would be contrary to good protective relaying engineering practices which generally require that the relay be set as close to the steady state load current as possible because this permits more complete coverage of the line under fault conditions.
One proposed technique to employ in connection with this greater transient overreach problem in static overcurrent relays is to delay the operation of the relay for a time period sufficent to reduce the transient overreach percentage to an acceptable level. However, this technique is undesirable because excessive delays would be injected to cover all conditions.
One application for a static instantaneous overcurrent relay is for protecting an electrical power distribution line. Such a distribution line may have a typical line angle (0), the angle between the system voltage and system current, of less than about 771'. It would be desirable to provide such a static instantaneous overcurrent relay having a transient overreach of less than 10% for line angles up to about 77 1.
In accordance with the present invention there is provided a static instantaneous overcurrent - relay for use in protecting an AC power line from overcurrents, the relay comprising: level detector means for detecting input pulses exceeding a predetermined threshold level, and means responsive to the output of the detector means for temporarily inhibiting operation of the relay until at least two input pulses are detected.
When the detector of such a relay is connected to receive.a pulsating waveform of substantially the same frequency as the frequency of an AC power line and consisting of discrete pulses representative of the magnitude of the current in the power line, the detector threshold level is set so that it is indicative of an overcurrent in the power line.
This arrangement provides a variable delay in the operation of the relay after detection of an input pulse exceeding the threshold level, the delay being dependent on the time between successive pick-up peaks. It therefore overcomes GB 2 044 024 A 2 the problems associated with fixed delay, and a relay embodying the present invention may therefore have a transient overreach of less than 8% for a protected line angle up to 750.
By way of example only, an embodiment of the invention will now be described with reference to the accompanying drawings in which:
Fig. 1 is a functional block diagram of one form of static instantaneous overcurrent relay of the present invention.
Figs. 2A-2F are representations of exemplary wave forms associated with the block diagram of Fig. 1. Vertical classifications 1, 11, Ill represent three fault conditions.
Fig. 3 is a plot of the transient overreach 80 percentage (TOR) in two forms of static instantaneous overcurrent relay as a function of the line angle (0). Curve 1 represents a static instantaneous overcurrent relay which operates on the instantaneous current greater than or equal to 85 the pick up level. Curve 2 represents a static instantaneous overcurrent relay of the present invention which operates on the second current peak greater than or equal to pick up level.
Fig. 4 is a circuit diagram of a portion of the instantaneous overcurrent relay shown in Fig. 1.
Referring initially to Figs. 1 and 2, one form of static instantaneous overcurrent relay of the present invention is generally designated 10. The portion of the circuit 10 shown in dashed lines in Fig. 1 will be discussed later. For purposes of clarity, Figs. 2A-2F are vertically classified 1, 11, 111. Unless otherwise specified, reference simply to Figs. 2A-2F represents the vertical classification l.
The relay circuit 10 includes a level detector 12 for receiving an input signal A. In one form of the present invention, the input signal A is representative of the absolute value of current in the protected a-c power line (not shown). 105 Typically, a current transformer is coupled to the protected line (not shown). Preferably, the input signal A is in the form of a full wave rectified signal, as shown in Fig. 2A. The level detector 12 functions to develop a pulse signal output B shown in Fig. 2B, whenever the input signal A is equal to or greater than a predetermined magnitude. This predetermined magnitude is set to represent the desired pick up level and is shown in Figs. 2A as 1 pu.
The output signal B of the level detector 12 is coupled to intermediate signal processing means 14 which functions to fix the time duration of the pulse signal B of Fig. 213 for a predetermined time period T1 following the initiation of the pulse signal B. The predetermined time period T1 is shown in Fig. 2C. In view of its operation, the intermediate signal processing means 14 may be conveniently referred to as a multivibrator, or, as a ---oneshot device". The output signal C of the one shot device 14 is coupled directly to AND circuit 1.6 and also coupled to AND circuit '16 through delay circuit 18. The delay circuit 18 receives the output signal C, and when signal C goes to zero, after predetermined time period T1, delay circuit 18 develops a delayed signal D. Delayed signal D is developed after a predetermined delay period T2, e.g., 1 ms. The duration of delayed signal D, hereinafter T3, is independent of signal input A.
Typically, the duration T3 of delayed signal D is at least about 1 cycle or 20ms, with about 25ms being preferable. AND circuit 16 thus receives signals C and D and develops an output signal E, shown in Fig. 2E, during coincidence of signals C and D.
In Fig. 1, output signal E is shown directed to OR circuit 20 long with several other inputs which will be discussed later. The output of OR circuit 20 is output signal F, representing the output signal of the relay circuit 10. In order to employ this output signal F to trip a relay, seal-in means 22 are provided. The function of seal-in means 22 is merely to extend the duration of pulse signal E which is typically of about a millisecond in duration into the output signal F which is typically of about 20ms. This 20ms signal is generally sufficient to trip a coil.
The predetermined time periods of T1, T2, and T3 are preferably chosen such that the output signal E of Fig. 2E is developed on the second peak of the input signal A which is greater than or equal to the pick up value of 1 pu. This causes the relay output signal F to be developed on the second peak of the input signal A which is greater than or equal to 1 pu and results in relay pick up on such second peak. To accomplish this second peak pick up in a typical 50 or 60 cycle power system, T1, T2, and T3 are typically related as follows:
T1 + T2 < 8ms, T3 > 20ms. In a preferred static instanteous overcurrent relay of the present invention, for a 50-60 Hz power system, T1 is from about 1 to about 7ms, T2 is about.5ms, and T3 is about 25ms.
In the vertical classification 1 of Figs. 2A-2F previously referred to, the three consecutive peaks of the input signal A were of the same value, this value being the pick up value. Referring now to vertical clasification 11 of Figs. 2A-2F, note that in this case, the first two peaks of input signal A exceed the pick up value 1 pu for a greater time period than the third peak. As in classification 1, the output signal E of Fig. 2E is developed at the second peak of input signal A which reaches the pick up value.
Referring now to classification 111 of Figs. 2A-2F, here the input signal A is shown with a first peak greater than the pick up value, a second peak less than the pick up value, and a third peak greater than the pick up value. In this case, the level detector 12 develops its output signal B only for the first and third peaks, as shown in Fig. 2B. The intermediate signal processing means 14 (one shot device) thus develops its output signal C only in connection with the first and third peaks. The delay circuit 18 develops its output signal D at time T2 following the first shot output signal C. The output signals C and D are coupled to the AND circuit 16 which produces its output signal E when output signal C and Dare coincident. In this t.
3 case, such coincidence occurs at the second peak of input signal A which is greater than or equal to the pick up value. Note, however, that the second peak of A which is of pick up value.is actually separated from the first peak of pick up value by a second peak of A which is less than pick up value.
The advantage of the above described second peak operation of the relay circuit 10 of Fig. 1 may be better appreciated by considering the following expression, representing the fault current 1 in the protected line:
(1) E 1 = -[sin(wt-A-0)-e sin(A-0)l Z -wt/tano where E = power system voltage -Z = power system impedance A = angle of the voltage at fault initiation 80 0 = characteristic angle between system voltage and system current t = iime w = A7rf; f being frequency Expression (1) may be viewed as comprising a 85 steady state portion:
(2) sin (wt -A-0), and a transient portion:
(3) _jwt/tanO sin Note that the transient portion of expression (3) 90 approaches a zero value when t approaches infinity and approaches a maximum value when 0 = 901 and A = 01. This corresponds to the maximum transient overreach of 50% for a relay fast enough to respond to the instantaneous magnitude of the current in the protected line. The worst case, or maximum transient value, is therefore found at A = 0'. Accordingly, the following expression represents the worst case transient form of expression (1), with E/E being normalized to 1:
(4) 1 = sin (wt - 0)-,-wt/tanO sin (-0), GB 2 044 024 A 3 Referring now to a typical power distribution circuit, where the line angle 0 is typically between 551 and 751, and A is typically between 01-3600. Note in curve 2 (second peak pick up) that the worst case of transient overreach percentage (at A = 00) is less than 8% while the instantaneous overcurrent relay shown in curve 1 (first peak pick up) has a transient overreach percentage over this same line angle range as great as 31 %. It is to be appreciated that other incident angles A from 00-3601> will have a transient overreach percentage even lower than that shown in curve 2. It is to be further appreciated that the curve 2 depiction of the operation of one form of static instantaneous overcurrent relay of the present invention is quite similar to the type of transient overreach curve exhibited by electromechanical relays having the previously mentioned built-in inertia[ delay.
Referring again to Fig. 1, the portion thereof shown in dashed lines will now be discussed.
Input signal A is also coupled to a second level detector 24 which is similar to first level detector 12. Second level detector 24 is set to detect high level currents so as to provide a minimum trip time for high level faults. Typically, if the setting on the level detector 12 is normalized to 1 pu, the setting on high level detector 24 will be set at about 2,1 pu. The output signal of the high level detector 24 is similar to the output signal of the level detector 12. For this reason, the output signal of the level detector 24 is designated W. The output signal B' may be coupled to OR circuit 20 through an AND circuit 26. The AND circuit 26 may include as a second input thereto a control or supervision signal, such as a supervision signal from a time overcurrent relay circuit. Such a control signal is simply designated TOC. Thus, the dashed line portions of Fig. 1 represent a bypass circuit means for providing reduced trip time for high level faults. It is to be appreciated that AND circuit 26 may be omitted wherein the high level detector output signal B' may be coupled directly to OR circuit 20. This latter configuration will still provide the above mentioned bypass operation for high level fault conditions.
Referring now to Fig. 4, a circuit diagram, generally designated 30, of a portion of the static overcurrent relay 10 shown in Fig. 1 will now be discussed.
The circuit 30 includes a first resistor R to receive the current signal from the protected line (not shown) and to convert this signal into a voltage signal (input signal A). Resistor R1 couples this voltage signal to the inverting input of a voltage comparator 32, with a non-inverting input being coupled to a variable voltage source (V,,,) for setting the level of detection. The voltage comparator 32 functions as the first level detector 12 of Fig. 1. The output of voltage comparator 32. is coupled to a positive d.c. potential through pullup resistor R2. The function of the positive potential and pull-up resistor R2 is to cause the level detector output signal to reach a value of about 1 5V d.c. when the predetermined level (Vpu) with t = 0 at fault initiation.
Referring now to Fig. 3, expression (4) is solved 105 for various line angles 0. The percent transient overreach (TOR) is then calculated at each of these line angles 0. More particularly, the dashed line, curve 1, in Fig. 3 represents the transient overreach percent (TOR) as a function of line angle 0 when expression 4 is solved for a time t equal to the first peak greater than or equal to the pickup value, which has been taken as 1. Curve 2, the solid line, represents the transient overreach percent (TOR) as a function of line angle 0 when expression 4 is solved for a time t equal to the second peak greater than or equal to the pick up value, again taken at 1. Thus, it can be observed that curve 1 represents a static instantaneous overcurrent relay with a generally undesirably high 120 transient overreach percentage while curve 2 represents one form of static instantaneous overcurrent relay of the present invention having a reduced transient overreach percentage.
4 GB 2 044 024 A 4 is obtained. The output signal of voltage comparator 32 is filtered through an RC network comprising resistor R3 and capacitor Cl. The now-filtered signal is further squared by coupling resistor R4 to the inverting input of a second voltage comparator 34. Voltage comparator 34 is set at a level less than the previously mentioned volts d.c., e.g., V, about 5 volts d.c. The output of voltage comparator 34 is provided with a pull up resistor, such as 112. The output signal of 75 voltage comparator 34 represents the signal output B of Figs. 1 and 2B.
The output signal B of voltage comparator 34 is coupled through resistor R5 to pulse processing means 36 (one shot device). The presence of output signal B at the input of one shot device 36 causes one shot device 36 to develop an output signal C which continues for a time period Tl determined by the RC network R6-C2. This time period Tl is shown in Fig. 2C. To ensure that the output signal C of the one shot device 36 is present only when the level detector signal B is present, another output signal C of one shot device 36 is coupled to a second input (1o) of the one shot device through an OR device. This coupling may be in the form of the arrangement shown in Fig. 4 wherein resistors Ro, capacitor Co, and an OR device are employed. The output signal C of one shot device 36 is next divided into two branches, each of which is coupled through an AND gate which comprises diodes D2, D3. One branch of the output signal C of one shot device 36 is coupled directly through diode D2 while a second branch of the output signal C of one shot device 36 is coupled through resistor R8 into the base of transistor T1. The cnllector of transistor T1 is coupled to positive potential through an RC network comprising R9 and C3. RC network R9C3 provides the previously discussed time delay T2 (see Fig. 2D). The collector of transistor T, is further coupled to the inverting input of voltage comparator 38 which is set at a threshold level %) of about 5 volts. The output of vo.ltage comparator 38 is coupled through resistor R l 0 to a second one shot device 40. The one shot device 40 is similar to the one shot device 36. The one shot device 40 develops its output signal, which is actually signal output D of Fig. 1 and Fig. 2D. The time duration (T3) of output signal D is determined by RC network Rl 1 C4.
The delayed output signal D of the second one shot device 40 and the output signal C are coupled through AND gate D2, D3 to pull-up resistor R 12 and the base of transistor T2. The collector of transistor T2 is coupled to positive potential through another RC network R l 3C5. The. purpose of this RC network is to take the pulse signal (output signal E) appearing at the base of transistor T2 and to convert it into a longer time period signal. Note that the presence of output signal E represents a condition where two peaks of input signal A have reached the pick-up value. More particularly, the pulse signal (output signal E) appearing at the base of transistor T2 is generally ineffective in time duration to trip a relay coil, i.e., output signal E is typically about 1-7 ms. Accordingly, the FIC network R 1 3C5 is provided to extend the duration of the pulse signal for about Tl = 15ms, i.e., a total time of about 20ms. This extended duration signal appearing at the collector of transistor T2 is coupled to voltage comparator 42 which is set at a level (VR) of about volts to provide a squaring effect to the trip signal. The output of voltage comparator 42 is couplerd to positive potential through another pull up resistor Rl 4, resulting in signal output F (see Fig. 2F). As mentioned previously, such pull up resistors assume that the output of each device so connected assumes one of two discrete levels.
Although the circuit 30 of Fig. 4 has been illustrated in connection with discrete devices, it is to be appreciated that commercially available integrated circuits may be conveniently employed to provide the functions depicted therein. In this connection, a single integrated circuit designated #239, commercially available from: Fairchild Camera & Instrument Corp., Mountain View, Ca.; National Semiconductor Corp., Santa Clara, Ca.; and Signetics Corp., Sunnyvale, Ca., may be employed to provide the four voltage comparators 32, 34, 38,42. Similarly, a single integrated circuit designated #4538, commercially available from: Fairchild Camera Ef Instrument Corp.; Motorola Semiconductor Inc., Az.; and Solid State Scientific Inc., Pa., may be employed to provide the two "one shot" signal processing means 36, 40.
Although the present invention has been illustrated in connection with the processing of an 100: input signal A, representative of the current in a single protected a-c power line, other embodiments are available. For example, input signal A may comprise a three phase input signal. In such an application, for 50-60 hertz, three phase operation, the time period Tl can be set at about 7ms so as to discriminate between peaks such that the relay circuit would operate no sooner than the second peak in the same phase. Further, after the first peak of pick up level on one ll() phase, this relay will operate on a second peak of pick up level from the other two phases. An advantage of this three phase embodiment is that only a single measuring unit, i.e., relay circuit, need be employed. Similarly, the present invention may be employed in other multi-phase applications.
Also, as previously indicated, the static instantaneous overcurrent relay of the present invention may include further signal processing 120. means, such as additional supervision signals. Similarly, the output signal of the relay of the present invention may include further signal processing means such as inhibit means for temporarily inhibiting the development of the output signal for a predetermined time period. This temporary inhibition of the relay output signal (signal F of Fig. 1) may be desirable for system coordination purposes. Typically, this temporary inhibition is in the order of about 1 ms to about 1 sec.
R GB 2 044 024 A 5 It is to be appreciated that the reduced 65 transient overreach percentage provided by the static instantaneous overcurrent relay of the present invention does not suffer from disadvantages associated with the previously mentioned technique of simply delaying the operation of the relay for a time period sufficient to reduce the transient overreach percentage to an acceptable level. For example, referring again to vertical classification Ill of Figs. 2A-2F, note that, if a fixed delay time period of 1 Oms were inserted after the first peak of pick up level, the relay would not operate properly because the second peak of pick up level in Ill occurs 20ms later than the first peak of pick up level. Further, if, instead of 1 Oms, a fixed delay time period of 20ms were inserted, although the relay would now operate properly under the classification Ill fault condition, such a relay would have an operating time of no less than 20ms. However, the static instantaneous overcurrent relay of the present invention provides 85 proper operation for the fault condition in 111 with a minimum operating time of 1 Oms, i. e., 1/2 cycle of source frequency.
Claims (20)
1. A static instantaneous overcurrent relay for use in protecting an AC power line from overcurrents, the relay comprising: level detector means for detecting input pulses exceeding a predetermined threshold level, and means responsive to the output of the detector means for temporarily inhibiting operation of the relay until at least two input pulses are detected.
2. A relay in accordance with Claim 1 in which the relay is inhibited until two input pulses are detected within a predetermined period.
3. A relay in accordance with Claim 2 in which the level detector means includes intermediate signal processing means for determining the duration T1 of a discrete output signatfrorn the detector when an input pulse is detected.
4. A relay in accordance with Claim 3 in which said temporary inhibit means comprises: a relay circuit for developing a delayed signal a predetermined time T2 after the termination of an 110 output signal from the detector and before the detection of a further input pulse, said delayed signal having a predetermined time duration T3, and gating means for receiving both the delayed Ejo signal and each non-delayed detector output signal, the gating means enabling operation of the relay when the delayed signal and a subsequent non-delayed signal are substantially coincident.
5. A relay in accordance with Claim 4 in which the sum of said time periods T1 and T2 is less than 8ms and said predetermined time duration T3 is greater than or equal to 20ms.
6. A relay in accordance with Claim 5 for a 50-60 hertz power system in which said predetermined time period T1 is from substantially 125 1 ms to substantially 7ms and said predetermined time duration T3 is substantially 25ms.
7. A relay in accordance with Claim 5 in which said relay has a transient overreach percentage of less than 10% for line angjes up to 750.
8. A relay in accordance with Claim 4 in which the relay enabling signal is continued for a predetermined time after its initiation.
9. A relay in accordance with any one of the preceding claims further comprising means for bypassing the temporary inhibit means when the magnitude of the input to the detector reaches a predetermined value greater than the predetermined threshold level. 75
10. A relay in accordance with any one of the preceding claims in which the relay is temporarily inhibited for a predetermined time period.
11. A relay in accordance with Claim 4 wherein the predetermined time period T1 is of a value such that the relay enabling signal is developed by the gating means not before two discrete detector output signals have been received for one phase of a three phase input and wherein the second discrete output signal may be provided by one of the other two phases.
12. A relay in accordance with Claim 11 for a 50-60 hertz system in which said predetermined time period is 7ms.
13. A relay in accordance with any one of the preceding claims in which said input pulse is in the form of a voltage pulse and in which said level detector means includes a voltage comparator.
14. A relay in accordance with Claim 4 in which the level detector means includes a multivibrator for determining the predetermined time period T1.
15. A relay in accordance with Claim 4 in which the delay circuit includes a multivibrator for determining the predetermined time duration T3.
16. A static instantaneous overcurrent relay for use in protecting an AC power line from overcurrents, the relay comprising means for partially enabling the relay in response to an input pulse exceeding a predetermined threshold level, and means for thereafter inhibiting operation of the relay until receipt of at least one further input pulse exceeding the said threshold level.
17. A static instantaneous overcurrent relay with reduced transient overreach for use in protecting an a-c power line from overcurrents wherein the relay receives an input signal representative of the magnitude of the current in the a-c power line and develops a relay output signal when the magnitude of the current in the a-c power line reaches a predetermined magnitude, which comprises:
a) level detector circuit means for receiving the input signal representative of the magnitude of current in the a-c power line, said input signal being in the form of a pulsating waveform having substantially the same frequency as the frequency of the a-c power line, said pulsating waveform comprising a plurality of discrete pulses, said level detector circuit means developing a discrete level detector output signal in response to each one of said discrete pulses of said pulsating waveform which attains a magnitude representative of the predetermined magnitude of the current in the a-c power line, and b) output circuit means coupled to receive said 6 GB 2 044 024 A 6 discrete level detector output signals, said ouput circuit including temporary inhibit means for temporarily inhibiting the development of said relay output signal until said output circuit has received at least two of said discrete level detector output signals representative of the predetermined magnitude of the current in the a-c power line.
18. A method of protecting an AC power line from overcurrents, the method comprising:
generating a pulse waveform having a frequency substantially equal to the frequency of the AC power line and comprising a sequence of discrete pulses representative of the magnitude of the current in the power line, feeding the pulse waveform to the input of a static instantaneous overcurrent relay, detecting an input pulse which exceeds a predetermined threshold level representing an overcurrent in the power line, and temporarily inhibiting operation of the relay until at least one further input pulse has been detected.
19. A relay according to Claim 1 and substantially as herein described with reference to the accompanying drawings.
20. A method according to Claim 17 and substantially as herein described with reference to the accompanying drawings.
Printed for Her Majesty's Stationery Office by the Couner Press, Leamington Spa, 1980. Published by the Patent Office, 25 Southampton Buildings, London, WC2A lAY, from which copies maybe obtained.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/021,143 US4255774A (en) | 1979-03-16 | 1979-03-16 | Static instantaneous overcurrent relay with low transient overreach |
Publications (2)
Publication Number | Publication Date |
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GB2044024A true GB2044024A (en) | 1980-10-08 |
GB2044024B GB2044024B (en) | 1983-04-20 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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GB8006997A Expired GB2044024B (en) | 1979-03-16 | 1980-02-29 | Overcurrent relays |
Country Status (11)
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US (1) | US4255774A (en) |
BR (1) | BR8000572A (en) |
CH (1) | CH658148A5 (en) |
DE (1) | DE3009581A1 (en) |
ES (1) | ES8103469A1 (en) |
FR (1) | FR2451651B1 (en) |
GB (1) | GB2044024B (en) |
IN (1) | IN151644B (en) |
IT (1) | IT1130928B (en) |
MX (1) | MX147633A (en) |
SE (1) | SE442693B (en) |
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DE1802543A1 (en) * | 1968-10-11 | 1970-05-27 | Continental Elektro Ind Ag | Device for monitoring overcurrents and overvoltages |
DE2144839C3 (en) * | 1971-09-08 | 1980-10-23 | Hartmann & Braun Ag, 6000 Frankfurt | Method and circuit arrangement for fault monitoring in a busbar |
US3735377A (en) * | 1971-03-19 | 1973-05-22 | Phillips Petroleum Co | Monitoring and shutdown apparatus |
SE373239B (en) * | 1973-05-21 | 1975-01-27 | Asea Ab | |
US3836790A (en) * | 1973-08-22 | 1974-09-17 | Lorain Prod Corp | A-c voltage detector |
IT1026679B (en) * | 1973-12-22 | 1978-10-20 | Amp Inc | PROTECTION CIRCUIT AGAINST SHORT CIRCUITS |
US3883782A (en) * | 1974-05-31 | 1975-05-13 | Robert W Beckwith | Overcurrent relay circuit |
US4034269A (en) * | 1975-12-12 | 1977-07-05 | General Electric Company | Protective relay circuits |
US4092690A (en) * | 1977-01-31 | 1978-05-30 | General Electric Company | Protective relay circuit providing a combined distance and overcurrent function |
US4152744A (en) * | 1977-06-17 | 1979-05-01 | Gould Inc. | Solid state tripping circuit |
-
1979
- 1979-03-16 US US06/021,143 patent/US4255774A/en not_active Expired - Lifetime
-
1980
- 1980-01-24 BR BR8000572A patent/BR8000572A/en not_active IP Right Cessation
- 1980-01-24 IN IN89/CAL/80A patent/IN151644B/en unknown
- 1980-02-29 GB GB8006997A patent/GB2044024B/en not_active Expired
- 1980-03-07 IT IT20436/80A patent/IT1130928B/en active
- 1980-03-12 ES ES489474A patent/ES8103469A1/en not_active Expired
- 1980-03-13 DE DE19803009581 patent/DE3009581A1/en active Granted
- 1980-03-14 CH CH2051/80A patent/CH658148A5/en not_active IP Right Cessation
- 1980-03-14 FR FR8005761A patent/FR2451651B1/en not_active Expired
- 1980-03-14 MX MX181592A patent/MX147633A/en unknown
- 1980-03-14 SE SE8002030A patent/SE442693B/en not_active IP Right Cessation
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0260120A2 (en) * | 1986-09-10 | 1988-03-16 | S & C ELECTRIC COMPANY | Control circuit with coordination provisions |
EP0260120A3 (en) * | 1986-09-10 | 1989-11-02 | S & C ELECTRIC COMPANY | Control circuit with coordination provisions |
FR2649554A1 (en) * | 1989-07-10 | 1991-01-11 | Gen Electric | ELECTRONIC CIRCUIT BREAKER USING A DIGITAL CIRCUIT WHICH HAS AN INSTANT TRIP POSSIBILITY |
Also Published As
Publication number | Publication date |
---|---|
IT1130928B (en) | 1986-06-18 |
GB2044024B (en) | 1983-04-20 |
FR2451651A1 (en) | 1980-10-10 |
IT8020436A0 (en) | 1980-03-07 |
ES489474A0 (en) | 1981-02-16 |
CH658148A5 (en) | 1986-10-15 |
DE3009581A1 (en) | 1980-09-25 |
FR2451651B1 (en) | 1985-06-21 |
MX147633A (en) | 1983-01-03 |
SE442693B (en) | 1986-01-20 |
US4255774A (en) | 1981-03-10 |
SE8002030L (en) | 1980-09-17 |
DE3009581C2 (en) | 1992-07-09 |
IN151644B (en) | 1983-06-18 |
ES8103469A1 (en) | 1981-02-16 |
BR8000572A (en) | 1980-10-21 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 19950228 |