GB2013002A - Improvements in error correction devices - Google Patents
Improvements in error correction devicesInfo
- Publication number
- GB2013002A GB2013002A GB7901459A GB7901459A GB2013002A GB 2013002 A GB2013002 A GB 2013002A GB 7901459 A GB7901459 A GB 7901459A GB 7901459 A GB7901459 A GB 7901459A GB 2013002 A GB2013002 A GB 2013002A
- Authority
- GB
- United Kingdom
- Prior art keywords
- shift register
- values
- bit
- likelihood
- repeated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
- H03M13/1111—Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
- H03M13/1111—Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms
- H03M13/1114—Merged schedule message passing algorithm with storage of sums of check-to-bit node messages or sums of bit-to-check node messages, e.g. in order to increase the memory efficiency
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1191—Codes on graphs other than LDPC codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/3746—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35 with iterative decoding
- H03M13/3753—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35 with iterative decoding using iteration stopping criteria
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/37—Decoding methods or techniques, not specific to the particular type of coding provided for in groups H03M13/03 - H03M13/35
- H03M13/45—Soft decoding, i.e. using symbol reliability information
- H03M13/458—Soft decoding, i.e. using symbol reliability information by updating bit probabilities or hard decisions in an iterative fashion for convergence to a final decoding result
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6597—Implementations using analogue techniques for coding or decoding, e.g. analogue Viterbi decoder
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
Abstract
A codeword generated by a feedback shift register and received after transmission over a noisy channel is stored in a shift register 5 as a set of analogue voltages (or digitised versions thereof). With binary values initially represented as equal voltages of opposite polarity, the value Ii in each shift register stage represents, according to its sign, the likelihood of the corresponding codeword bit being 0 or 1 &cirf& The likelihood values for a given bit bi and two further bits bi+s, bi+t, with which the bit bi has a known parity relationship, are used to compute (6) an enhanced likelihood value Ii' for re-insertion into the shift register 5 or insertion into another shift register for subsequent processing. All values Ii are thus treated in turn for N</=i</=o and the process repeated for a different pair of s and t, (though all pairs s,t could be run through for bi before passing on to the next bit). The entire process is repeated for as many times as is necessary for the values Ii' of at least the data bits to exceed a pre- set threshold. <IMAGE>
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB7901459A GB2013002B (en) | 1978-01-05 | 1979-01-15 | Error correction devices |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB27678 | 1978-01-05 | ||
GB7901459A GB2013002B (en) | 1978-01-05 | 1979-01-15 | Error correction devices |
Publications (2)
Publication Number | Publication Date |
---|---|
GB2013002A true GB2013002A (en) | 1979-08-01 |
GB2013002B GB2013002B (en) | 1982-03-17 |
Family
ID=26235812
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB7901459A Expired GB2013002B (en) | 1978-01-05 | 1979-01-15 | Error correction devices |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB2013002B (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0963049A2 (en) * | 1998-06-01 | 1999-12-08 | Her Majesty The Queen In Right Of Canada as represented by the Minister of Industry | Interleaving with golden section increments |
US6339834B1 (en) | 1998-05-28 | 2002-01-15 | Her Majesty The Queen In Right Of Canada, As Represented By The Minister Of Industry Through The Communication Research Centre | Interleaving with golden section increments |
-
1979
- 1979-01-15 GB GB7901459A patent/GB2013002B/en not_active Expired
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6339834B1 (en) | 1998-05-28 | 2002-01-15 | Her Majesty The Queen In Right Of Canada, As Represented By The Minister Of Industry Through The Communication Research Centre | Interleaving with golden section increments |
EP0963049A2 (en) * | 1998-06-01 | 1999-12-08 | Her Majesty The Queen In Right Of Canada as represented by the Minister of Industry | Interleaving with golden section increments |
EP0963049A3 (en) * | 1998-06-01 | 2001-03-28 | Her Majesty The Queen In Right Of Canada as represented by the Minister of Industry | Interleaving with golden section increments |
Also Published As
Publication number | Publication date |
---|---|
GB2013002B (en) | 1982-03-17 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
Møller | Quasi double-precision in floating point addition | |
AU3485989A (en) | Dynamic feedback arrangement scrambling technique keystream generator | |
AU8859282A (en) | Data processing using symbol correcting code | |
MY124888A (en) | Baseband processors and methods and systems for decoding a received signal having a transmitter or channel induced coupling between bits | |
AU552692B2 (en) | Error correction method for the transfer of blocks of data bits | |
EP0092960A3 (en) | Apparatus for checking and correcting digital data | |
GB2263213A (en) | Coded qam system | |
GB2013002A (en) | Improvements in error correction devices | |
GB981296A (en) | Improvements in or relating to digital registers | |
US4193062A (en) | Triple random error correcting convolutional code | |
MY106736A (en) | Decoder apparatus. | |
SU1605935A3 (en) | Method and apparatus for recoding m-digit coded words | |
DE3882114D1 (en) | METHOD FOR TRANSMITTING A DIGITAL SIGNAL. | |
De Agostino | A parallel decoding algorithm for LZ2 data compression | |
Chilvers | A consistent model for operations on directed numbers | |
JPS5736343A (en) | Operation processing circuit | |
KR900001837B1 (en) | Decoding method for cyclic code and encoder/decoder | |
ES550323A0 (en) | DEVICE FOR THE TRANSMISSION OF SIGNS THROUGH KEYWORDS OF A TELEGRAPH ALPHABET, ESPECIALLY THE INTERNATIONAL TELEGRAPH ALPHABET N 2 | |
GB1528954A (en) | Digital attenuator | |
JPS56114043A (en) | Code converting circuit | |
GB2041589A (en) | Method and apparatus for binary word recognition | |
GB2007468A (en) | Binary data transmission method and corresponding encoding and decoding devices | |
ES2074058T3 (en) | PROCEDURE FOR THE TREATMENT OF SUPERVISABLE BINARY CODED WORDS IN THE PARITY, WHICH EXPERIENCE IN THE COURSE OF THEIR TRANSMISSION A DIGITAL ATTENUATION AND / OR CODE CONVERSION. | |
SU666539A1 (en) | Device for analysis of binary code combinations | |
TW368781B (en) | Signal decoding for either Manhattan or Hamming metric based Viterbi decoders |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PCNP | Patent ceased through non-payment of renewal fee |