GB2011669B - Programmable logic array adders - Google Patents
Programmable logic array addersInfo
- Publication number
- GB2011669B GB2011669B GB7845544A GB7845544A GB2011669B GB 2011669 B GB2011669 B GB 2011669B GB 7845544 A GB7845544 A GB 7845544A GB 7845544 A GB7845544 A GB 7845544A GB 2011669 B GB2011669 B GB 2011669B
- Authority
- GB
- United Kingdom
- Prior art keywords
- programmable logic
- logic array
- array adders
- adders
- programmable
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/50—Adding; Subtracting
- G06F7/505—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination
- G06F7/5057—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination using table look-up; using programmable logic arrays
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Pure & Applied Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computing Systems (AREA)
- Mathematical Optimization (AREA)
- General Engineering & Computer Science (AREA)
- Error Detection And Correction (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US86668878A | 1978-01-03 | 1978-01-03 |
Publications (2)
Publication Number | Publication Date |
---|---|
GB2011669A GB2011669A (en) | 1979-07-11 |
GB2011669B true GB2011669B (en) | 1982-01-13 |
Family
ID=25348172
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB7845544A Expired GB2011669B (en) | 1978-01-03 | 1978-11-22 | Programmable logic array adders |
Country Status (4)
Country | Link |
---|---|
JP (1) | JPS5495137A (en) |
DE (1) | DE2855947A1 (en) |
FR (1) | FR2413714A1 (en) |
GB (1) | GB2011669B (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4506341A (en) * | 1982-06-10 | 1985-03-19 | International Business Machines Corporation | Interlaced programmable logic array having shared elements |
US4942548A (en) * | 1987-06-25 | 1990-07-17 | International Business Machines Corporation | Parallel adder having removed dependencies |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1322657A (en) * | 1971-09-10 | 1973-07-11 | Ibm | Adders |
-
1978
- 1978-11-22 GB GB7845544A patent/GB2011669B/en not_active Expired
- 1978-12-12 JP JP15276178A patent/JPS5495137A/en active Pending
- 1978-12-20 FR FR7836584A patent/FR2413714A1/en not_active Withdrawn
- 1978-12-23 DE DE19782855947 patent/DE2855947A1/en not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
JPS5495137A (en) | 1979-07-27 |
FR2413714A1 (en) | 1979-07-27 |
DE2855947A1 (en) | 1979-07-05 |
GB2011669A (en) | 1979-07-11 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PCNP | Patent ceased through non-payment of renewal fee |