GB201010850D0 - Digital receivers - Google Patents
Digital receiversInfo
- Publication number
- GB201010850D0 GB201010850D0 GBGB1010850.4A GB201010850A GB201010850D0 GB 201010850 D0 GB201010850 D0 GB 201010850D0 GB 201010850 A GB201010850 A GB 201010850A GB 201010850 D0 GB201010850 D0 GB 201010850D0
- Authority
- GB
- United Kingdom
- Prior art keywords
- digital receivers
- receivers
- digital
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0054—Detection of the synchronisation error by features other than the received signal transition
- H04L7/007—Detection of the synchronisation error by features other than the received signal transition detection of error based on maximum signal power, e.g. peak value, maximizing autocorrelation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/0807—Details of the phase-locked loop concerning mainly a recovery circuit for the reference signal
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03006—Arrangements for removing intersymbol interference
- H04L25/03012—Arrangements for removing intersymbol interference operating in the time domain
- H04L25/03019—Arrangements for removing intersymbol interference operating in the time domain adaptive, i.e. capable of adjustment during data reception
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
- H04L7/0334—Processing of samples having at least three levels, e.g. soft decisions
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB1010850.4A GB2481593B (en) | 2010-06-28 | 2010-06-28 | Digital receivers |
GB1619480.5A GB2541323B (en) | 2010-06-28 | 2010-06-28 | Digital receivers |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB1010850.4A GB2481593B (en) | 2010-06-28 | 2010-06-28 | Digital receivers |
Publications (3)
Publication Number | Publication Date |
---|---|
GB201010850D0 true GB201010850D0 (en) | 2010-08-11 |
GB2481593A GB2481593A (en) | 2012-01-04 |
GB2481593B GB2481593B (en) | 2016-12-28 |
Family
ID=42583096
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB1010850.4A Active GB2481593B (en) | 2010-06-28 | 2010-06-28 | Digital receivers |
GB1619480.5A Active GB2541323B (en) | 2010-06-28 | 2010-06-28 | Digital receivers |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB1619480.5A Active GB2541323B (en) | 2010-06-28 | 2010-06-28 | Digital receivers |
Country Status (1)
Country | Link |
---|---|
GB (2) | GB2481593B (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2498940A (en) * | 2012-01-31 | 2013-08-07 | Texas Instruments Ltd | Optimising parameters in a data receiver using data waveform eye height measurements |
US11606082B2 (en) | 2021-05-20 | 2023-03-14 | International Business Machines Corporation | Adjustable phase shifter |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4789994A (en) * | 1987-08-12 | 1988-12-06 | American Telephone And Telegraph Company, At&T Bell Laboratories | Adaptive equalizer using precursor error signal for convergence control |
JP2692281B2 (en) * | 1989-07-31 | 1997-12-17 | ソニー株式会社 | Data processing device |
US6084931A (en) * | 1997-10-31 | 2000-07-04 | Motorola, Inc. | Symbol synchronizer based on eye pattern characteristics having variable adaptation rate and adjustable jitter control, and method therefor |
US6731697B1 (en) * | 2000-10-06 | 2004-05-04 | Cadence Desicgn Systems, Inc. | Symbol timing recovery method for low resolution multiple amplitude signals |
US6930628B2 (en) * | 2001-05-03 | 2005-08-16 | Coreoptics, Inc. | Amplitude detection for controlling the decision instant for sampling as a data flow |
GB2397982B (en) * | 2003-01-28 | 2005-11-23 | Phyworks Ltd | Receiver |
US7362837B2 (en) * | 2003-08-29 | 2008-04-22 | Intel Corporation | Method and apparatus for clock deskew |
DE102006020107B3 (en) * | 2006-04-29 | 2007-10-25 | Infineon Technologies Ag | Data receiver for use in serial data transmission system of e.g. semiconductor memory, has sampling unit connected with data signal input for sampling data signal amplitude and amplifying sampled data signal amplitude to specific value |
US8015429B2 (en) * | 2008-06-30 | 2011-09-06 | Intel Corporation | Clock and data recovery (CDR) method and apparatus |
US8199702B2 (en) * | 2008-12-26 | 2012-06-12 | Rockstar Bidco Lp | Baseband recovery in wireless networks, base transceiver stations, and wireless networking devices |
-
2010
- 2010-06-28 GB GB1010850.4A patent/GB2481593B/en active Active
- 2010-06-28 GB GB1619480.5A patent/GB2541323B/en active Active
Also Published As
Publication number | Publication date |
---|---|
GB2481593B (en) | 2016-12-28 |
GB2541323A (en) | 2017-02-15 |
GB2541323B (en) | 2017-05-24 |
GB201619480D0 (en) | 2017-01-04 |
GB2481593A (en) | 2012-01-04 |
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