GB2002153A - Digital data processing systems - Google Patents

Digital data processing systems

Info

Publication number
GB2002153A
GB2002153A GB7829832A GB7829832A GB2002153A GB 2002153 A GB2002153 A GB 2002153A GB 7829832 A GB7829832 A GB 7829832A GB 7829832 A GB7829832 A GB 7829832A GB 2002153 A GB2002153 A GB 2002153A
Authority
GB
United Kingdom
Prior art keywords
scratch pad
bit
bits
fed
data processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB7829832A
Other versions
GB2002153B (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CTU of Delaware Inc
Original Assignee
Mostek Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mostek Corp filed Critical Mostek Corp
Publication of GB2002153A publication Critical patent/GB2002153A/en
Application granted granted Critical
Publication of GB2002153B publication Critical patent/GB2002153B/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
    • G06F9/4825—Interrupt from clock, e.g. time of day
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7807—System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
    • G06F15/7814—Specially adapted for real time processing, e.g. comprising hardware timers

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Microcomputers (AREA)
  • Bus Control (AREA)

Abstract

A microcomputer which may be implemented by MOS/LSI techniques on a single semiconductor chip includes a data processing system having control logic means 26, means for exchanging data with at least one peripheral device PE through at least one data transfer port 12-18, an ALU 24, and program storage means 22 in which a set of microprograms is stored including at least a first microprogram for controlling the execution of instructions. The ALU 24 has two inputs fed from respective outputs of an 8-bit accumulator 30 and a scratch pad store 40, the latter comprising 64 8-bit registers, and an output 54 fed back to inputs of the accumulator and scratch pad store. The scratch pad store 40 has a 6-bit address input 60 which can be fed with (a) a 6-bit address from an indirect address register 58, (b) four bits from an instruction register 42 and two zero bits, or (c) four bits direct from the control logic means 26 to directly access the lowest 16 scratch pad registers in response to certain instructions. Interrupt processing is also described. <IMAGE>
GB7829832A 1977-07-15 1978-07-14 Digital data processing systems Expired GB2002153B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US81593277A 1977-07-15 1977-07-15

Publications (2)

Publication Number Publication Date
GB2002153A true GB2002153A (en) 1979-02-14
GB2002153B GB2002153B (en) 1982-04-28

Family

ID=25219217

Family Applications (1)

Application Number Title Priority Date Filing Date
GB7829832A Expired GB2002153B (en) 1977-07-15 1978-07-14 Digital data processing systems

Country Status (5)

Country Link
JP (1) JPS5459851A (en)
DE (1) DE2831066A1 (en)
FR (1) FR2397679B1 (en)
GB (1) GB2002153B (en)
IT (1) IT1097953B (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3202757A1 (en) * 1982-01-28 1983-08-04 Jurij Egorovi&ccaron; Moskva &Ccaron;i&ccaron;erin Microcomputer processor
EP0377466B1 (en) * 1982-02-11 2000-03-08 Texas Instruments Incorporated Microcomputer system for digital signal processing
JPS60225959A (en) * 1984-04-25 1985-11-11 Ascii Corp Multiple-function cpu
EP2990373B1 (en) 2014-08-29 2018-10-03 Sidel S.p.a. Con Socio Unico A fluid-agitating tank assembly for a machine for filling containers

Also Published As

Publication number Publication date
DE2831066C2 (en) 1993-06-03
FR2397679B1 (en) 1988-02-26
DE2831066A1 (en) 1979-02-01
JPS5459851A (en) 1979-05-14
JPS6261978B2 (en) 1987-12-24
FR2397679A1 (en) 1979-02-09
IT1097953B (en) 1985-08-31
GB2002153B (en) 1982-04-28
IT7825721A0 (en) 1978-07-14

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Legal Events

Date Code Title Description
732 Registration of transactions, instruments or events in the register (sect. 32/1977)
732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)
PE20 Patent expired after termination of 20 years

Effective date: 19980713