GB1596580A - Circuit arrangement for processing pulses - Google Patents
Circuit arrangement for processing pulses Download PDFInfo
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- GB1596580A GB1596580A GB1152078A GB1152078A GB1596580A GB 1596580 A GB1596580 A GB 1596580A GB 1152078 A GB1152078 A GB 1152078A GB 1152078 A GB1152078 A GB 1152078A GB 1596580 A GB1596580 A GB 1596580A
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- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61B—DIAGNOSIS; SURGERY; IDENTIFICATION
- A61B8/00—Diagnosis using ultrasonic, sonic or infrasonic waves
- A61B8/08—Detecting organic movements or changes, e.g. tumours, cysts, swellings
- A61B8/0866—Detecting organic movements or changes, e.g. tumours, cysts, swellings involving foetal diagnosis; pre-natal or peri-natal diagnosis of the baby
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- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61B—DIAGNOSIS; SURGERY; IDENTIFICATION
- A61B5/00—Measuring for diagnostic purposes; Identification of persons
- A61B5/02—Detecting, measuring or recording pulse, heart rate, blood pressure or blood flow; Combined pulse/heart-rate/blood pressure determination; Evaluating a cardiovascular condition not otherwise provided for, e.g. using combinations of techniques provided for in this group with electrocardiography or electroauscultation; Heart catheters for measuring blood pressure
- A61B5/024—Detecting, measuring or recording pulse rate or heart rate
- A61B5/02411—Detecting, measuring or recording pulse rate or heart rate of foetuses
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- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61B—DIAGNOSIS; SURGERY; IDENTIFICATION
- A61B5/00—Measuring for diagnostic purposes; Identification of persons
- A61B5/43—Detecting, measuring or recording for evaluating the reproductive systems
- A61B5/4306—Detecting, measuring or recording for evaluating the reproductive systems for evaluating the female reproductive systems, e.g. gynaecological evaluations
- A61B5/4343—Pregnancy and labour monitoring, e.g. for labour onset detection
- A61B5/4362—Assessing foetal parameters
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- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61B—DIAGNOSIS; SURGERY; IDENTIFICATION
- A61B8/00—Diagnosis using ultrasonic, sonic or infrasonic waves
- A61B8/02—Measuring pulse or heart rate
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R23/00—Arrangements for measuring frequencies; Arrangements for analysing frequency spectra
- G01R23/02—Arrangements for measuring frequency, e.g. pulse repetition rate; Arrangements for measuring period of current or voltage
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R29/00—Arrangements for measuring or indicating electric quantities not covered by groups G01R19/00 - G01R27/00
- G01R29/02—Measuring characteristics of individual pulses, e.g. deviation from pulse flatness, rise time or duration
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- Life Sciences & Earth Sciences (AREA)
- Physics & Mathematics (AREA)
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- Animal Behavior & Ethology (AREA)
- Veterinary Medicine (AREA)
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- Public Health (AREA)
- Engineering & Computer Science (AREA)
- Biomedical Technology (AREA)
- Heart & Thoracic Surgery (AREA)
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- General Health & Medical Sciences (AREA)
- Surgery (AREA)
- Biophysics (AREA)
- Cardiology (AREA)
- Gynecology & Obstetrics (AREA)
- Pregnancy & Childbirth (AREA)
- Radiology & Medical Imaging (AREA)
- Nuclear Medicine, Radiotherapy & Molecular Imaging (AREA)
- General Physics & Mathematics (AREA)
- Physiology (AREA)
- Pediatric Medicine (AREA)
- Reproductive Health (AREA)
- Measuring Pulse, Heart Rate, Blood Pressure Or Blood Flow (AREA)
- Measurement Of Unknown Time Intervals (AREA)
- Ultra Sonic Daignosis Equipment (AREA)
Abstract
On the one hand, a charging/discharging-type store (1) is provided which is recharged at the rate of the pulses from an initial voltage value to final voltage values which differ from the initial value, the final voltage values representing a measure of the pulse spacing. Furthermore, a comparator is provided which compares whether the measured pulse spacing is within a permissible range of fluctuation and which in each case forwards measured pulse spacing to a device for further processing and/or display when the latter situation holds true. Two stores (15, 16) of a plurality of individual stores for the final voltage values of the charging/discharging-type store (1) are connected to a comparison element (18). The latter closes a transit gate (3) if compared storage values are within a permissible range of fluctuation. The gate, which is used for directly or indirectly switching through further final voltage values to the two comparison stores and remaining individual stores (11 to 14) for further processing of the voltage values is only opened again shortly after a time interval which corresponds to the pulse spacing which has previously been detected by the comparator stores (15, 16) as pulse spacing which is correctly within the range of fluctuation. The circuit arrangement is particularly used in foetal heart rate measurement in accordance with the ultrasonic doppler principle. <IMAGE>
Description
(54) A CIRCUIT ARRANGEMENT FOR PROCESSING
PULSES
(71) We. SIEMENS AKTIENGESELL SCE FT, a German company of Berlin and
Munich, Germany (Fed Rep). do hereby declare the invention, for which we pray that a patent may be granted to us, and the method by which it is to be performed, to be particularly described in and by the following statement: The invention relates to a circuit arrangement for ascertaining the pulse spacings and/or repetition frequency of pulses of a pulse train, for example trigger pulses from ultrasonic Doppler signals produced in measurement of a foetal heart frequency, comprising: a charge/discharge store arranged to have its charge changed in step with said pulses from an initial voltage value to end voltage values different therefrom, the end voltage values being a measure of the pulse spacings; a comparator which is arranged to compare whether the pulse spacings indicated by said end voltage values are in a permissible range of Huctuation and to cause respective ones of said pulse spacings to pass to a device for further processing and/or indication, for example to a mean value former, only when their spacings are in said permissible range of fluctuation.
Pulse trains of the aforesaid kind are often the result of the production of trigger pulses from measured signals where a single trigger signal is derived from each period of the measured signal. Measured signals can be strong or weak in respect of positive or negative amplitude portions in the individual periods of the signal. In addition, multiple oscillations in the course of the amplitude may arise in each positive or negative halfcycle. The result of all this is that the succession of the derived trigger pulses is not regular, but is sometimes even subject to considerable fluctuations. Due to interspersed spurious pulses, which may be caused for example by artifacts, additional faulty assessments may be made in regard to the pulse spacing or the pulse repetition frequency of the pulse train to be examined.
This then leads to evaluation errors, which may result in faulty diagnosis, especially in the case of the measurement of the foetal heart frequency (for example by the ultrasonic Doppler measuring principle), in regard to low or even high heart frequency of the foetus. The trigger signals derived from the foetal heart action may be attended by considerable errors. Due to movements of the mother and of the foetus, the position of the foetal heart in relation to the pick-up constantly varies. The movements not only change the projection of the heart on to the pick-up and hence the form and amplitude of the signals obtained, but they are added to the actual heart movement when they shift boundary surfaces of tissues at speeds of the heart action in the range covered.
According to the present invention there is provided a circuit arrangement for ascertaining the pulse spacings and/or repetition frequency of pulses of a pulse train, for example trigger pulses from ultrasonic Doppler signals produced in measurement of a foetal heart frequency, comprising: a charge/discharge store arranged to have its charge changed in step with said pulses from an initial voltage value to end voltage values different therefrom, the end voltage values being a measure of the pulse spacings: a comparator which is arranged to compare whether the pulse spacings indicated by said end voltage values are in a permissible range of fluctuation and to cause respective ones of said pulse spacings to pass to a device for further processing and/or indication, for example to a mean value former, only when their spacings are in said permissible range of fluctuation; and a plurality of individual stores for the voltage end values produced by the charge/discharge store, at least two of which individual stores are connected to said comparator which is arranged to compare with one another end voltage values of the charge/discharge store which are specifically introduced into the said two individual stores in alternating time succession, said comparator being arranged to close, when the values thus compared are in said permissible fluctuation range. a gate for causing the passage of further voltage end values both to said two individual stores for the next succeeding end value comparison and to the remaining individual stores for the storage for the further processing and/or indication, the gate being arranged to be briefly reopened only after an interval of time which corresponds to the pulse spacing which has been previously acknowledged by said two individual stores as the pulse spacing correctly lying in said fluctuating range.
In operation of the circuit arrangement a constant test is made by means of the comparator as to whether the time spacing two successive pulses of the pulse train lies in a permissible fluctuation range. Only when this is the case is it ensured that succeeding pulses are passed on only when the respective new spacing between two pulses also substantially corresponds to the pulse spacings which have previously been recognised as correctly lying in the fluctuation range. As an indication criterion, there is used the opening time of the gate which is closed by the comparator in each instance and which is reopened only when the previously ascertained spacing time has once expired. A pulse falling into this opening interval of the gate can then be automatically regarded as a correct pulse and thus passed on for further processing.
For a better understanding of the invention and to show how it may be carried into effect reference will now be made, by way of example, to the accompanying drawings in which Figure 1 is a circuit diagram of an embodiment of circuit arrangement according to the invention; and
Figure 2 is a waveform diagram illustrating the variations as a function of time of the most important pulse and signal voltages occurring in the circuit arrangement according to Figure 1.
In the circuit arrangement according to
Figure 1, an input A for the trigger pulses (which are derived from the Doppler signals of a foetal heart) is succeeded by a charge/discharge store 1, a voltage comparator 2 and an electronic (inverting) gate 3. The charge/discharge store 1 consists in the usual manner of a capacitor coupled to a resistance network with diodes, the resistors being successively individually disconnected by the diodes as the voltage decreases on discharge of the capacitor, so that a substantially hyperbolic voltage curve is obtained.
The component elements 4 and 6 constitute bistable trigger stages, while 5 is a monostable trigger stage (holding time 2.7 seconds). There is denoted by 7 an inverting stage, by 8 and 9 an RC element and by 10 a pulse counter. The component elements 11, 12, 13, 14, 15 and 16 are signal stores for storing the voltage end values of the charge/discharge store 1.
For passing the voltage end values of the store 1 to individual store pairs 11 to 16, there is employed a switching device 17 in combination with the counter 10. There is denoted by 18 a comparator by which the voltage end values of the stores 15 and 16 are continuously compared with one another. A mean value former 19 forms the arithmetical mean
U2 from the respective storage values momentarily present in the stores 15 and 16. The component element 20 is a further counter, while the component element 21 is again a bistable trigger stage. There is denoted by 22 a second mean value former which ascertains the present arithmetical mean U3 (of the heart frequency) from values stored in the stores 11 to 14 and recognised as correct.
It will be seen from the basic circuit diagram of Figure 1, in combination with the pulse and voltage waveforms of Figure 2, that the embodiment operates as follows: The first trigger pulse, derived from a heart action, of the pulse train A (duration of such a pulse, for example T=1.5 milliseconds) passes through the open gate 3, the polarity of the pulse being reversed. The signal B of reversed polarity closes the switch 17 for the duration of B for the introduction of the zero value of the voltage U1 of the charge/discharge store 1 into the pulse stores 11 and 15.
By its trailing edge, the pulse B then sets the counter 10 by way of the inverter 7, whereby the switch 17 is activated from the passage to the stores 11 and 15 to the further passage to the stores 12 and 16. The trigger pulse I1 of the pulse train A sets the charge/discharge store 1 simultaneously with the negativegoing edge in the sense that the said store jumps from zero to the maximum value of U1 and thereafter discharges with hyperbolic curve form in the direction of zero.
The succeeding second trigger pulse I2 of the pulse train A frees the switch 17 for its duration through B, so that the instantaneous value of U1 is then written into the stores 12 and 16. The trailing edge ofthe pulse sets the switch 17 to the stores 13 and 15 by way of the inverter 7 and the counter 10. At the same time, the voltage U1 of the charge/discharge store 1 jumps back to the maximum value and thereafter again discharges with hyperbolic curve form in the direction of zero. The discharge end value of the voltage U1 held for the first time in the stores 12 and 16 corresponds to the voltage value which the hyperbola U1 reaches from the start through the trailing edge ofthe first trigger pulse I1 of the pulse train A until the trailing edge of the second pulse I2 of said pulse train. A voltage value proportional to the heart frequency is thus concerned, which has been derived by direct conversion of the measured pulse spacing into the pulse frequency in accordance with the relationf= 1/T.
With the occurrence of the third trigger pulse I3 of the train A, a corresponding cyclic forward stepping takes place. With the third trigger pulse, the storage locations 13 and 15 are occupied by the present value of the voltage Ul; thereafter, the switch 17 is again stepped forwards to passage to the stores 14 and 16. The comparator 18 at the output of the stores 15 and 16 continuously compares with one another the respective voltage values introduced into the stores. If the two compared values differ from one another by not more than, preferably, 12 beats per minute, the stored values are regarded as having been found correct. Of course, a large tolerance span may be permitted in regard to the maximum permissible fluctuation range of the heart beat frequency, so that two appropriate values can also be more rapidly found during an unsteady trend of the curve; with a greater tolerance span, however, there is a greater probability that two successive artifacts (disturbing movement impulses not emanating from the heartbeat) will lie within the tolerance limits and hence might wrongly be utilised as genuine heart trigger pulses for the subsequent mean value formation.
When the third trigger pulse I3 is set up, the two stores 15 and 16 are at the same voltage value. The comparator 18 which compares the voltage values thus generates +H for the first time on the output side, whereby the bistable trigger stage 4 is set at F 0 with the gate 3 then closed, after it has been prepared for the change-over at the end of the second trigger pulse I2 by the counter 10 with +K by way of the bistable trigger stage 6 with + L. At the change-over of the bistable trigger stage 4, however. the second voltage comparator 2 has been brought into readiness, and it then compares the arithmetical mean U2 from the voltage values of the stores 15 and 16 which have for the first time been recognised as correct, with the present value of the voltage U I at the output of the charge/discharge store 1. However, the latter comparator 2 then opens the gate 3, during the lowering of the voltage of Ul, by way of the positive output pulse + D, at the instant and for such a period of time in which the present instantaneous value of Ul and the mean value U2 again differ from one another in magnitude by not more than 12 beats per minute.
The succeeding fourth trigger pulse I4 of the train A, which falls exactly into the opening time of the gate 3, can therefore pass through the gate 3 as long as + D is present at the gate. The meanwhile third end value of the voltage U1 is thus taken up into the stores 14 and 16. At the same time, the switch 17 is again prepared for the reception of the succeeding voltage value by the stores I 1 and 15. On the other hand, the counter 20 is cleared for counting at the change-over of the bistable trigger stage 4 to F = 0, so that it is then set to one by the fourth trigger pulse set up.
The fifth trigger pulse I5 is also recognised as correct, so that the voltage value of U1 thus set up is introduced into the stores 11 and 15 respectively. However, all the stores 11 to 14 are thus occupied by voltage values which have previously been recognised as correct values. At the occurrence of the fifth pulse I5, the counter 20 has been set to 2 by way of the negative-going edge of B. The output + M of the counter 20 then acts on the bistable trigger stage 21 in the sense that it is set at + N on the output side by the trailing edge of B. At the setting to + N, however, the mean value former 22 (adder) is cleared. The output voltage of the mean value former U3 jumps from zero to the present arithmetical mean value of the values stored in the individual stores 11, 12, 13 and 14. After the first correct frequency mean value has been received in the manner described, each further evaluation of values which have been found to be correct takes place continuously.
As described in the foregoing, therefore, the feeding of all the further voltage end values of the charge/discharge store 1 which have been recognised by the comparator 18 as correctly lying in the fluctuation range, into the individual stores 11 to 16 takes place alternately in such manner that an individual store 11, 12, 13, or 14 is always cyclically occupied in the same sequence by a new end value for the further processing of the signal values in the sense of the formation of the mean value together with one of the two comparator stores 15 and 16. In the case of the present embodiment, four individual values in all are employed for the formation of the mean value. This multiple averaging affords the advantage that, in the end effect, all those residual trigger inaccuracies are also averaged out which prove to be unavoidable as residual inaccuracies in the averaging of only the beat-to-beat values of the comparator 2. Also. owing to the multiple averaging by the mean value former 22, it is ensured that heart frequency fluctuations which actually emanate from a physiological cause are not reproduced in distorted form as genuine low heart frequency values.
In accordance with the above-described scheme, in which the stores 15 and 16 serving to activate the comparators 2 and 18 are recharged to new voltage values alternately with one another, but in cyclic parallel timing in respect of the remaining stores 11 to lAfor the formation of the mean value, the sixth trigger pulse 16 of the pulse train A also occupies the stores 12 and 16. The seventh and eighth trigger pulses 17 and 18 of the pulse train A. on the other hand, follow at changed intervals, the spacing of the pulse 17 being shorter than the tolerance width fixed in the comparator 2, while the spacing of the pulse I8 is above this threshold. In this way, however, these pulses do not fall in opening times of the gate 3. hence, these pulses do not pass to the stores 11 to 16. They are therefore used as values "not recognised as correct" neither for the comparator comparison nor for the mean value formation in the mean value former 22. The same is the case with the succeeding further pulses up to the pulses 110 with the exception of the pulse I9, which again falls in the opening time of the gate 3, and can thus be passed as suitable value to the stores 11 to 16. The voltage pulses occurring between the pulses 19 and I l() vary with considerably differing pulse spacings.
In order to avoid disturbances of the further course of the measurement by such pulses which are out of step over a relatively long period of time, so that no further pulses can be recognised as correct over this period of time, there is provided an additional opening signal generator which generates an opening signal for the gate 3 when no signals have passed through the latter preferably over a total period of 2.7 seconds. In the present embodiment, the opening signal generator comprises a monostable trigger stage 5 which is held in the unstable state in step with the passage signals B of the gate 3 and which, in the absence of the gate passage signals, is reset to the stable state after a holding time of 2.7 seconds and thus changes over the bistable trigger stage 4 in the sense of the opening of the gate. Thus. when the holding time of 2.7 seconds elapses without a retriggering pulse C for the monostable trigger stage 5 at the output of the inverting stage 7, in accordance with the pulse diagram of Figure 2, the monostable trigger stage 5 changes over to + E and thus sets the bistable trigger stage to + F. In this way, on the one hand. the counter 20 is reset and thus also the bistable trigger stage 21. U3 at the mean value former 22 falls to zero. Correspondingly. the counter 10, and thus also the switch
17. is reset through + G. The bistable trigger stage 6 changes over to L = 0. Finally, however, + F also switches the comparator 2 to
+ D. The gate opening signal produced out of turn is thus present at the end of the holding time of 2.7 seconds. The gate 3 is therefore opened and the immediately succeeding tenth trigger pulse I10 of the pulse
train A can pass and be taken up by the stores 11 and 15 as a new momentary initial value. The succeeding eleventh trigger pulse
Ill correspondingly charges the stores 12 and 16.
It is essential that the opening signal generator 4, 5 is turned off by the retention of the gate opening pulse at the earliest when at least one new end voltage value of the charge/discharge store 1 has been taken up by each of the two comparator stores 15 and 16 and these two voltage values have been additionally recognised by the first comparator 18 as values correctly lying in the fluctuation range. According to Figure 2, however, the latter condition is not satisfied until the pulse 116 of the pulse train has been taken up. When the sixteenth pulse 116 is taken up, therefore, the comparator 18 with +H (as described for the third pulse 13) sets the bistable trigger stage 4 to F=0. In this way, on the one hand, the comparator 2 is changed over from continuous opening to opening merely with approximate equality between the voltage signals U I and U2. At the same time, the counter 20 and the bistable trigger stage 21 are also cleared for the pass pulses B of the gate 3. The comparator 18 sets its output to +H with delay, so that it does not respond when two storage values of the stores 15 and 16 agree, not over a relatively long time, but only for a brief time. Such brief agreements of storage values, which do not give any indication of the presence of correct voltage values. can always occur during the recharging of the stores.
The further pulses 117 and 118 of the pulse train A lie in the permissible fluctuation ranges. They are therefore recognised as correct together with the pulses I10 and I16 and accordingly written into the stores 11 to 14. When the eighteenth pulse I18 is introduced into the store, therefore, the counter 20 prepares the bistable trigger stage 21 by way of + M. The trailing edge of the pulse 18 sets the bistable trigger stage 21 to +N. The mean value former 22 takes up the stored values and the output voltage U3 jumps to the new mean value. The latter mean value is then continuously corrected by respective newly entering values recognised as correct, so that a staircase variation of the mean value is obtained. The mean value curve is interrupted only by accumulations of trigger pulses which cannot be evaluated, for example due to body movements of the mother or of the foetus which last more than 2.7 seconds. When the mean value curve U3, i.e.
in the present instance the heart frequency curve of the foetus, is written out on a recorder, a clean written image is obtained if the indicated periodic curve blanks are totally eliminated. This can readily be done, for example, in the case of reproduction with a thermostylus on sensitive paper, by also stopping the heating of the pointer during the curve blanks.
The illustrated and described circuit ar rangement enables pulse spacings and/or the repetition frequency to be obtained in optimum manner without disturbance substantially independently of considerable fluctuations and of interspersed artifacts. More particularly, however, in regard to the measurement of foetal heat frequency, it is proposed to process the trigger pulses derived from the Doppler signal so as to produce an optimum disturbance-free heart frequency curve without the total result being falsified by the weighting introduced by the incoming trigger signals.
WHAT WE CLAIM IS: 1. Circuit arrangement for ascertaining the pulse spacings and/or repetition frequency of pulses of a pulse train, for example trigger pulses from ultrasonic Doppler signals produced in measurement of a foetal heart frequency, comprising: a charge/discharge store arranged to have its charge changed in step with said pulses from an initial voltage value to end voltage values different therefrom, the end voltage values being a measure of the pulse spacings; a comparator which is arranged to compare whether the pulse spacings indicated by said end voltage values are in a permissible range of fluctuation and to cause respective ones of said pulse spacings to pass to a device for further processing and/or indication, for example to a mean value former, only when their spacings are in said permissible range of fluctuation; and a plurality of individual stores for the voltage end values produced by the charge/discharge store, at least two of which individual stores are connected to said comparator which is arranged to compare with one another end voltage values of the charge/discharge store which are specifically introduced into the said two individual stores in alternating time succession. said comparator being arranged to close, when the values thus compared are in said permissible fluctuation range. a gate for causing the passage of further voltage end values both to said two individual stores for the next succeeding end value comparison and to the remaining individual stores for the storage for the further processing and/or indication, the gate being arranged to be briefly re-opened only after an interval of time which corresponds to the pulse spacing which has been previously acknowledged by said two individual stores as the pulse spacing correctly lying in said fluctuation range.
2. Circuit arrangement according to claim 1 wherein said gate is arranged for the passage of said pulses of said pulse train to be tested. and there is provided a switching means arranged so as, at the occurrence of each pulse of the pulse train at the output of said gate, to directly connect the charge/discharge store to individual ones of the voltage end value stores for the new introduction of voltage end values.
3. Circuit arrangement according to claim 1 or 2, which is such that when the arrangement is in use the opening time of said gate is determined by the duration of the output pulse of a second comparator arranged to compare a mean value continuously formed from the storage values of said two stores with the momentary voltage value of the charge/discharge store, and to emit said output pulse when said mean value and said momentary value also lie in a permissible fluctuation range.
4. Circuit arrangement according to claim 3, which is such that when the arrangement is in use the permissible fluctuation range of the second comparator agrees substantially with the permissible fluctuation range of the first mentioned comparator.
5. Circuit arrangement according to any one of the preceding claims, which is such that when the arrangement is in use the or each said permissible fluctuation range is substantially + 12 pulses/min.
6. Circuit arrangement according to any one of claims 1 to 5, which is such that, when the arrangement is in use, in the case where no signals have passed through the gate over a presettable time interval, an opening signal for the gate is emitted at the end of the time interval by an opening signal generator.
7. Circuit arrangement according to claim 6, which is such that when the arrangement is in operation, said presettable time interval is substantially 2.7 seconds.
8. Circuit arrangement according to claim 6 or 7, which is such that when the arrangement is in use said opening signal generator is turned-off by the retention of the gate-opening pulse at the earliest when each of said two stores has taken up at least one new end voltage value of the charge/discharge store and in addition these two voltage values have been recognised by the first-mentioned comparator as correctly lying in the fluctuation range.
9. Circuit arrangement according to claim 6, 7 or 8, wherein said opening signal generator comprises a monostable trigger stage arranged to be held in the unstable condition in step with pass signals of the gate and. in the absence of gate pass signals, to be reset into the stable condition after a holding time corresponding to the presettable time interval for the setting-up of a gate opening signal, and thus to change-over a bistable trigger stage of said opening signal generator in the sense of the opening of the gate.
10. Circuit arrangement according to any one of the preceding claims, which is such that when the arrangement is in use the feeding of such voltage end values of the charge/discharge store which have been recognised by the first-mentioned compara
**WARNING** end of DESC field may overlap start of CLMS **.
Claims (14)
1. Circuit arrangement for ascertaining the pulse spacings and/or repetition frequency of pulses of a pulse train, for example trigger pulses from ultrasonic Doppler signals produced in measurement of a foetal heart frequency, comprising: a charge/discharge store arranged to have its charge changed in step with said pulses from an initial voltage value to end voltage values different therefrom, the end voltage values being a measure of the pulse spacings; a comparator which is arranged to compare whether the pulse spacings indicated by said end voltage values are in a permissible range of fluctuation and to cause respective ones of said pulse spacings to pass to a device for further processing and/or indication, for example to a mean value former, only when their spacings are in said permissible range of fluctuation; and a plurality of individual stores for the voltage end values produced by the charge/discharge store, at least two of which individual stores are connected to said comparator which is arranged to compare with one another end voltage values of the charge/discharge store which are specifically introduced into the said two individual stores in alternating time succession. said comparator being arranged to close, when the values thus compared are in said permissible fluctuation range. a gate for causing the passage of further voltage end values both to said two individual stores for the next succeeding end value comparison and to the remaining individual stores for the storage for the further processing and/or indication, the gate being arranged to be briefly re-opened only after an interval of time which corresponds to the pulse spacing which has been previously acknowledged by said two individual stores as the pulse spacing correctly lying in said fluctuation range.
2. Circuit arrangement according to claim 1 wherein said gate is arranged for the passage of said pulses of said pulse train to be tested. and there is provided a switching means arranged so as, at the occurrence of each pulse of the pulse train at the output of said gate, to directly connect the charge/discharge store to individual ones of the voltage end value stores for the new introduction of voltage end values.
3. Circuit arrangement according to claim 1 or 2, which is such that when the arrangement is in use the opening time of said gate is determined by the duration of the output pulse of a second comparator arranged to compare a mean value continuously formed from the storage values of said two stores with the momentary voltage value of the charge/discharge store, and to emit said output pulse when said mean value and said momentary value also lie in a permissible fluctuation range.
4. Circuit arrangement according to claim 3, which is such that when the arrangement is in use the permissible fluctuation range of the second comparator agrees substantially with the permissible fluctuation range of the first mentioned comparator.
5. Circuit arrangement according to any one of the preceding claims, which is such that when the arrangement is in use the or each said permissible fluctuation range is substantially + 12 pulses/min.
6. Circuit arrangement according to any one of claims 1 to 5, which is such that, when the arrangement is in use, in the case where no signals have passed through the gate over a presettable time interval, an opening signal for the gate is emitted at the end of the time interval by an opening signal generator.
7. Circuit arrangement according to claim 6, which is such that when the arrangement is in operation, said presettable time interval is substantially 2.7 seconds.
8. Circuit arrangement according to claim 6 or 7, which is such that when the arrangement is in use said opening signal generator is turned-off by the retention of the gate-opening pulse at the earliest when each of said two stores has taken up at least one new end voltage value of the charge/discharge store and in addition these two voltage values have been recognised by the first-mentioned comparator as correctly lying in the fluctuation range.
9. Circuit arrangement according to claim 6, 7 or 8, wherein said opening signal generator comprises a monostable trigger stage arranged to be held in the unstable condition in step with pass signals of the gate and. in the absence of gate pass signals, to be reset into the stable condition after a holding time corresponding to the presettable time interval for the setting-up of a gate opening signal, and thus to change-over a bistable trigger stage of said opening signal generator in the sense of the opening of the gate.
10. Circuit arrangement according to any one of the preceding claims, which is such that when the arrangement is in use the feeding of such voltage end values of the charge/discharge store which have been recognised by the first-mentioned compara
tor a correctly lying in the fluctuation range, into said individual stores, takes place in alternate seqence in the sense that an individual store of said remaining individual stores is always cyclically occupied by a new end value in the correct sequence for the further processing and/or indication of the signal values together with one of said two stores.
11. Circuit arrangement according to claim 10, which is such that in operation of the arrangement when all said remaining individual stores have for the first time been completely occupied by correct values for the further processing, an evaluation of all the stored values also takes place for the first time, for example a formation of the arithmetical mean of these values.
12. Circuit arrangement according to claim 11. wherein there is provided a signalling device which comprises a counter which, in operation of the arrangement when two voltage end values have been recognised by the first-mentioned comparator as correctly lying in the fluctuation range for the first time, is brought into readiness for counting and then counts up, in step with further voltage end values which thereafter occur and are also recognised as correct, to a count which corresponds to the difference made up of the total number of all said remaining individual stores for the further processing and of the number of said at least two stores, and which generates at this count a clearing signal for the storage values for further processing for example for said formation of the arithmetical mean value.
13. Circuit arrangement substantially as hereinbefore described with reference to
Figures 1 and 2 of the accompanying drawings.
14. Circuit arrangement according to any one of the preceding claims, when coupled to apparatus operable to supply to the circuit arrangement trigger pulses from ultrasonic
Doppler signals produced in measurement of a foetal heart frequency.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19772713945 DE2713945C2 (en) | 1977-03-29 | 1977-03-29 | Circuit arrangement for determining the pulse intervals and / or repetition frequency of pulses in a pulse train |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1596580A true GB1596580A (en) | 1981-08-26 |
Family
ID=6005032
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB1152078A Expired GB1596580A (en) | 1977-03-29 | 1978-03-22 | Circuit arrangement for processing pulses |
Country Status (4)
Country | Link |
---|---|
CH (1) | CH625888A5 (en) |
DE (1) | DE2713945C2 (en) |
FR (1) | FR2386042A1 (en) |
GB (1) | GB1596580A (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2916067C2 (en) * | 1979-04-20 | 1983-11-24 | Siemens AG, 1000 Berlin und 8000 München | Device for evaluating physiological signals which are essentially periodic |
EP0186740B1 (en) * | 1982-12-30 | 1990-09-05 | Sharp Kabushiki Kaisha | Power frequency detection system |
DE3278795D1 (en) * | 1982-12-30 | 1988-08-25 | Sharp Kk | Power frequency detection system |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3780726A (en) * | 1972-07-13 | 1973-12-25 | Hoffmann La Roche | Heartbeat rate monitoring |
-
1977
- 1977-03-29 DE DE19772713945 patent/DE2713945C2/en not_active Expired
-
1978
- 1978-02-01 CH CH107978A patent/CH625888A5/en not_active IP Right Cessation
- 1978-03-22 GB GB1152078A patent/GB1596580A/en not_active Expired
- 1978-03-28 FR FR7808877A patent/FR2386042A1/en not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
DE2713945B1 (en) | 1978-01-05 |
FR2386042A1 (en) | 1978-10-27 |
CH625888A5 (en) | 1981-10-15 |
DE2713945C2 (en) | 1978-08-31 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PS | Patent sealed | ||
PCNP | Patent ceased through non-payment of renewal fee |