GB1593885A - Data processing system - Google Patents
Data processing system Download PDFInfo
- Publication number
- GB1593885A GB1593885A GB42642/77A GB4264277A GB1593885A GB 1593885 A GB1593885 A GB 1593885A GB 42642/77 A GB42642/77 A GB 42642/77A GB 4264277 A GB4264277 A GB 4264277A GB 1593885 A GB1593885 A GB 1593885A
- Authority
- GB
- United Kingdom
- Prior art keywords
- request
- signal
- priority
- select
- line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000004891 communication Methods 0.000 claims description 16
- 230000015654 memory Effects 0.000 description 28
- 230000004044 response Effects 0.000 description 3
- 230000000903 blocking effect Effects 0.000 description 2
- 239000013256 coordination polymer Substances 0.000 description 2
- 230000009977 dual effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 239000007787 solid Substances 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 230000001143 conditioned effect Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000001960 triggered effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
- G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
- G06F13/364—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using independent requests or grants, e.g. using separated request and grant lines
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Multi Processors (AREA)
- Bus Control (AREA)
- Memory System (AREA)
- Time-Division Multiplex Systems (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US05/736,798 US4130864A (en) | 1976-10-29 | 1976-10-29 | Priority selection circuit for multiported central functional unit with automatic priority reduction on excessive port request |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1593885A true GB1593885A (en) | 1981-07-22 |
Family
ID=24961342
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB42642/77A Expired GB1593885A (en) | 1976-10-29 | 1977-10-13 | Data processing system |
Country Status (6)
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2166930A (en) * | 1984-10-30 | 1986-05-14 | Raytheon Co | Bus arbiter |
US4964034A (en) * | 1984-10-30 | 1990-10-16 | Raytheon Company | Synchronized processing system with bus arbiter which samples and stores bus request signals and synchronizes bus grant signals according to clock signals |
Families Citing this family (37)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2846925C2 (de) * | 1978-10-27 | 1982-09-09 | Siemens AG, 1000 Berlin und 8000 München | Mikrocomputer-Netzwerk mit mehreren an mindestens einen Systembus angekoppelten Mikrocomputer-Moduln |
JPS5846098B2 (ja) * | 1978-10-30 | 1983-10-14 | 株式会社日立製作所 | ル−プバスネットワ−クシステムにおけるバス優先制御方式 |
JPS5621219A (en) * | 1979-07-30 | 1981-02-27 | Nec Corp | Request receiving and selecting unit |
US4313161A (en) * | 1979-11-13 | 1982-01-26 | International Business Machines Corporation | Shared storage for multiple processor systems |
US4390943A (en) * | 1979-12-26 | 1983-06-28 | Honeywell Information Systems Inc. | Interface apparatus for data transfer through an input/output multiplexer from plural CPU subsystems to peripheral subsystems |
JPS56121126A (en) * | 1980-02-26 | 1981-09-22 | Toshiba Corp | Priority level assigning circuit |
FR2513469B1 (fr) * | 1981-09-24 | 1987-12-11 | Thomson Csf Mat Tel | Dispositif de selection rapide et automatique d'un signal parmi n |
US4675812A (en) * | 1983-02-14 | 1987-06-23 | International Business Machines Corp. | Priority circuit for channel subsystem having components with diverse and changing requirement for system resources |
US4901230A (en) * | 1983-04-25 | 1990-02-13 | Cray Research, Inc. | Computer vector multiprocessing control with multiple access memory and priority conflict resolution method |
DE3466608D1 (en) * | 1983-05-06 | 1987-11-05 | Bbc Brown Boveri & Cie | Access circuit for parallel buses of data processing systems |
US4608663A (en) * | 1983-08-31 | 1986-08-26 | Wolsten's Computer Devices, Inc. | Computer network for using a common peripheral device |
US4787033A (en) * | 1983-09-22 | 1988-11-22 | Digital Equipment Corporation | Arbitration mechanism for assigning control of a communications path in a digital computer system |
US4835672A (en) * | 1984-04-02 | 1989-05-30 | Unisys Corporation | Access lock apparatus for use with a high performance storage unit of a digital data processing system |
US4630197A (en) * | 1984-04-06 | 1986-12-16 | Gte Communication Systems Corporation | Anti-mutilation circuit for protecting dynamic memory |
US4745545A (en) * | 1985-06-28 | 1988-05-17 | Cray Research, Inc. | Memory reference control in a multiprocessor |
US4858173A (en) * | 1986-01-29 | 1989-08-15 | Digital Equipment Corporation | Apparatus and method for responding to an aborted signal exchange between subsystems in a data processing system |
US4821177A (en) * | 1986-09-02 | 1989-04-11 | Honeywell Bull Inc. | Apparatus for controlling system accesses having multiple command level conditional rotational multiple port servicing priority hierarchy |
GB2196762B (en) * | 1986-10-27 | 1990-12-19 | Burr Brown Ltd | Interleaved access to global memory by high priority source |
US4812968A (en) * | 1986-11-12 | 1989-03-14 | International Business Machines Corp. | Method for controlling processor access to input/output devices |
JPS63132369A (ja) * | 1986-11-21 | 1988-06-04 | Oki Electric Ind Co Ltd | メモリ情報転送方式 |
US5283903A (en) * | 1986-12-25 | 1994-02-01 | Nec Corporation | Priority selector |
US5214769A (en) * | 1987-12-24 | 1993-05-25 | Fujitsu Limited | Multiprocessor control system |
EP0351157B1 (en) * | 1988-07-12 | 1995-11-22 | Sony Corporation | Semiconductor integrated circuits |
US5179667A (en) * | 1988-09-14 | 1993-01-12 | Silicon Graphics, Inc. | Synchronized DRAM control apparatus using two different clock rates |
US5193193A (en) * | 1988-09-14 | 1993-03-09 | Silicon Graphics, Inc. | Bus control system for arbitrating requests with predetermined on/off time limitations |
EP0374764B1 (en) * | 1988-12-19 | 2001-04-04 | Nec Corporation | Data transfer apparatus |
US5303351A (en) * | 1988-12-30 | 1994-04-12 | International Business Machines Corporation | Error recovery in a multiple 170 channel computer system |
US5142638A (en) * | 1989-02-07 | 1992-08-25 | Cray Research, Inc. | Apparatus for sharing memory in a multiprocessor system |
US5095460A (en) * | 1989-04-25 | 1992-03-10 | Digital Equipment Corporation | Rotating priority encoder operating by selectively masking input signals to a fixed priority encoder |
US5206952A (en) * | 1990-09-12 | 1993-04-27 | Cray Research, Inc. | Fault tolerant networking architecture |
WO1992015060A1 (en) * | 1991-02-19 | 1992-09-03 | International Business Machines Corporation | Channel selection arbitration |
JP3199966B2 (ja) * | 1994-11-21 | 2001-08-20 | キヤノン株式会社 | 情報処理装置及びそのプリンタ選択方法 |
US5754865A (en) * | 1995-12-18 | 1998-05-19 | International Business Machines Corporation | Logical address bus architecture for multiple processor systems |
US5815023A (en) * | 1997-03-20 | 1998-09-29 | Sun Microsystems, Inc. | Unbalanced multiplexer and arbiter combination |
US6925520B2 (en) * | 2001-05-31 | 2005-08-02 | Sun Microsystems, Inc. | Self-optimizing crossbar switch |
CN1318941C (zh) * | 2003-08-05 | 2007-05-30 | 华为技术有限公司 | 一种端口轮询选择方法 |
KR102234056B1 (ko) * | 2019-04-24 | 2021-03-31 | (주)스티커스 코퍼레이션 | 도담쌀 성분을 포함하는 기능성 개껌 및 이에 의해 제조된 기능성 개껌 |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3333252A (en) * | 1965-01-18 | 1967-07-25 | Burroughs Corp | Time-dependent priority system |
NL164143C (nl) * | 1965-09-10 | Ibm | Gegevensverwerkend systeem met variabele prioriteiten. | |
FR1541240A (fr) * | 1966-11-10 | Ibm | Accès à chevauchement et à intercalation pour mémoires à plusieurs vitesses | |
US3573856A (en) * | 1969-06-24 | 1971-04-06 | Texas Instruments Inc | Distributed priority of access to a computer unit |
US3638198A (en) * | 1969-07-09 | 1972-01-25 | Burroughs Corp | Priority resolution network for input/output exchange |
US3753014A (en) * | 1971-03-15 | 1973-08-14 | Burroughs Corp | Fast inhibit gate with applications |
US3798591A (en) * | 1971-09-28 | 1974-03-19 | Gen Electric Co Ltd | Access circuit for a time-shared data processing equipment |
IT971304B (it) * | 1972-11-29 | 1974-04-30 | Honeywell Inf Systems | Sistema di accesso a priorita variabile dinamicamente |
US3866181A (en) * | 1972-12-26 | 1975-02-11 | Honeywell Inf Systems | Interrupt sequencing control apparatus |
JPS5435482B2 (US20030204162A1-20031030-M00001.png) * | 1973-03-29 | 1979-11-02 | ||
JPS5014246A (US20030204162A1-20031030-M00001.png) * | 1973-06-06 | 1975-02-14 | ||
GB1442078A (en) * | 1973-07-21 | 1976-07-07 | Ibm | Data handling system |
IT998437B (it) * | 1973-08-22 | 1976-01-20 | Honeywell Inf Systems | Sistema di accesso a scansione ciclica variabile delle richieste di interruzione |
US3921145A (en) * | 1973-10-12 | 1975-11-18 | Burroughs Corp | Multirequest grouping computer interface |
IT1002275B (it) * | 1973-12-27 | 1976-05-20 | Honeywell Inf Systems | Sistema di elaborazione dati a piu canali di ingresso uscita a risorse orientate per livelli di servizio distinti e interrompi bili |
US3967246A (en) * | 1974-06-05 | 1976-06-29 | Bell Telephone Laboratories, Incorporated | Digital computer arrangement for communicating data via data buses |
US4009470A (en) * | 1975-02-18 | 1977-02-22 | Sperry Rand Corporation | Pre-emptive, rotational priority system |
-
1976
- 1976-10-29 US US05/736,798 patent/US4130864A/en not_active Expired - Lifetime
-
1977
- 1977-10-13 GB GB42642/77A patent/GB1593885A/en not_active Expired
- 1977-10-14 IT IT41696/77A patent/IT1091937B/it active
- 1977-10-18 JP JP12414877A patent/JPS5355931A/ja active Granted
- 1977-10-28 BE BE182193A patent/BE860282A/xx not_active IP Right Cessation
- 1977-10-28 FR FR7732716A patent/FR2369628A1/fr active Granted
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2166930A (en) * | 1984-10-30 | 1986-05-14 | Raytheon Co | Bus arbiter |
US4964034A (en) * | 1984-10-30 | 1990-10-16 | Raytheon Company | Synchronized processing system with bus arbiter which samples and stores bus request signals and synchronizes bus grant signals according to clock signals |
Also Published As
Publication number | Publication date |
---|---|
US4130864A (en) | 1978-12-19 |
JPS5355931A (en) | 1978-05-20 |
FR2369628A1 (fr) | 1978-05-26 |
JPS5718220B2 (US20030204162A1-20031030-M00001.png) | 1982-04-15 |
BE860282A (fr) | 1978-04-28 |
IT1091937B (it) | 1985-07-06 |
FR2369628B1 (US20030204162A1-20031030-M00001.png) | 1984-08-24 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
GB1593885A (en) | Data processing system | |
US4314335A (en) | Multilevel priority arbiter | |
US4488218A (en) | Dynamic priority queue occupancy scheme for access to a demand-shared bus | |
US5179669A (en) | Multiprocessor interconnection and access arbitration arrangement | |
US4281381A (en) | Distributed first-come first-served bus allocation apparatus | |
CA1104226A (en) | Computer useful as a data network communications processor unit | |
US4463445A (en) | Circuitry for allocating access to a demand-shared bus | |
EP0029975B1 (en) | Multiprocessor system | |
US4672536A (en) | Arbitration method and device for allocating a shared resource in a data processing system | |
US4374413A (en) | Arbitration controller providing for access of a common resource by a plurality of central processing units | |
EP0159592A1 (en) | Distributed arbitration for multiple processors | |
EP0383475A2 (en) | Shared resource arbitration | |
US4374414A (en) | Arbitration controller providing for access of a common resource by a duplex plurality of central processing units | |
EP0476990A2 (en) | Dynamic bus arbitration | |
US4468738A (en) | Bus access arbitration using unitary arithmetic resolution logic and unique logical addresses of competing processors | |
US4395753A (en) | Allocation controller providing for access of multiple common resources by a plurality of central processing units | |
US4363096A (en) | Arbitration controller providing for access of a common resource by a duplex plurality of central processing units | |
US4417303A (en) | Multi-processor data communication bus structure | |
US4611275A (en) | Time sharing device for access to a main memory through to a single bus connected between a central computer and a plurality of peripheral computers | |
US4394728A (en) | Allocation controller providing for access of multiple common resources by a duplex plurality of central processing units | |
CA1149040A (en) | Arbitration controller providing for access of a common resource by a plurality of central processing units | |
US5450591A (en) | Channel selection arbitration | |
GB1167945A (en) | Data Processing System with Acces Control for Subsystems. | |
US4894769A (en) | Increased bandwith for multi-processor access of a common resource | |
JPS6155704B2 (US20030204162A1-20031030-M00001.png) |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PS | Patent sealed [section 19, patents act 1949] | ||
PCNP | Patent ceased through non-payment of renewal fee |