GB1575074A - Buffer store control arrangements - Google Patents

Buffer store control arrangements Download PDF

Info

Publication number
GB1575074A
GB1575074A GB1009377A GB1009377A GB1575074A GB 1575074 A GB1575074 A GB 1575074A GB 1009377 A GB1009377 A GB 1009377A GB 1009377 A GB1009377 A GB 1009377A GB 1575074 A GB1575074 A GB 1575074A
Authority
GB
United Kingdom
Prior art keywords
buffer store
information
control circuit
control
function unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB1009377A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens Corp
Original Assignee
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Corp filed Critical Siemens Corp
Publication of GB1575074A publication Critical patent/GB1575074A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • G06F5/10—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor having a sequence of storage locations each being individually accessible for both enqueue and dequeue operations, e.g. using random access memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Communication Control (AREA)
  • Information Transfer Systems (AREA)
GB1009377A 1976-03-12 1977-03-10 Buffer store control arrangements Expired GB1575074A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19762610428 DE2610428C3 (de) 1976-03-12 1976-03-12 Anordnung zur Steuerung der Zwischenspeicherung von zwischen zwei Funktionseinheiten zu übertragenden Daten in einem Pufferspeicher

Publications (1)

Publication Number Publication Date
GB1575074A true GB1575074A (en) 1980-09-17

Family

ID=5972294

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1009377A Expired GB1575074A (en) 1976-03-12 1977-03-10 Buffer store control arrangements

Country Status (8)

Country Link
AT (1) AT377107B (enrdf_load_stackoverflow)
BE (1) BE852339A (enrdf_load_stackoverflow)
CH (1) CH613790A5 (enrdf_load_stackoverflow)
DE (1) DE2610428C3 (enrdf_load_stackoverflow)
FR (1) FR2344073A1 (enrdf_load_stackoverflow)
GB (1) GB1575074A (enrdf_load_stackoverflow)
IT (1) IT1077686B (enrdf_load_stackoverflow)
NL (1) NL168969C (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0026649A3 (en) * 1979-09-26 1981-04-22 Sperry Corporation Digital information transfer system and interface

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE399773B (sv) * 1977-03-01 1978-02-27 Ellemtel Utvecklings Ab Adress- och avbrottsignalgenerator
US4218758A (en) * 1978-06-30 1980-08-19 International Business Machines Corporation Parallel-to-serial binary data converter with multiphase and multisubphase control
US4298954A (en) * 1979-04-30 1981-11-03 International Business Machines Corporation Alternating data buffers when one buffer is empty and another buffer is variably full of data
DE3021306A1 (de) * 1980-06-06 1981-12-24 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Anordnung mit einem wenigstens zwei teilnehmern gemeinsamen datenspeicher
DE3149678C2 (de) * 1981-12-15 1984-02-23 Siemens AG, 1000 Berlin und 8000 München Anordnung zur Zwischenspeicherung von zwischen zwei Funktionseinheiten in beiden Richtungen zu übertragenden Informationen in einem Pufferspeicher
DE3239997C1 (de) * 1982-10-28 1984-04-12 Siemens AG, 1000 Berlin und 8000 München Verfahren und Anordnung zur Durchfuehrung von kontinuierlichen Datentransfers bei der Ausfuehrung von Ein-/Ausgabeoperationen ueber Selektor- oder Blockmultiplexkanaele des Ein-/Ausgabewerkes einer Datenverarbeitungsanlage
DE3727434C2 (de) * 1987-08-17 1997-04-30 Siemens Ag Anordnung zum Übertragen von in mehrere Teilwörter unterteilten Datenwörtern

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0026649A3 (en) * 1979-09-26 1981-04-22 Sperry Corporation Digital information transfer system and interface

Also Published As

Publication number Publication date
CH613790A5 (en) 1979-10-15
DE2610428C3 (de) 1980-06-19
NL168969C (nl) 1982-05-17
FR2344073A1 (fr) 1977-10-07
NL168969B (nl) 1981-12-16
NL7702551A (nl) 1977-09-14
FR2344073B1 (enrdf_load_stackoverflow) 1982-03-05
DE2610428A1 (de) 1977-09-15
BE852339A (fr) 1977-09-12
ATA149177A (de) 1984-06-15
IT1077686B (it) 1985-05-04
DE2610428B2 (enrdf_load_stackoverflow) 1979-09-13
AT377107B (de) 1985-02-11

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Legal Events

Date Code Title Description
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee